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authorukw2012-02-16 11:15:44 +0000
committerukw2012-02-16 11:15:44 +0000
commit9c86ff1a028fc9f554a74a23e4638179b9e5a1de (patch)
tree966674e981fc822ef0d215fd814b10af4411139d
parent6c3c57e6ed1d614a5ffec4747e271eb9e7aa8a68 (diff)
downloadirmp-9c86ff1a028fc9f554a74a23e4638179b9e5a1de.zip
Version 2.1.0: port to PIC C18 compiler
git-svn-id: svn://mikrocontroller.net/irmp@88 aeb2e35e-bfc4-4214-b83c-9e8de998ed28
-rw-r--r--irmpconfig.h2
-rw-r--r--irsnd.c132
-rw-r--r--irsnd.h13
-rw-r--r--irsndconfig.h66
4 files changed, 165 insertions, 48 deletions
diff --git a/irmpconfig.h b/irmpconfig.h
index 2349fa0..a303719 100644
--- a/irmpconfig.h
+++ b/irmpconfig.h
@@ -24,7 +24,7 @@
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
#ifndef F_INTERRUPTS
-#define F_INTERRUPTS 11718 // interrupts per second, min: 10000, max: 20000, typ: 15000
+#define F_INTERRUPTS 15000 // interrupts per second, min: 10000, max: 20000, typ: 15000
#endif
/*---------------------------------------------------------------------------------------------------------------------------------------------------
diff --git a/irsnd.c b/irsnd.c
index 68a6691..f08044f 100644
--- a/irsnd.c
+++ b/irsnd.c
@@ -12,7 +12,7 @@
* ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
*
- * $Id: irsnd.c,v 1.46 2012/02/15 11:02:42 fm Exp $
+ * $Id: irsnd.c,v 1.45 2012/02/13 11:02:29 fm Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -21,6 +21,13 @@
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
+#if defined(__18CXX)
+#define PIC_C18 // Microchip C18
+#include <p18cxxx.h> // basic P18 lib
+#include "timers.h" // timer lib
+#include "pwm.h" // pwm lib
+#endif
+
#ifdef unix // test/debug on linux/unix
#include <stdio.h>
#include <unistd.h>
@@ -46,14 +53,16 @@ typedef unsigned short uint16_t;
#else
#ifdef CODEVISION
- #define COM2A0 6
- #define WGM21 1
- #define CS20 0
+#define COM2A0 6
+#define WGM21 1
+#define CS20 0
+#elif defined(PIC_C18)
+ //nothing to do here
#else
- #include <inttypes.h>
- #include <avr/io.h>
- #include <util/delay.h>
- #include <avr/pgmspace.h>
+#include <inttypes.h>
+#include <avr/io.h>
+#include <util/delay.h>
+#include <avr/pgmspace.h>
#endif // CODEVISION
#endif // WIN32
@@ -68,11 +77,6 @@ typedef unsigned short uint16_t;
* ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
-/*---------------------------------------------------------------------------------------------------------------------------------------------------
- * ATtiny pin definition of OC0A / OC0B
- * ATmega pin definition of OC2 / OC2A / OC2B / OC0 / OC0A / OC0B
- *---------------------------------------------------------------------------------------------------------------------------------------------------
- */
#if defined (__AVR_ATtiny84__) // ATtiny84 uses OC0A = PB2 or OC0B = PA7
#if IRSND_OCx == IRSND_OC0A // OC0A
#define IRSND_PORT PORTB // port B
@@ -124,6 +128,7 @@ typedef unsigned short uint16_t;
#define IRSND_PORT PORTB // port B
#define IRSND_DDR DDRB // ddr B
#define IRSND_BIT 1 // OC2
+
#elif IRSND_OCx == IRSND_OC0 // OC0
#define IRSND_PORT PORTB // port B
#define IRSND_DDR DDRB // ddr B
@@ -199,6 +204,9 @@ typedef unsigned short uint16_t;
#error Wrong value for IRSND_OCx, choose IRSND_OC0, IRSND_OC1A, or IRSND_OC1B in irsndconfig.h
#endif // IRSND_OCx
+#elif defined (PIC_C18) //Microchip C18 compiler
+ //Nothing here to do here -> See irsndconfig.h
+
#else
#if !defined (unix) && !defined (WIN32)
#error mikrocontroller not defined, please fill in definitions here.
@@ -206,9 +214,9 @@ typedef unsigned short uint16_t;
#endif // __AVR...
#if IRSND_SUPPORT_NIKON_PROTOCOL == 1
-typedef uint16_t IRSND_PAUSE_LEN;
+ typedef uint16_t IRSND_PAUSE_LEN;
#else
-typedef uint8_t IRSND_PAUSE_LEN;
+ typedef uint8_t IRSND_PAUSE_LEN;
#endif
/*---------------------------------------------------------------------------------------------------------------------------------------------------
@@ -314,8 +322,8 @@ typedef uint8_t IRSND_PAUSE_LEN;
#define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)
#define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
-#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
-#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
+#define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME + 0.5)
+#define GRUNDIG_NOKIA_IR60_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME + 0.5)
#define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
#define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!
#define GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
@@ -324,12 +332,22 @@ typedef uint8_t IRSND_PAUSE_LEN;
#define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME + 0.5)
#define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
+
+#ifdef PIC_C18
+#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2 / Pre_Scaler / PIC_Scaler) - 1)
+#else // AVR
#define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)
#define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)
#define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)
#define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)
#define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)
#define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)
+#endif
#define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)
#define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)
@@ -369,10 +387,10 @@ typedef uint8_t IRSND_PAUSE_LEN;
#define LEGO_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME + 0.5)
#define LEGO_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * LEGO_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!
-static volatile uint8_t irsnd_busy;
-static volatile uint8_t irsnd_protocol;
-static volatile uint8_t irsnd_buffer[6];
-static volatile uint8_t irsnd_repeat;
+static volatile uint8_t irsnd_busy = 0;
+static volatile uint8_t irsnd_protocol = 0;
+static volatile uint8_t irsnd_buffer[6] = {0};
+static volatile uint8_t irsnd_repeat = 0;
static volatile uint8_t irsnd_is_on = FALSE;
#if IRSND_USE_CALLBACK == 1
@@ -390,6 +408,12 @@ irsnd_on (void)
if (! irsnd_is_on)
{
#ifndef DEBUG
+
+#if defined(PIC_C18)
+ IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
+#else
+
+
#if IRSND_OCx == IRSND_OC2 // use OC2
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
#elif IRSND_OCx == IRSND_OC2A // use OC2A
@@ -405,6 +429,8 @@ irsnd_on (void)
#else
#error wrong value of IRSND_OCx
#endif // IRSND_OCx
+
+#endif //C18
#endif // DEBUG
#if IRSND_USE_CALLBACK == 1
@@ -429,6 +455,11 @@ irsnd_off (void)
if (irsnd_is_on)
{
#ifndef DEBUG
+
+#if defined(PIC_C18)
+ IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
+#else //AVR
+
#if IRSND_OCx == IRSND_OC2 // use OC2
TCCR2 &= ~(1<<COM20); // normal port operation, OC2 disconnected.
#elif IRSND_OCx == IRSND_OC2A // use OC2A
@@ -445,6 +476,7 @@ irsnd_off (void)
#error wrong value of IRSND_OCx
#endif // IRSND_OCx
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
+#endif //C18
#endif // DEBUG
#if IRSND_USE_CALLBACK == 1
@@ -467,6 +499,12 @@ static void
irsnd_set_freq (uint8_t freq)
{
#ifndef DEBUG
+
+#if defined(PIC_C18)
+ OpenPWM(freq);
+ SetDCPWM( (uint16_t) freq * 2); // freq*2 = Duty cycles 50%
+#else //AVR
+
#if IRSND_OCx == IRSND_OC2
OCR2 = freq; // use register OCR2 for OC2
#elif IRSND_OCx == IRSND_OC2A // use OC2A
@@ -482,6 +520,7 @@ irsnd_set_freq (uint8_t freq)
#else
#error wrong value of IRSND_OCx
#endif
+#endif //PIC_C18
#endif // DEBUG
}
@@ -494,6 +533,12 @@ void
irsnd_init (void)
{
#ifndef DEBUG
+#if defined(PIC_C18)
+ OpenTimer;
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); //default frequency
+ IRSND_PIN = 1; //default PWM output pin off (0=PWM on, 1=PWM off)
+#else
+
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
@@ -514,6 +559,7 @@ irsnd_init (void)
#endif
irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
+#endif //PIC_C18
#endif // DEBUG
}
@@ -980,27 +1026,27 @@ irsnd_stop (void)
uint8_t
irsnd_ISR (void)
{
- static uint8_t send_trailer;
- static uint8_t current_bit = 0xFF;
- static uint8_t pulse_counter;
- static IRSND_PAUSE_LEN pause_counter;
- static uint8_t startbit_pulse_len;
- static IRSND_PAUSE_LEN startbit_pause_len;
- static uint8_t pulse_1_len;
- static uint8_t pause_1_len;
- static uint8_t pulse_0_len;
- static uint8_t pause_0_len;
- static uint8_t has_stop_bit;
+ static uint8_t send_trailer = FALSE;
+ static uint8_t current_bit = 0;// 0xFF;
+ static uint8_t pulse_counter = 0;
+ static IRSND_PAUSE_LEN pause_counter = 0;
+ static uint8_t startbit_pulse_len = 0;
+ static IRSND_PAUSE_LEN startbit_pause_len = 0;
+ static uint8_t pulse_1_len = 0;
+ static uint8_t pause_1_len = 0;
+ static uint8_t pulse_0_len = 0;
+ static uint8_t pause_0_len = 0;
+ static uint8_t has_stop_bit = 0;
static uint8_t new_frame = TRUE;
- static uint8_t complete_data_len;
- static uint8_t n_repeat_frames; // number of repetition frames
- static uint8_t n_auto_repetitions; // number of auto_repetitions
- static uint8_t auto_repetition_counter; // auto_repetition counter
- static uint16_t auto_repetition_pause_len; // pause before auto_repetition, uint16_t!
- static uint16_t auto_repetition_pause_counter; // pause before auto_repetition, uint16_t!
- static uint8_t repeat_counter; // repeat counter
- static uint16_t repeat_frame_pause_len; // pause before repeat, uint16_t!
- static uint16_t packet_repeat_pause_counter; // pause before repeat, uint16_t!
+ static uint8_t complete_data_len = 0;
+ static uint8_t n_repeat_frames = 0; // number of repetition frames
+ static uint8_t n_auto_repetitions = 0; // number of auto_repetitions
+ static uint8_t auto_repetition_counter = 0; // auto_repetition counter
+ static uint16_t auto_repetition_pause_len = 0; // pause before auto_repetition, uint16_t!
+ static uint16_t auto_repetition_pause_counter = 0; // pause before auto_repetition, uint16_t!
+ static uint8_t repeat_counter = 0; // repeat counter
+ static uint16_t repeat_frame_pause_len = 0; // pause before repeat, uint16_t!
+ static uint16_t packet_repeat_pause_counter = 0; // pause before repeat, uint16_t!
#if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1
static uint8_t last_bit_value;
#endif
@@ -1080,12 +1126,14 @@ irsnd_ISR (void)
}
else
{
+
if (send_trailer)
{
irsnd_busy = FALSE;
send_trailer = FALSE;
return irsnd_busy;
}
+
n_repeat_frames = irsnd_repeat;
@@ -2010,7 +2058,7 @@ irsnd_ISR (void)
}
else
{
- irsnd_busy = TRUE;
+ irsnd_busy = TRUE; //Rainer
send_trailer = TRUE;
n_repeat_frames = 0;
repeat_counter = 0;
diff --git a/irsnd.h b/irsnd.h
index f8ece78..a791ce5 100644
--- a/irsnd.h
+++ b/irsnd.h
@@ -17,10 +17,15 @@
#ifndef _WC_IRSND_H_
#define _WC_IRSND_H_
-#define IRSND_NO_REPETITIONS 0 // no repetitions
-#define IRSND_MAX_REPETITIONS 14 // max # of repetitions
-#define IRSND_ENDLESS_REPETITION 15 // endless repetions
-#define IRSND_REPETITION_MASK 0x0F // lower nibble of flags
+#if defined(__18CXX) // Microchip C18 declaration of missing typedef
+typedef unsigned char uint8_t;
+typedef unsigned int uint16_t;
+#endif
+
+#define IRSND_NO_REPETITIONS 0 // no repetitions
+#define IRSND_MAX_REPETITIONS 14 // max # of repetitions
+#define IRSND_ENDLESS_REPETITION 15 // endless repetions
+#define IRSND_REPETITION_MASK 0x0F // lower nibble of flags
/**
* Initialize ISND encoder
diff --git a/irsndconfig.h b/irsndconfig.h
index f5c6cac..b669221 100644
--- a/irsndconfig.h
+++ b/irsndconfig.h
@@ -15,7 +15,7 @@
*/
/*---------------------------------------------------------------------------------------------------------------------------------------------------
- * Change F_INTERRUPTS if you change the number of interrupts per second, F_INTERRUPTS should be in the range from 10000 to 20000, typically 15000
+ * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
#ifndef F_INTERRUPTS
@@ -76,18 +76,82 @@
#define IRSND_OC0A 4 // OC0A
#define IRSND_OC0B 5 // OC0B
+//PIC Microchip C18
+#define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module
+#define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module
+
+#ifndef PIC_C18 // AVR part
+
/*---------------------------------------------------------------------------------------------------------------------------------------------------
+ * AVR
+ *
* Change hardware pin here: IRSND_OC2 = OC2 on ATmegas supporting OC2, e.g. ATmega8
* IRSND_OC2A = OC2A on ATmegas supporting OC2A, e.g. ATmega88
* IRSND_OC2B = OC2B on ATmegas supporting OC2B, e.g. ATmega88
* IRSND_OC0 = OC0 on ATmegas supporting OC0, e.g. ATmega162
* IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85
* IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85
+ * IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...
+ * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
+
#define IRSND_OCx IRSND_OC2B // use OC2B
/*---------------------------------------------------------------------------------------------------------------------------------------------------
+ * PIC C18
+ *
+ * Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...
+ * IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...
+ *---------------------------------------------------------------------------------------------------------------------------------------------------
+ */
+
+#else
+#define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC
+
+/*---------------------------------------------------------------------------------------------------------------------------------------------------
+ * PIC C18 - change other PIC specific settings - ignore it when using AVR
+ *---------------------------------------------------------------------------------------------------------------------------------------------------
+ */
+
+#define F_CPU 48000000UL // PIC freq.; Set you Freq here
+#define Pre_Scaler 4 // define prescaler for Timer2 e.g. 1,4,16 !!!
+#define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value
+#warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !
+
+//Do not change lines below until you have a diffrent HW !! Example for 18F2550/18F4550
+//Setup macro for PWM used PWM module
+
+#if IRSND_OCx == IRSND_PIC_CCP2
+#define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2
+
+#define SetDCPWM(x) SetDCPWM2(x)
+#define ClosePWM ClosePWM2
+#define OpenPWM(x) OpenPWM2(x)
+#endif
+
+#if IRSND_OCx == IRSND_PIC_CCP1
+#define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1
+
+#define SetDCPWM(x) SetDCPWM1(x)
+#define ClosePWM ClosePWM1
+#define OpenPWM(x) OpenPWM1(x)
+#endif
+
+//Setup macro for OpenTimer with defined Pre_Scaler
+#if Pre_Scaler == 1
+#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_1);
+#elif Pre_Scaler == 4
+#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_4);
+#elif Pre_Scaler == 16
+#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_16);
+#else
+#error Incorrect value for Pre_Scaler
+#endif
+
+#endif //PIC_C18
+
+/*---------------------------------------------------------------------------------------------------------------------------------------------------
* Use Callbacks to indicate output signal or something else
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/