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authorukw2012-11-19 10:54:26 +0000
committerukw2012-11-19 10:54:26 +0000
commitafd1e690e5576608cc0754b348faed22f674a32a (patch)
treed14f76dd2b0fec09efdcbe69f44dd64cfbea486a /irmp.c
parent95eab03cca00d71c839a8f265ca0d9fbf3b41c44 (diff)
downloadirmp-afd1e690e5576608cc0754b348faed22f674a32a.zip
Version 2.3.3: port to Stellaris ARM Cortex M4
git-svn-id: svn://mikrocontroller.net/irmp@108 aeb2e35e-bfc4-4214-b83c-9e8de998ed28
Diffstat (limited to 'irmp.c')
-rw-r--r--irmp.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/irmp.c b/irmp.c
index ab3d59f..c8bc29f 100644
--- a/irmp.c
+++ b/irmp.c
@@ -3,7 +3,7 @@
*
* Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de
*
- * $Id: irmp.c,v 1.130 2012/11/06 10:19:41 fm Exp $
+ * $Id: irmp.c,v 1.131 2012/11/18 17:51:26 fm Exp $
*
* ATMEGA88 @ 8 MHz
*
@@ -1292,6 +1292,15 @@ irmp_init (void)
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
#endif
GPIO_Init(IRMP_PORT, &GPIO_InitStructure);
+#elif defined(STELLARIS_ARM_CORTEX_M4)
+ // Enable the GPIO port
+ ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);
+
+ // Set as an input
+ ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);
+ ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN,
+ GPIO_STRENGTH_2MA,
+ GPIO_PIN_TYPE_STD_WPU);
#else // AVR
IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup
IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input
@@ -3235,6 +3244,12 @@ irmp_ISR (void)
}
}
}
+
+#if defined(STELLARIS_ARM_CORTEX_M4)
+ // Clear the timer interrupt
+ TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);
+#endif
+
return (irmp_ir_detected);
}