diff options
| -rw-r--r-- | README.txt | 2 | ||||
| -rw-r--r-- | irmpextlog.c | 4 | ||||
| -rw-r--r-- | irsnd.c | 23 | ||||
| -rw-r--r-- | irsnd.h | 3 | ||||
| -rw-r--r-- | irsndconfig.h | 4 |
5 files changed, 20 insertions, 16 deletions
@@ -2,7 +2,7 @@ IRMP - Infrared Multi Protocol Decoder --------------------------------------
Version IRMP: 2.2.2 25.05.2012
-Version IRSND: 2.2.1 24.05.2012
+Version IRSND: 2.2.2 05.06.2012
Dokumentation:
diff --git a/irmpextlog.c b/irmpextlog.c index 482a18d..7637351 100644 --- a/irmpextlog.c +++ b/irmpextlog.c @@ -1,7 +1,7 @@ /*---------------------------------------------------------------------------------------------------------------------------------------------------
* irmpextlog.c - external logging
*
- * $Id: irmpextlog.c,v 1.2 2012/02/27 09:04:21 fm Exp $
+ * $Id: irmpextlog.c,v 1.3 2012/06/05 12:00:46 fm Exp $
*
* If you cannot use the internal UART logging routine, adapt the
* source below for your application. The following implementation
@@ -13,7 +13,7 @@ * (at your option) any later version.
*---------------------------------------------------------------------------------------------------------------------------------------------------
*/
-#include "irmpconfig.h"
+#include "irmp.h"
#if IRMP_EXT_LOGGING == 1
@@ -12,7 +12,7 @@ * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284
* ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P
*
- * $Id: irsnd.c,v 1.55 2012/05/24 06:55:11 fm Exp $
+ * $Id: irsnd.c,v 1.56 2012/06/05 12:00:46 fm Exp $
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -369,8 +369,9 @@ irsnd_on (void) # if defined(PIC_C18) // PIC C18
IRSND_PIN = 0; // output mode -> enable PWM outout pin (0=PWM on, 1=PWM off)
# elif defined (ARM_STM32) // STM32
- IRSND_TIMER->CCER |= (uint16_t)TIM_CCER_CC1E;
- TIM_Cmd(IRSND_TIMER, ENABLE); // TIMx enable counter
+ TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_OCMode_PWM1); // enable PWM as OC-mode
+ TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
+ TIM_Cmd(IRSND_TIMER, ENABLE); // enable counter
# else // AVR
# if IRSND_OCx == IRSND_OC2 // use OC2
TCCR2 |= (1<<COM20)|(1<<WGM21); // toggle OC2 on compare match, clear Timer 2 at compare match OCR2
@@ -416,8 +417,10 @@ irsnd_off (void) # if defined(PIC_C18) // PIC C18
IRSND_PIN = 1; //input mode -> disbale PWM output pin (0=PWM on, 1=PWM off)
# elif defined (ARM_STM32) // STM32
- IRSND_TIMER->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
- TIM_Cmd(IRSND_TIMER, DISABLE); // TIMx enable counter
+ TIM_Cmd(IRSND_TIMER, DISABLE); // disable counter
+ TIM_SelectOCxM(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_ForcedAction_InActive); // force output inactive
+ TIM_CCxCmd(IRSND_TIMER, IRSND_TIMER_CHANNEL, TIM_CCx_Enable); // enable OC-output (is being disabled in TIM_SelectOCxM())
+ TIM_SetCounter(IRSND_TIMER, 0); // reset counter value
# else //AVR
# if IRSND_OCx == IRSND_OC2 // use OC2
@@ -494,7 +497,7 @@ irsnd_set_freq (IRSND_FREQ_TYPE freq) freq = TimeBaseFreq/freq;
/* Set frequency */
- TIM_SetAutoreload(IRSND_TIMER, freq);
+ TIM_SetAutoreload(IRSND_TIMER, freq - 1);
/* Set duty cycle */
TIM_SetCompare1(IRSND_TIMER, (freq + 1) / 2);
# else // AVR
@@ -569,7 +572,7 @@ irsnd_init (void) # endif
/* Time base configuration */
- TIM_TimeBaseStructure.TIM_Period = 0; // will be initialized later
+ TIM_TimeBaseStructure.TIM_Period = -1; // set dummy value (don't set to 0), will be initialized later
TIM_TimeBaseStructure.TIM_Prescaler = 0;
TIM_TimeBaseStructure.TIM_ClockDivision = 0;
TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
@@ -578,15 +581,15 @@ irsnd_init (void) /* PWM1 Mode configuration */
TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;
TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;
- TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
+ TIM_OCInitStructure.TIM_Pulse = 0; // will be initialized later
TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;
TIM_OC1Init(IRSND_TIMER, &TIM_OCInitStructure);
/* Preload configuration */
- TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
TIM_ARRPreloadConfig(IRSND_TIMER, ENABLE);
+ TIM_OC1PreloadConfig(IRSND_TIMER, TIM_OCPreload_Enable);
- irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency
+ irsnd_set_freq (IRSND_FREQ_36_KHZ); // set default frequency
# else // AVR
IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low
IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output
@@ -3,7 +3,7 @@ *
* Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de
*
- * $Id: irsnd.h,v 1.12 2012/05/23 12:26:26 fm Exp $
+ * $Id: irsnd.h,v 1.13 2012/06/05 12:00:46 fm Exp $
*
* ATMEGA88 @ 8 MHz
*
@@ -37,6 +37,7 @@ # endif
# define IRSND_BIT CONCAT(GPIO_Pin_, IRSND_BIT_NUMBER)
# define IRSND_TIMER CONCAT(TIM, IRSND_TIMER_NUMBER)
+# define IRSND_TIMER_CHANNEL CONCAT(TIM_Channel_, IRSND_TIMER_CHANNEL_NUMBER)
# if ((IRSND_TIMER_NUMBER >= 2) && (IRSND_TIMER_NUMBER <= 5)) || ((IRSND_TIMER_NUMBER >= 12) && (IRSND_TIMER_NUMBER <= 14))
# define IRSND_TIMER_RCC CONCAT(RCC_APB1Periph_TIM, IRSND_TIMER_NUMBER)
# elif (IRSND_TIMER_NUMBER == 1) || ((IRSND_TIMER_NUMBER >= 8) && (IRSND_TIMER_NUMBER <= 11))
diff --git a/irsndconfig.h b/irsndconfig.h index 9c08c64..96037ce 100644 --- a/irsndconfig.h +++ b/irsndconfig.h @@ -5,7 +5,7 @@ *
* Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de
*
- * $Id: irsndconfig.h,v 1.37 2012/05/24 06:55:11 fm Exp $
+ * $Id: irsndconfig.h,v 1.38 2012/06/05 12:00:46 fm Exp $
*
* ATMEGA88 @ 8 MHz
*
@@ -110,7 +110,7 @@ # define IRSND_PORT_LETTER A
# define IRSND_BIT_NUMBER 6
# define IRSND_TIMER_NUMBER 10
-# define IRSND_TIMER_CHANNEL 1 // only channel 1 can be used at the moment, others won't work
+# define IRSND_TIMER_CHANNEL_NUMBER 1 // only channel 1 can be used at the moment, others won't work
/*---------------------------------------------------------------------------------------------------------------------------------------------------
* Other target system
|