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authorLeo C2014-09-05 12:46:19 +0200
committerLeo C2014-09-05 12:46:19 +0200
commit68e463ad5c3b0225dbf293ac609b3b7784fe0a0b (patch)
treef312d3e18be8c83656c60f4caaa7707bb4075185 /avr/main.c
parent54678798da1da8c4b53a9e201a098ef284b8498e (diff)
downloadz180-stamp-68e463ad5c3b0225dbf293ac609b3b7784fe0a0b.zip
Use timer2 as 1ms sytem clock (instead timer1).
Diffstat (limited to 'avr/main.c')
-rw-r--r--avr/main.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/avr/main.c b/avr/main.c
index e4c98b8..65622cc 100644
--- a/avr/main.c
+++ b/avr/main.c
@@ -77,8 +77,8 @@ void setup_avr(void)
MCUCR = _BV(JTD);
MCUCR = _BV(JTD);
- /* disable unused periphels */
- PRR0 = _BV(PRTIM2) | _BV(PRTIM0) | _BV(PRADC);
+ /* disable unused peripherals */
+ PRR0 = _BV(PRTIM0) | _BV(PRADC);
PRR1 = _BV(PRTIM5) | _BV(PRTIM4) | _BV(PRTIM3) |
_BV(PRUSART3) | _BV(PRUSART2) | _BV(PRUSART1);
@@ -92,9 +92,10 @@ void setup_avr(void)
/* Timer */
- OCR1A = F_CPU / 8 / 1000 - 1; // Timer1: 1000Hz interval (OC1A)
- TCCR1B = 0b00001010;
- TIMSK1 = _BV(OCIE1A); // Enable TC1.oca interrupt
+ OCR2A = F_CPU / 256 / 1000 - 1; /* Timer2: 1000Hz interval (OC2A) */
+ TCCR2A = (0b10 << WGM20); /* CTC Mode */
+ TCCR2B = (0b110 << CS20); /* Prescaler 256 */
+ TIMSK2 = _BV(OCIE2A); /* Enable TC2.oca interrupt */
}
static