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authorLeo C2014-10-20 13:19:34 +0200
committerLeo C2014-10-20 13:19:34 +0200
commitbad2d92d98f9990ee5ccf509c0eafe5b3af9f4dc (patch)
tree5f40467c58dc2aa6aad35c96575506a4784e0444 /avr/main.c
parent6dc26e92c20eedcfcba9e0b75a015a5b160748c5 (diff)
downloadz180-stamp-bad2d92d98f9990ee5ccf509c0eafe5b3af9f4dc.zip
Define fifos: msg_tx_fifo, msg_rx_fifo
Diffstat (limited to 'avr/main.c')
-rw-r--r--avr/main.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/avr/main.c b/avr/main.c
index ba8a672..2955630 100644
--- a/avr/main.c
+++ b/avr/main.c
@@ -61,6 +61,11 @@ void print_reset_reason(void)
#endif
+ISR(INT5_vect)
+{
+ Stat |= S_MSG_PENDING;
+}
+
static
void setup_avr(void)
{
@@ -99,6 +104,11 @@ void setup_avr(void)
OCR3A = F_CPU / 1000 - 1; /* Timer3: 1000Hz interval (OC3A) */
TCCR3B = (0b01<<WGM32)|(0b001<<CS30); /* CTC Mode, Prescaler 1 */
TIMSK3 = _BV(OCIE3A); /* Enable TC2.oca interrupt */
+
+ /* INT5 falling edge */
+ EICRB = (EICRB & ~(0b11 << ISC50)) | 0b10 << ISC50;
+ /* Enable INT5 */
+ EIMSK |= _BV(INT5);
}
static