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author | Leo C | 2015-05-01 20:43:26 +0200 |
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committer | Leo C | 2015-05-01 20:43:26 +0200 |
commit | 2fe441224da6410ec112322abf78524589b15498 (patch) | |
tree | 883a34a019fe85155f20a4eea1bbd435461f708c /z180/z180reg.inc | |
parent | 23f85294a1f0ba1900bd3210965201cf73c04d6c (diff) | |
download | z180-stamp-2fe441224da6410ec112322abf78524589b15498.zip |
Add polling driver for ASCI0/1
Diffstat (limited to 'z180/z180reg.inc')
-rw-r--r-- | z180/z180reg.inc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/z180/z180reg.inc b/z180/z180reg.inc index 5bbd088..271a446 100644 --- a/z180/z180reg.inc +++ b/z180/z180reg.inc @@ -76,6 +76,13 @@ tcr equ IOBASE+10h ;Timer Control Register asext0 equ IOBASE+12h ;ASCI Extension Control Register
asext1 equ IOBASE+13h ;ASCI Extension Control Register
+ b2m DCD0DIS,6 ;DCD0 Disable
+ b2m CTS0DIS,5 ;CTS0 Disable
+ b2m X1,4 ;CKA * 1 Clock/Samle Rate Divider
+ b2m BRGMOD,3 ;BRG Mode (Baud rate generator)
+ b2m BREAKEN,2 ;Break Enable
+ b2m BREAK,1 ;Break detected
+ b2m SENDBREAK,0 ;Send Break
tmdr1l equ IOBASE+14h ;Timer Data Register Channel 1
tmdr1h equ IOBASE+15h ;
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