21 files changed, 10698 insertions, 0 deletions

diff --git a/z180/Makefile b/z180/Makefile
new file mode 100644
index 0000000..159371f
--- /dev/null
+++ b/z180/Makefile
@@ -0,0 +1,127 @@
+
+
+SRC :=  init.180 ddtz.180
+SRC += console.180
+SRC += msgbuf-a.180 conbuf-a.180
+SRC += asci1-p.180
+SRC += romend.180
+
+INC := config.inc z180reg.inc z180.lib
+
+OBJ := $(SRC:.180=.rel)
+
+#CP/M emulator
+CPMEMU = zxcc
+
+#Location of CP/M binaries
+CPMBIN = /usr/local/lib/cpm/bin80
+
+#AS = $(CPMEMU) $(CPMBIN)/m80.com
+AS = $(CPMEMU) slr180.com
+LN = $(CPMEMU) slrnk+.com
+#LN = $(CPMEMU) ccpline.com
+
+AS_OPT := MFS
+
+AS_QUIET = 1
+LN_QUIET = 1
+
+#LNKCMD =
+LN_VERB = /V
+LN_PROG = 0
+LN_DATA = C000
+
+
+.suffixes:
+#.suffixes: .180 .rel
+
+.phony: all
+all: hdrom.c hdrom.h
+
+$(OBJ):  $(INC)
+
+hdrom.h: hdrom.c
+
+comma:= ,
+empty:=
+space:= $(empty) $(empty)
+
+ccpline = $(CPMEMU) $(1) -$(subst $(space),$(comma),$(strip $(2)))
+
+define cpm-asm =
+COMMAND="$(AS) -$(basename $<)/$(AS_OPT)"; \
+OUTPUT=$$(mktemp); echo $${COMMAND}; \
+$${COMMAND} > $${OUTPUT}; \
+grep -q '^ 0 Error(s) Detected' $${OUTPUT}; ERROR=$$? ; \
+if [ "$${ERROR}" != "0" ]; then cat $${OUTPUT}; rm -f $@; fi ; \
+exit $${ERROR}
+endef
+
+define cpm-link =
+  COMMAND="$(call ccpline, slrnk+, $(basename $@)/H/M /V \
+           /P:$(LN_PROG) /D:$(LN_DATA) $(basename $^) /E /Q)";\
+  OUTPUT=$$(mktemp); echo $${COMMAND};\
+  $${COMMAND} > $${OUTPUT};\
+  ERROR=0;\
+  cat $${OUTPUT};\
+  grep -q ' Duplicate Symbol ' $${OUTPUT} && ERROR=2; \
+  grep -q '\- Previously Defined' $${OUTPUT} && ERROR=2; \
+  [ "$${ERROR}" = "0" ] && grep -q '^ ** ' $${OUTPUT} && ERROR=1 ; \
+  [ "$${ERROR}" != "0" ] && rm -f $@; \
+  exit $${ERROR}
+endef
+
+#Use:   MAKESYM Filename[.ext][/PXXXX][/DXXXX][/CXXXX]
+#egrep '^[[:xdigit:]]{4}[[:space:]]+[[:xdigit:]]{4}[[:space:]]+D.*init\.rel' hdrom.map
+define cpm-mksym =
+COMMAND="$(CPMEMU) makesym -$^ -/P -D"; \
+OUTPUT=$$(mktemp); echo $${COMMAND}; \
+$${COMMAND} > $${OUTPUT}; \
+grep -q '^ 0 Error(s) Detected' $${OUTPUT}; ERROR=$$? ; \
+if [ "$${ERROR}" != "0" ]; then cat $${OUTPUT}; rm -f $@; fi ; \
+exit $${ERROR}
+endef
+
+hdrom.c: hdrom.hex
+	srec_cat -o $@ -c_array $(basename $<) -C_COMpressed -include $< -Intel
+
+hdrom.hex : $(OBJ)
+	@#$(cpm-link)
+	ld80 -o $@ -ms $(@:.hex=.map) -P $(LN_PROG) -D $(LN_DATA) $^
+
+%.rel %.lst: %.180
+	@$(cpm-asm)
+
+hdrom.map: hdrom.hex
+
+%.sym: hdrom.map %.lst
+	@$(cpm-mksym)
+
+.phony: clean realclean
+clean:
+	rm -f $(OBJ) $(OBJ:.rel=.lst) $(OBJ:.rel=.sym) hdrom.hex
+
+realclean: clean
+	rm -f *.prn *~ hdrom.map
+
+
+#==================================================================
+
+%.REL: %.MAC
+	@COMMAND="$(AS) =$<"; \
+	OUTPUT=$$(mktemp); echo $${COMMAND}; \
+	$${COMMAND} > $${OUTPUT}; \
+	grep -q 'No Fatal error(s).$$' $${OUTPUT}; ERROR=$$? ; \
+	if [ "$${ERROR}" != "0" ]; then cat $${OUTPUT}; rm $@; fi ; \
+	rm $${OUTPUT}; \
+	exit $${ERROR}
+
+
+%.PRN: %.MAC
+	@COMMAND="$(AS) ,$@=$<"; \
+	OUTPUT=$$(mktemp); echo $${COMMAND}; \
+	$${COMMAND} > $${OUTPUT}; \
+	grep -q 'No Fatal error(s).$$' $${OUTPUT}; ERROR=$$? ; \
+	if [ "$${ERROR}" != "0" ]; then cat $${OUTPUT}; fi ; \
+	rm $${OUTPUT}; \
+	exit $${ERROR}
diff --git a/z180/Tupfile b/z180/Tupfile
new file mode 100644
index 0000000..c7d79fb
--- /dev/null
+++ b/z180/Tupfile
@@ -0,0 +1,58 @@
+include_rules
+
+PROG	= hdrom
+CFBOOT	= cfboot
+
+SRC 	= init.180
+SRC	+= ddtz.180
+SRC	+= msgbuf-a.180 conbuf-a.180
+#SRC	+= bioscio.180 chario.180
+SRC	+= console.180
+SRC	+= asci-p.180
+SRC	+= romend.180
+
+
+AS_OPT	= MFS
+
+LN_PROG = 0
+LN_DATA = C000
+
+
+###############################################################################
+# Executables
+
+CPMEMU = zxcc
+
+#AS = $(CPMEMU) ccpline.com
+AS = $(CPMEMU) slr180.com
+
+
+###############################################################################
+
+!AS-plain = |> $(AS) -%B/$(AS_OPT) |> %B.rel | %B.lst
+
+!AS = |> ^ $(AS) -%B/$(AS_OPT)^ set +e; OUTPUT=\$(mktemp);\
+$(AS) -%B/$(AS_OPT) > ${OUTPUT};\
+grep -q '^ 0 Error(s) Detected' ${OUTPUT}; ERROR=$?;\
+[ "${ERROR}" != "0" ] && cat ${OUTPUT};\
+[ "${ERROR}" != "0" ] && rm -f %B.rel;\
+rm -f ${OUTPUT}; exit ${ERROR} \
+|> %B.rel | %B.lst
+
+#!LINK = |> ld80 -o %o -ms %O.map -P $(LN_PROG) -D $(LN_DATA) %f |> | %O.map
+!LINK = |> ld80 -o %o -ms %O.map -P $(LN_PROG) %f |> | %O.map
+
+#ifndef DEBUG
+
+: foreach $(SRC) |> !AS |> {objs}
+: {objs} |> !LINK |> $(PROG).hex
+: $(PROG).hex |> srec_cat -o %o -c_array %B -C_COMpressed -include %f -Intel |> $(PROG).c | $(PROG).h
+
+
+: $(CFBOOT).180 |> $(AS) -%B/HFS |> %B.hex | %B.lst
+: $(CFBOOT).hex |> srec_cat -o %o -c_array %B -C_COMpressed -include %f -Intel |> $(CFBOOT).c | $(CFBOOT).h
+
+#COMMAND="$(AS) -%B/$(AS_OPT)"; \
+
+
+#endif
diff --git a/z180/asci-p.180 b/z180/asci-p.180
new file mode 100644
index 0000000..956faf1
--- /dev/null
+++ b/z180/asci-p.180
@@ -0,0 +1,133 @@
+	page	200

+

+	extrn	ioiniml

+

+	global	as0init

+	global	as0ista,as0inp

+	global	as0osta,as0out

+	global	as1init

+	global	as1ista,as1inp

+	global	as1osta,as1out

+

+	include config.inc

+	include	z180reg.inc

+

+

+;-----------------------------------------------------

+;

+;

+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2

+;

+; TC = (f PHI / (32 * baudrate)) - 2

+;

+

+	cseg

+;

+; Init Serial I/O for console input and output (ASCI1)

+;

+	

+

+

+as0init:

+	ld	hl,initab0

+	jp	ioiniml

+

+as1init:

+	ld	hl,initab1

+	jp	ioiniml

+

+		

+	ld	a,M_MPBT 

+	out0	(cntlb1),a

+	ld	a,M_RE + M_TE + M_MOD2	;Rx/Tx enable 

+	out0	(cntla1),a

+	ld	a,M_RIE

+	out0	(stat1),a	;Enable rx interrupts

+

+	ret			;

+

+

+initab0:

+	db	1,stat0,0		;Disable rx/tx interrupts

+					;Enable baud rate generator

+	db	1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS

+	db	2,astc0l,low 28, high 28

+	db	1,cntlb0,M_MPBT		;No MP Mode, X16

+	db	1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1

+	db	0

+

+initab1:

+	db	1,stat1,0		;Disable rx/tx ints, disable CTS1

+	db	1,asext1,M_BRGMOD	;Enable baud rate generator

+	db	2,astc1l,low 3, high 3

+	db	1,cntlb1,M_MPBT		;No MP Mode, X16

+	db	1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1

+	db	0

+

+

+

+as0ista:

+	in0	a,(stat0)

+	and	M_RDRF

+	ret	z

+	or	0ffh

+	ret

+	

+as1ista:

+	in0	a,(stat1)

+	and	M_RDRF

+	ret	z

+	or	0ffh

+	ret

+	

+

+as0inp:

+	in0	a,(stat0)

+	rlca

+	jr	nc,as0inp

+	in0	a,rdr0

+	ret

+

+as1inp:

+	in0	a,(stat1)

+	rlca

+	jr	nc,as1inp

+	in0	a,rdr1

+	ret

+

+

+

+as0osta:

+	in0	a,(stat0)

+	and	M_TDRE

+	ret	z

+	or	0ffh

+	ret

+

+as1osta:

+	in0	a,(stat1)

+	and	M_TDRE

+	ret	z

+	or	0ffh

+	ret

+

+

+as0out:

+	in0	a,(stat0)

+	and	M_TDRE

+	jr	z,as0out

+	out0	(tdr0),c

+	ld	a,c

+	ret

+

+as1out:

+	in0	a,(stat1)

+	and	M_TDRE

+	jr	z,as1out

+	out0	(tdr1),c

+	ld	a,c

+	ret

+

+	end

+

+

diff --git a/z180/asci1-i.180 b/z180/asci1-i.180
new file mode 100644
index 0000000..15e121a
--- /dev/null
+++ b/z180/asci1-i.180
@@ -0,0 +1,256 @@
+	page	200

+

+

+	extrn	buf.init

+	extrn	isv_sw

+

+

+	global	ser.init

+	global	ser.ist,ser.in

+	global	ser.ost,ser.out

+

+;TODO: define a trampoline area somewhere in top ram.

+rtxisvjmp	equ	0FF60h	;momentan frei...

+

+	include config.inc

+	include	z180reg.inc

+

+

+;-----------------------------------------------------

+

+	dseg

+

+buf_start:

+	mkbuf	s1.rx_id, ser1.inbuf, s1.rx_len

+	mkbuf	s1.tx_id, ser1.outbuf, s1.tx_len

+buf_end:

+

+

+

+;-----------------------------------------------------

+

+	cseg

+;

+; Init Serial I/O for console input and output (ASCI1)

+;

+

+

+ser.init:

+;	ld	a,i

+;	push	af		;save IFF

+;	di

+

+	xor	a		;

+	out0	(stat1),a	;Disable rx/tx interrupts

+

+	ld hl,rxtx_src		;move rx and tx isv to common ram

+	ld de,rxtx_dst		;

+	ld bc,rxtx_src_e-rxtx_src ;

+	ldir			;

+

+	ld hl,rtxisvjmp		;rx/tx int vector

+	ld (ivtab + IV$ASCI1),hl;

+	ld a,0cdh		;

+	ld (rtxisvjmp),a	;

+	ld hl,isv_sw		;

+	ld (rtxisvjmp + 1),hl	;

+	ld hl,rxtxisv		;

+	ld (rtxisvjmp + 3),hl	;

+

+; ASCI1: 8N1, highest baudrate (56700), CTS disabled

+

+	ld	a,M_MPBT

+	out0	(cntlb1),a

+	ld	a,M_RE + M_TE + M_MOD2

+	out0	(cntla1),a

+	ld	a,M_RIE

+	out0	(stat1),a	;Enable rx interrupts

+

+	ld	ix,ser1.inbuf

+	ld	a,ser1.inbuf.mask

+	call	buf.init

+	ld	ix,ser1.outbuf

+	ld	a,ser1.outbuf.mask

+	call	buf.init

+

+;	pop	af

+;	ret	po

+;	ei

+	ret			;

+

+ser.ist:

+	push	ix

+	ld	ix,ser1.inbuf	;

+

+buf.empty:

+	ld	a,(ix+o.in_idx)	;

+	sub	(ix+o.out_idx)	;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+ser.in:

+	push	hl			;11

+	push	de			;11

+	ld	hl,ser1.inbuf-1		; 9	hl = &rx.out_idx

+	ld	a,(hl)			; 6	a = rx.out_idx

+	dec	hl			; 4	hl = &rx.in_idx

+	jr	bg.w1

+bg.wait:

+	halt

+bg.w1:

+	cp	(hl)			; 6	while (out_idx==in_idx)

+	jr	z,bg.wait		; 6 (/8)	;

+

+	ld	e,a			; 4

+	ld	d,0			; 6

+	inc	de

+	inc	de

+

+	ex	de,hl			; 3

+	add	hl,de			;10

+	ld	l,(hl)			; 6

+	ex	de,hl			; 3

+

+	inc	a			; 4

+	dec	hl			; 4

+	and	(hl)			; 6

+	inc	hl			; 4

+	inc	hl			; 4

+	ld	(hl),a			; 7

+

+	ld	a,e			; 4

+	pop	de			; 9

+	pop	hl			; 9

+	ret				; 9

+					;   153

+

+ser.ost:

+	push	ix

+	ld	ix,ser1.outbuf		;

+buf.full:

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+

+ser.out:

+	push	ix

+	ld	ix,ser1.outbuf		;

+buf.put:

+	push	hl			;

+	push	bc

+	push	ix

+	pop	hl

+	ld	a,c

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	add	hl,bc

+	ld	(hl),a

+

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	(ix+o.in_idx),a

+

+	di			;036f

+	in0	a,(stat1)	;0374

+	set	TIE,a		;0377

+	out0	(stat1),a	;0379

+	ei			;037c

+

+	ld	a,b

+	pop	bc

+	pop	hl

+	pop	ix

+	ret

+

+

+;------------------------------------------

+; ASCI 1 Transmit/Receive interupt routines

+; moved to common ram

+

+rxtx_src:

+	dseg

+rxtx_dst:				; (0c097h)  old

+

+rxtxisv:

+	inidat

+	in0 a,(stat1)			;receive flag set?

+	jp p,txisv			;

+

+	in0	d,(rdr1)		;todo: break detection

+	bit	FE,a			;framing error?

+	jr	nz,??ri_1

+

+	push	ix

+	ld	ix,ser1.inbuf		;

+	ld	hl,ser1.inbuf		;

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	add	hl,bc

+

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+	cp	(ix+o.out_idx)		;

+	jr	z,??ri_0

+	ld	(hl),d

+	ld	(ix+o.in_idx),a

+??ri_0:

+	pop	ix

+??ri_1:

+	in0	a,(cntla1)		;0705	c0c0

+	res	EFR,a			;0708

+	out0	(cntla1),a		;070a

+	ret

+

+	inidate

+

+txisv:

+	inidat

+	push	ix

+	ld	ix,ser1.outbuf		;

+

+	ld	a,(ix+o.out_idx)	;

+	cp	(ix+o.in_idx)		;

+	jr	z,??ti_2

+

+	ld	hl,ser1.outbuf		;

+	add	a,l

+	ld	l,a

+	jr	nc,??ti_1

+	inc	h

+??ti_1:

+	ld	l,(hl)

+	out0	(tdr1),l		;071b

+

+	ld	a,(ix+o.out_idx)	;

+	inc	a

+	and	(ix+o.mask)

+	ld	(ix+o.out_idx),a

+	jr	??ti_3

+??ti_2:

+	in0	a,(stat1)		;0730	disable tx-int

+	res	TIE,a			;0733

+	out0	(stat1),a		;0735

+??ti_3:

+	pop	ix

+	ret

+

+	inidate

+

+	cseg

+rxtx_src_e:

+

+

+	end

diff --git a/z180/bioscio.180 b/z180/bioscio.180
new file mode 100644
index 0000000..2d8e5e0
--- /dev/null
+++ b/z180/bioscio.180
@@ -0,0 +1,326 @@
+

+	.z80

+

+;		  Copyright (C), 1982

+;		 Digital Research, Inc

+;		     P.O. Box 579

+;		Pacific Grove, CA  93950

+

+;   This is the invariant portion of the modular BIOS and is

+;	distributed as source for informational purposes only.

+;	All desired modifications should be performed by

+;	adding or changing externally defined modules.

+;	This allows producing "standard" I/O modules that

+;	can be combined to support a particular system

+;	configuration.

+;

+;   Modified for faster character I/O by Udo Munk

+

+cr	equ	13

+lf	equ	10

+bell	equ	7

+ctlQ	equ	'Q'-'@'

+ctlS	equ	'S'-'@'

+

+	cseg			; GENCPM puts CSEG stuff in common memory

+

+	; variables in system data page

+

+;;	extrn	@covec,@civec,@aovec,@aivec,@lovec ; I/O redirection vectors

+				

+	; user defined character I/O routines

+

+	extrn	?ci,?co,?cist,?cost	; each take device in <B>

+	extrn	?cinit			; (re)initialize device in <C>

+	extrn	@ctbl			; physical character device table

+

+

+	include	modebaud.inc	; define mode bits

+

+

+	public	@covec,@civec,@aovec,@aivec,@lovec ; I/O redirection vectors

+	public	?const,?conin,?cono,?list,?auxo,?auxi

+	public	?lists,?conos,?auxis,?auxos,?dvtbl,charini

+

+

+@CIVEC:	dw	0		; Console Input Redirection

+				; Vector (word, r/w)

+@COVEC:	dw	0		; Console Output Redirection

+				; Vector (word, r/w)

+@AIVEC:	dw	0		; Auxiliary Input Redirection

+				; Vector (word, r/w)

+@AOVEC:	dw	0		; Auxiliary Output Redirection

+				; Vector (word, r/w)

+@LOVEC:	dw	0		; List Output Redirection

+				; Vector (word, r/w)

+

+

+charini:

+

+	ld	c,15		; initialize all 16 character devices

+c$init$loop:

+	push	bc

+	call	?cinit

+	pop	bc

+	dec	c

+	jp	p,c$init$loop

+

+;	ld	hl,1000000000000000b	; assign console to HOST

+	ld	hl,0010000000000000b	; assign console to ASCI1

+	ld	(@civec),hl

+	ld	(@covec),hl

+	ld	hl,0000000000000000b	; assign auxiliary to nothing

+	ld	(@aivec),hl

+	ld	(@aovec),hl

+	ld	hl,0000000000000000b	; assign printer to nothing

+	ld	(@lovec),hl

+	ret

+

+

+	; DEVTBL

+	;	Return address of character device table

+

+?dvtbl:

+devtbl:

+	ld	hl,@ctbl

+	ret

+

+

+	; CONOUT

+	;	Console Output. Send character in <C>

+	;			to all selected devices

+

+?cono:

+conout:

+	ld	hl,(@covec)	; fetch console output bit vector

+	jr	out$scan

+

+

+	; AUXOUT

+	;	Auxiliary Output. Send character in <C>

+	;			to all selected devices

+

+?auxo:

+auxout:

+	ld	hl,(@aovec)	; fetch aux output bit vector

+	jr	out$scan

+

+

+	; LIST

+	;	List Output. Send character in <C>

+	;			to all selected devices.

+

+?list:

+list:

+	ld	hl,(@lovec)	; fetch list output bit vector

+

+out$scan:

+	ld	b,0		; start with device 0

+co$next:

+	add	hl,hl		; shift out next bit

+	jr	nc,not$out$device

+	push	hl		; save the vector

+	push	bc		; save the count and character

+	call	?co		; if device selected, print it

+	pop	bc		; recover count and character

+	pop	hl		; recover the rest of the vector

+not$out$device:

+	inc	b		; next device number

+	ld	a,h

+	or	l		; see if any devices left

+	jr	nz,co$next	; and go find them...

+	ret

+

+

+	; CONOST

+	;	Console Output Status. Return true if

+	;		all selected console output devices

+	;		are ready.

+

+?conos:

+conost:

+	ld	hl,(@covec)	; get console output bit vector

+	jr	ost$scan

+

+

+	; AUXOST

+	;	Auxiliary Output Status. Return true if

+	;		all selected auxiliary output devices

+	;		are ready.

+

+?auxos:

+auxost:

+	ld	hl,(@aovec)	; get aux output bit vector

+	jr	ost$scan

+

+

+	; LISTST

+	;	List Output Status. Return true if

+	;		all selected list output devices

+	;		are ready.

+

+?lists:

+listst:

+	ld	hl,(@lovec)	; get list output bit vector

+

+ost$scan:

+	ld	b,0		; start with device 0

+cos$next:

+	add	hl,hl		; check next bit

+	push	hl		; save the vector

+	push	bc		; save the count

+	ld	a,0FFh		; assume device ready

+	call	c,coster	; check status for this device

+	pop	bc		; recover count

+	pop	hl		; recover bit vector

+	or	a		; see if device ready

+	ret	z		; if any not ready, return false

+	inc	b		; drop device number

+	ld	a,h

+	or	l		; see if any more selected devices

+	jr	nz,cos$next

+	or	0FFh		; all selected were ready, return true

+	ret

+

+coster:		; check for output device ready, including optional

+		;	xon/xoff support

+		;

+		;TODO: interrupt driven devices should xon/xoff handle

+		;	in isv

+

+	ld	l,b

+	ld	h,0		; make device code 16 bits

+	push	hl		; save it in stack

+	add	hl,hl

+	add	hl,hl

+	add	hl,hl		; create offset into device characteristics tbl

+	ld	de,@ctbl+6

+	add	hl,de		; make address of mode byte

+	ld	a,(hl)

+	and	mb$xon$xoff

+	pop	hl		; recover console number in <HL>

+	jp	z,?cost		; not a xon device, go get output status direct

+	ld	de,xofflist

+	add	hl,de		; make pointer to proper xon/xoff flag

+	call	cist1		; see if this keyboard has character

+	ld	a,(hl)

+	call	nz,ci1		; get flag or read key if any

+	cp	ctlq

+	jr	nz,not$q	; if its a ctl-Q,

+	ld	a,0FFh		;	set the flag ready

+not$q:

+	cp	ctls

+	jr	nz,not$s	; if its a ctl-S,

+	ld	a,00h		;	clear the flag

+not$s:

+	ld	(hl),a		; save the flag

+	call	cost1		; get the actual output status,

+	and	(hl)		; and mask with ctl-Q/ctl-S flag

+	ret			; return this as the status

+

+cist1:		; get input status with <BC> and <HL> saved

+	push	bc

+	push	hl

+	call	?cist

+	pop	hl

+	pop	bc

+	or	a

+	ret

+

+cost1:		; get output status, saving <BC> & <HL>

+	push	bc

+	push	hl

+	call	?cost

+	pop	hl

+	pop	bc

+	or	a

+	ret

+

+ci1:		; get input, saving <BC> & <HL>

+	push	bc

+	push	hl

+	call	?ci

+	pop	hl

+	pop	bc

+	ret

+

+

+	; AUXIST

+	;	Auxiliary Input Status. Return true if

+	;		any selected auxiliary input device

+	;		has an available character.

+?auxis:

+auxist:

+	ld	hl,(@aivec)	; get aux input bit vector

+	jr	ist$scan

+

+

+	; CONST

+	;	Console Input Status. Return true if

+	;		any selected console input device

+	;		has an available character.

+?const:

+const:

+	ld	hl,(@civec)	; get console input bit vector

+

+

+ist$scan:

+	ld	b,0		; start with device 0

+cis$next:

+	add	hl,hl		; check next bit

+	ld	a,0		; assume device not ready

+	call	c,cist1		; check status for this device

+	or	a

+	ret	nz		; if any ready, return true

+	inc	b		; next device number

+	ld	a,h

+	or	l		; see if any more selected devices

+	jr	nz,cis$next

+	xor	a		; all selected were not ready, return false

+	ret

+

+

+	; AUXIN

+	;	Auxiliary Input. Return character from first

+	;		ready auxiliary input device.

+?auxi:

+auxin:

+	ld	hl,(@aivec)

+	jr	in$scan

+

+

+	; CONIN

+	;	Console Input. Return character from first

+	;		ready console input device.

+?conin:

+conin:

+	ld	hl,(@civec)

+

+in$scan:

+	push	hl		; save bit vector

+	ld	b,0

+ci$next:

+	add	hl,hl		; shift out next bit

+	ld	a,0		; insure zero a (nonexistant device not ready).

+	call	c,cist1		; see if the device has a character

+	or	a

+	jr	nz,ci$rdy	; this device has a character

+	inc	b		; else, next device

+	ld	a,h

+	or	l		; see if any more devices

+	jr	nz,ci$next	; go look at them

+	pop	hl		; recover bit vector

+	jr	in$scan		; loop til we find a character

+ci$rdy:

+	pop	hl		; discard extra stack

+	jp	?ci

+

+

+

+xofflist:

+	db 	-1,-1,-1,-1,-1,-1,-1,-1	; ctl-s clears to zero

+	db	-1,-1,-1,-1,-1,-1,-1,-1

+

+

+	end

+

diff --git a/z180/cfboot.180 b/z180/cfboot.180
new file mode 100644
index 0000000..083aa4c
--- /dev/null
+++ b/z180/cfboot.180
@@ -0,0 +1,352 @@
+	TITLE 'CF cold boot loader'

+

+    ; Port Address Equates

+

+	include config.inc

+	include z180reg.inc

+

+    ; IDE Task File Register Definitions

+

+IDEDat	equ	IDEBASE+0	; Data Register

+IDEErr	equ	IDEBASE+1	; Error Register

+IDEFeat	equ	IDEBASE+1	; Feature Register

+IDESCnt	equ	IDEBASE+2	; Sector Count

+IDESNum	equ	IDEBASE+3	; Sector Number

+IDECLo	equ	IDEBASE+4	; Cylinder Low

+IDECHi	equ	IDEBASE+5	; Cylinder High

+IDESDH	equ	IDEBASE+6	; Drive and Head

+IDECmd	equ	IDEBASE+7	; Command / Status

+

+    ; IDE Hard disk commands:

+

+CmdNOP	equ	00h		; NOP Command

+CmdHome	equ	10h		; Recalibrate

+CmdRd	equ	20h		; Read Sector

+CmdWr	equ	30h		; Write Sector

+CmdId	equ	0ECh		; Read ID

+CmdSF	equ	0EFh		; Set Feature

+

+    ; Partition Table Structures

+

+PTYPE	equ	4

+PSTART	equ	8

+PSIZE	equ	12

+

+    ; Partition table id

+    ; (see http://www.win.tue.nl/~aeb/partitions/partition_types-1.html)

+

+PARTID1_FAT16	equ	00EH

+PARTID2_FAT16	equ	006H

+PARTID_CPM	equ	052H

+

+

+DEBUG		equ	false		; not used

+DO_WAIT_NBSY	equ	false

+RUN_TPA		equ	false

+

+   if RUN_TPA

+base		equ	0100h

+   else

+base		equ	0

+   endif

+

+;-------------------------------------------------------------------------------

+

+	aseg

+

+	org	base

+

+	jr	start

+

+para:		equ	$

+loadaddr:	dw	base+100h

+sec_start:	db	0

+sec_cnt:	db	7

+part_id:	db	PARTID_CPM

+timeout:	dw	10000

+stages:		db	number_of_stages

+done:		db	0

+result:		db	0

+ide_result:	db	0,0

+

+o_part_id	equ	part_id - para

+o_stages	equ	stages - para

+o_done		equ	done    - para

+o_result	equ	result  - para

+

+;-------------------------------------------------------------------------------

+

+start:

+	ld	sp,stack

+	pop	ix

+	pop	de

+loop:

+	dec	(ix+o_stages)

+	jp	m,stop

+

+	pop	hl

+	push	de

+	push	hl

+	exx

+	ld	hl,(loadaddr)

+	ret

+continue:

+	exx

+	ld	(ix+o_result),a

+	or	a

+	jr	z,loop

+stop:

+	in	a,(Idecmd) 	;2

+	ld	l,a     	;1

+	in	a,(IdeErr) 	;2

+	ld	h,a     	;1

+	ld	(ide_result),hl	;3 	9

+	dec	(ix+o_done)

+	halt

+

+;-------------------------------------------------------------------------------

+

+chk_to:

+	xor	a	;

+to_l:

+	dec	a

+	ex	(sp),hl

+	ex	(sp),hl

+	jr	nz,to_l	;

+	dec	hl	; 4

+	ld	a,h	; 4

+	or	l	; 4

+	ret	nz	; 10/5

+	ccf		; 3

+	ret		; 9

+

+   if base = 0

+     if 044h-$ > 0

+	rept	044h-$

+	db	0

+	endm

+     endif

+   endif

+

+part_start:

+;	dw	0

+;	dw	0	; part_start is 4 byte long, but stack gets free

+stack:

+	dw	para

+	dw	continue

+stage_table:

+   if	DO_WAIT_NBSY

+	dw	s_wait_not_bsy

+   endif

+	dw	s_wait_rdy

+	dw	s_check_io

+	dw	s_set_xfermode8

+	dw	s_read_parttbl

+	dw	s_check_signature

+	dw	s_find_partition

+	dw	s_read_sectors

+	dw	s_go

+number_of_stages equ ($-stage_table)/2

+

+   if	DO_WAIT_NBSY

+;-------------------------------------------------------------------------------

+; Wait while device is busy with time out

+;     return:

+;	 a = 0 if ok

+;	 a = ff in timeout

+;     destroys hl

+

+s_wait_not_bsy:

+	ld	hl,(timeout)

+wnb_l:

+	in	a,(IdeCmd)

+	rla

+	jr	nc,wnb_e

+	call	chk_to

+	jr	nc,wnb_l

+wnb_e:

+	sbc	a,a

+	ret

+   endif

+

+;-------------------------------------------------------------------------------

+; Wait for ready signal with time out

+;     return:

+;	 a = 0 if ok

+;	 a = ff in timeout

+;     destroys hl

+

+s_wait_rdy:

+wait_rdy_to:

+	ld	hl,(timeout)

+wrdy_l:

+	in	a,(IdeCmd)

+	xor	01000000b

+	and	11000000b	; clears carry

+	jr	z,wrdy_e

+	call	chk_to

+	jr	nc,wrdy_l

+wrdy_e:

+	sbc	a,a

+	ret

+

+;-------------------------------------------------------------------------------

+

+s_check_io:

+	ld	a,0E0h		; unit 0, lba mode

+	out	(IdeSDH),a	;

+

+	xor	a		; execute NOP command

+	call	do_ide_cmd	; should return error

+	ret	c

+	xor	1

+	ret	nz

+	ld	a,CmdHome	; execute RECALIBRATE command

+	jr	do_ide_cmd

+

+;-------------------------------------------------------------------------------

+

+s_set_xfermode8:

+	ld	a,1		; Enable 8-bit data transfer.

+	out	(IDEFeat),a

+	ld	a,CmdSF		; Set feature command

+

+;	fall thru

+;	jr	do_ide_cmd

+

+;-------------------------------------------------------------------------------

+

+do_ide_cmd:

+	out	(IdeCmd),a	;

+	call	wait_rdy_to

+	ret	c

+	in	a,(IdeCmd)

+	and	10001001b	;

+	ret

+

+;-------------------------------------------------------------------------------

+

+s_check_signature:

+;	ld	hl,(loadaddr)

+	inc	h		; Point to last byte of MBR

+	inc	h

+	dec	hl

+	ld	a,0aah

+	cp	(hl)			; Test, if it has a valid MBR

+	ret	nz

+	dec	hl

+	cpl				; a=055h

+	sub	(hl)			;

+	ret				; should be 0

+

+;-------------------------------------------------------------------------------

+; Read partition table (lbr)

+

+s_read_parttbl:

+;	ld	hl,(loadaddr)

+	ld	bc,1*256 + 0	; sector 0 (lba)

+	ld	e,c

+	ld	d,c

+	jr	read_sectors

+

+;-------------------------------------------------------------------------------

+; Find CP/M paartition

+; 	Look for first CP/M partition

+;	and save partition offset

+

+s_find_partition:

+;	ld	hl,(loadaddr)

+	ld	de,512-2-64+PTYPE	; Point to  partition type of first first partition table entry

+	add	hl,de

+	ld	de,16

+	ld	b,4			; Max # of partition table entries

+ploop:

+	ld	a,(ix+o_part_id)

+	sub	(HL)			; Test for CP/M Partition

+	jr	nz,pnext

+	ld	bc,4

+	add	hl,bc			; Point to partition start (lba)

+	ld	de,part_start

+	ldir

+	ret				;a=0

+pnext:

+	add	hl,de

+	djnz	ploop

+	ret

+

+

+;-------------------------------------------------------------------------------

+; Read sec_count sectors, beginning at part_start+sec_start

+

+s_read_sectors:

+;	ld	hl,(loadaddr)

+	push	hl

+	ld	bc,(sec_start)		;b=sec_count, c=sec_start

+	ld	e,c

+	ld	d,0

+	ld	hl,(part_start)		;add partition offset to sector number

+	add	hl,de

+	ld	a,(part_start+2)

+	adc	a,d			;d=0

+	ld	c,a

+	ex	de,hl

+	pop	hl

+

+;	fall thru

+

+;-------------------------------------------------------------------------------

+; Read a number of sectors

+;	hl:  memory address

+; 	cde: sector number (24 bit)

+;	b:   sector count

+

+read_sectors:

+	ld	a,e		; lba 0..7

+	out	(IdeSNum),a

+	ld	a,d		; lba 0..7

+	out	(IdeClo),a

+	ld	a,c		; lba 0..7

+	out	(IdeCHi),a

+	ld	a,b		; number of sectors to read

+	out	(IdeSCnt),a	; set sector count

+

+	ld	a,CmdRd

+	out	(IdeCmd),a	; command: read sector data

+	ld	d,b

+	ld	bc,IdeDat	; I/O address

+wdrq:

+	in	a,(IdeCmd)	; wait for DRQ to become active

+	bit	3,a

+	jr	z,wdrq

+	inir			; read 512 data bytes (2 x 256)

+	inir

+wnb:				; wait while busy

+	in	a,(IdeCmd)	;

+	rlca

+	jr	c,wnb

+	rrca			; restore status

+	bit	0,a

+	jr	nz,err_out

+	dec	d

+	jr	nz,wdrq

+err_out:

+	and	10001001b	; Busy, DRQ, or Error?

+	ret			; return 0, if everything is ok

+

+;-------------------------------------------------------------------------------

+

+s_go:

+;	ld	hl,(loadaddr)

+	dec	(ix+o_done)

+	jp	(hl)

+

+

+;-------------------------------------------------------------------------------

+   if base = 0

+     if $ > 100h

+	.printx Error: Program to large to fit in page 0!

+	db "Stop

+     endif

+   endif

+

+	end

diff --git a/z180/chario.180 b/z180/chario.180
new file mode 100644
index 0000000..4d37b89
--- /dev/null
+++ b/z180/chario.180
@@ -0,0 +1,113 @@
+	page	255

+	.z80

+

+

+;	CP/M 3	compatible character i/o

+

+	public	?cinit,?ci,?co,?cist,?cost

+	public	@ctbl

+

+	extrn	ff.init,ff.i.st,ff.in,ff.o.st,ff.out

+	extrn	as0init,as0ista,as0inp,as0osta,as0out

+	extrn	as1init,as1ista,as1inp,as1osta,as1out

+

+	include config.inc

+	include	z180reg.inc

+	include modebaud.inc	; define mode bits and baud eqautes

+

+

+max$device	equ 3

+

+	cseg

+

+; c = device

+

+?cinit:				; init devices

+	ld	b,c

+	call	vector$io

+	dw	ff.init

+	dw	as0init

+	dw	as1init

+	dw	rret

+

+; b = device, c = output char, a = input char

+

+?ci:				; character input

+	call	vector$io

+	dw	ff.in

+	dw	as0inp

+	dw	as1inp

+	dw	null$input

+

+?cist:				; character input status

+	call	vector$io

+	dw	ff.i.st

+	dw	as0ista

+	dw	as1ista

+	dw	null$status

+

+?co:				; character output

+	call	vector$io

+	dw	ff.out

+	dw	as0out

+	dw	as1out

+	dw	rret

+

+?cost:				; character output status

+	call	vector$io

+	dw	ff.o.st

+	dw	as0osta

+	dw	as1osta

+	dw	ret$true

+

+vector$io:

+	ld	a,max$device

+	ld	e,b

+vector:

+	pop	hl

+	ld	d,0

+	cp	e

+	jr	nc,exist

+	ld	e,a		; use null device if a >= max$device

+exist:	add	hl,de

+	add	hl,de

+	ld	a,(hl)

+	inc	hl

+	ld	h,(hl)

+	ld	l,a

+	jp	(hl)

+

+

+null$input:

+	ld	a,1Ah

+rret:

+	ret

+ret$true:

+	or	0FFh

+	ret

+

+null$status:

+	xor	a

+	ret

+

+;--------------------------------------------------------------

+

+

+@ctbl:

+	db	'HOST  '	; device 0

+	db	mb$in$out

+	db	baud$none

+

+	db	'ASCI0 '	; device 1

+	db	mb$in$out+mb$serial+mb$soft$baud

+ser0$baud:

+	db	baud$19200

+

+	db	'ASCI1 '	; device 2

+	db	mb$in$out+mb$serial+mb$soft$baud

+ser1$baud:

+	db	baud$19200

+

+	db	0		; table terminator

+

+	end

diff --git a/z180/conbuf-a.180 b/z180/conbuf-a.180
new file mode 100644
index 0000000..f69b86d
--- /dev/null
+++ b/z180/conbuf-a.180
@@ -0,0 +1,163 @@
+	page	255

+	.z80

+

+;

+; FIFO channels for communication with avr

+;

+	global	ff.init,ff.in,ff.out,ff.i.st,ff.o.st

+

+	extrn	bufinit

+

+	include config.inc

+	if CPU_Z180

+	include	z180reg.inc

+	endif

+

+

+;--------------------------------------------------------------

+

+	dseg

+

+

+	mkbuf	ci.fifo_id, ci.fifo, ci.fifo_len

+	mkbuf	co.fifo_id, co.fifo, co.fifo_len

+

+

+;--------------------------------------------------------------

+

+	cseg

+

+; Init Serial I/O for console input and output

+;

+

+ff.init:

+	ld	ix,ci.fifo

+	call	bufinit

+	ld	ix,co.fifo

+	jp	bufinit

+

+

+ff.i.st:

+	push	ix

+	ld	ix,ci.fifo		;

+

+buf.empty:

+	ld	a,(ix+o.in_idx)		;

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+

+ff.in:

+	push	ix

+	ld	ix,ci.fifo		;

+

+buf.get:

+	ld	a,(ix+o.out_idx)	;

+bg.wait:

+	cp	(ix+o.in_idx)		;

+	jr	z,bg.wait

+

+	push	hl			;

+	push	ix

+	pop	hl

+	add	a,l

+	ld	l,a

+	jr	nc,bg.nc

+	inc	h

+bg.nc:

+	ld	l,(hl)

+

+	ld	a,(ix+o.out_idx)	;

+	inc	a

+	and	(ix+o.mask)

+	ld	(ix+o.out_idx),a

+

+	ld	a,l

+	pop	hl

+	pop	ix

+	ret

+

+

+ff.o.st:

+	push	ix

+	ld	ix,co.fifo		;

+

+buf.full:

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+

+	if 1

+ff.out:

+	push	ix			;15

+	ld	ix,co.fifo		;14

+

+buf.put:

+	push	hl			;11

+	push	bc			;11

+	push	ix			;15

+	pop	hl			;10

+	ld	a,c			;4

+	ld	c,(ix+o.in_idx)		;19

+	ld	b,0			;7

+	add	hl,bc			;11

+	ld	(hl),a			;7

+	ld	b,a			;4

+

+	ld	a,c			;4

+	inc	a			;4

+	and	(ix+o.mask)		;19

+bp.wait:

+	cp	(ix+o.out_idx)		;19

+	jr	z,bp.wait		;12/7

+	ld	(ix+o.in_idx),a		;19

+

+	out	(AVRINT6),a		;11

+	ld	a,b			;4

+	pop	bc			;10

+	pop	hl			;10

+	pop	ix			;14

+	ret				;10

+

+	else

+

+ff.out:

+	push	ix			;15

+	ld	ix,co.fifo		;14

+

+buf.put:

+	push	hl			;11

+	push	ix			;15

+	pop	hl			;10

+	ld	a,(ix+o.in_idx)		;19

+	add	a,l			;4

+	ld	l,a			;4

+	jr	nc,bp.1			;12/7

+	inc	l			;4

+	ld	(hl),c			;7

+	ld	a,(ix+o.in_idx)		;19

+	inc	a			;4

+	and	(ix+o.mask)		;19

+bp.wait:

+	cp	(ix+o.out_idx)		;19

+	jr	z,bp.wait		;12/7

+	ld	(ix+o.in_idx),a		;19

+

+	out	(AVRINT6),a		;11

+	ld	a,c			;4

+	pop	hl			;10

+	pop	ix			;14

+	ret				;10		|

+

+	endif

+

+	end

diff --git a/z180/config.inc b/z180/config.inc
new file mode 100644
index 0000000..bea6e05
--- /dev/null
+++ b/z180/config.inc
@@ -0,0 +1,220 @@
+

+FALSE	equ	0

+TRUE	equ	NOT FALSE

+

+

+banked	equ	true

+

+;-----------------------------------------------------

+; CPU and BANKING types

+

+

+CPU_Z180	equ	TRUE

+CPU_Z80		equ	FALSE

+

+ROMSYS		equ	FALSE

+

+AVRCLK		equ	18432		;[KHz]

+

+    if CPU_Z180

+

+;-----------------------------------------------------

+;FOSC		equ	AVRCLK/2	;Oscillator frequency [KHz]

+;PHI		equ	FOSC*2		;CPU frequency (clock doubler enabled)

+

+;----------------------------------------------------------------------

+; Baudrate Generator for x16 clock mode:

+; TC = (f PHI / (32 * baudrate)) - 2

+;

+;     PHI [MHz]: 9.216 18.432

+;     baudrate     TC     TC

+;     ----------------------

+;      115200	    -      3

+;	57600	    3      8

+;	38400       -     13

+;	19200	   13     28

+;	 9600	   28     58

+

+

+;-----------------------------------------------------

+; Programmable Reload Timer (PRT)

+

+PRT_PRE		equ	20		;PRT prescaler

+

+;-----------------------------------------------------

+; MMU

+

+COMMON_SIZE	equ	4*1024		;Common Area size in bytes

+					;must be multiple of 4K

+if (COMMON_SIZE mod 1000h)

+	.printx COMMON_SIZE not multiple of 4K!

+	end	;stop assembly

+endif

+CMN_SIZE	equ	COMMON_SIZE/1000h		;4K units

+BNK_SIZE	equ	64/4 - CMN_SIZE			;bank size (4K units)

+BANKS		equ	(512/4 - CMN_SIZE)/BNK_SIZE	;max nr. of banks

+

+; Logical address space, CBAR values

+

+CA		equ	10h - CMN_SIZE		;common area start (64K - common size)

+BA		equ	0			;banked area start

+

+   if 0

+

+SYS$CBR		equ	0

+SYS$CBAR	equ	CA*16 + CA	;CBAR in system mode

+USR$CBAR	equ	CA*16 + BA	;CBAR in user mode (CP/M)

+

+   endif

+   if 1

+

+SYS$CBR		equ	BNK_SIZE

+SYS$CBAR	equ	CA*16 + CA	;CBAR in system mode

+USR$CBAR	equ	CA*16 + BA	;CBAR in user mode (CP/M)

+

+   endif

+

+

+;-----------------------------------------------------

+

+CREFSH		equ	0		;Refresh rate register (disable refresh)

+CWAITIO		equ	3 shl IWI0	;Max I/O Wait States, 0 Memory Wait States

+PHI_X2		equ	0		;set to M_X2CM to enable the clock doubler

+

+    endif 		;CPU_Z180

+    if	CPU_Z80

+

+PHI		equ	AVRCLK/5	;CPU frequency [KHz]

+BAUDCLCK	equ	AVRCLK/10	;Baudrate clock [KHz]

+;BDCLK16		equ

+

+SIOAD	EQU	0bch

+SIOAC	EQU	0bdh

+SIOBD	EQU	0beh

+SIOBC	EQU	0bfh

+

+CTC0	EQU	0f4h

+CTC1	EQU	0f5h

+CTC2	EQU	0f6h

+CTC3	EQU	0f7h

+

+;

+; Init Serial I/O for console input and output (SIO-A)

+;

+; Baudrate clock: 1843200 Hz (Bus connector pin A17)

+;

+; Baudrate   Divider	SIO	CTC

+; ---------------------------------

+; 115200	  16	 16	  1

+;  57600	  32	 16	  2

+;  38400	  48	 16	  3

+;  19200	  96	 16	  6

+;   9600	 192	 16	 12

+;   4800	 384	 16	 24

+;   2400	 768	 16	 48

+;   1200	1536	 16	 96

+;    600	3072	 16	192

+;    300	6144	 64	 92

+

+    endif	; CPU_Z80

+

+    if	ROMSYS

+c$rom		equ	0a5h

+ROM_EN		equ	0C0h

+ROM_DIS		equ	ROMEN+1

+     if CPU_Z180

+CWAITROM 	equ	2 shl MWI0

+     endif

+    endif

+

+

+DDTZRSTVEC 	equ	030h		;DDTZ Restart vector (breakpoints)

+

+INIDONE		equ	03Fh		;CP/M skip hw init, if this address

+INIDONEVAL	equ	080h		;    is set to this value.

+

+mtx.fifo_len	equ	64		;Message transfer fifos

+mtx.fifo_id	equ	0		;    This *must* have #0

+mrx.fifo_len	equ	64

+mrx.fifo_id	equ	1

+

+ci.fifo_len	equ	32		;AVRCON (USB0) Character I/O via AVR

+ci.fifo_id	equ	2

+co.fifo_len	equ	32

+co.fifo_id	equ	3

+

+s0.rx_len	equ	128		;Serial 0 (ASCI0) buffers

+s0.rx_id	equ	4		;

+s0.tx_len	equ	128		;

+s0.tx_id	equ	5		;

+

+s1.rx_len	equ	128		;Serial 1 (ASCI1) buffers

+s1.rx_id	equ	6		;

+s1.tx_len	equ	128		;

+s1.tx_id	equ	7		;

+

+AVRINT5		equ	4Fh

+AVRINT6		equ	5Fh

+;PMSG		equ	80h

+

+IDEBASE		equ	60h

+

+;-----------------------------------------------------

+; Definition of (logical) top 2 memory pages

+

+sysram_start	equ	0FE00h

+bs$stack$size	equ	80

+

+isvsw_loc	equ	0FEE0h

+

+ivtab		equ	0ffc0h		;int vector table

+iv2tab		equ	ivtab + 2*9

+

+

+

+;-----------------------------------------------------

+

+o.id		equ	-4

+o.mask		equ	-3

+o.in_idx	equ	-2

+o.out_idx	equ	-1

+

+	.lall

+

+mkbuf	macro	id,name,size

+  if ((size AND (size-1)) NE 0) OR (size GT 256)

+    .printx Error: buffer ^size must be power of 2 and in range 0..256!

+    name&.mask equ ;wrong size error

+  else

+    db id

+    db size-1

+    ds 2

+    name:: ds size

+    name&.mask equ low (size-1)

+    if size ne 0

+      name&.end equ $-1

+      name&.len equ size

+      name&.id equ id

+    endif

+  endif

+endm

+

+;-----------------------------------------------------

+

+inidat	macro

+	cseg

+??ps.a	defl	$

+	endm

+

+inidate	macro

+??ps.len defl	$ - ??ps.a

+	dseg

+	ds	??ps.len

+	endm

+

+;-----------------------------------------------------

+

+b0call	macro	address

+	call	_b0call

+	dw	address

+	endm

diff --git a/z180/console.180 b/z180/console.180
new file mode 100644
index 0000000..1241d5a
--- /dev/null
+++ b/z180/console.180
@@ -0,0 +1,137 @@
+	;page	255

+	.z80

+	

+

+; iobyte:

+;		0 = console on AVR-System

+;		1 = console on SIO/ASCI

+

+

+	extrn	iobyte

+	extrn	ff.init,ff.i.st,ff.in

+	extrn	ff.o.st,ff.out

+    if CPU_Z180

+	extrn	as0init,as0ista,as0inp,as0osta,as0out

+	extrn	as1init,as1ista,as1inp,as1osta,as1out

+    else

+	extrn	ser.init,ser.ist,ser.in,ser.ost,ser.out

+    endif

+	

+	public	charini

+	public	?const,?conin

+	public	?conos,?cono

+

+	include config.inc

+    if CPU_Z180

+	include	z180reg.inc

+    endif

+

+	cseg

+

+    if CPU_Z180

+charini:

+	call	ff.init

+	call	as0init

+	jp	as1init

+

+?const:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.i.st

+	dec	a

+	jp	z,as0ista

+	dec	a

+	jp	z,as1ista

+	jr	nullstatus

+

+?conin:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.in

+	dec	a

+	jp	z,as0inp

+	dec	a

+	jp	z,as1inp

+	jr	nullinput

+

+?conos:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.o.st

+	dec	a

+	jp	z,as0osta

+	dec	a

+	jp	z,as1osta

+	jr	rettrue

+

+?cono:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.out

+	dec	a

+	jp	z,as0out

+	dec	a

+	jp	z,as1out

+	jr	nulloutput

+

+    else

+

+charini:

+	call	ff.init

+	ld	c,0

+	call	ser.init

+	ld	c,1

+	jp	ser.init

+

+?const:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.i.st

+	dec	a

+	ld	b,a

+	jp	ser.ist

+

+?conin:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.in

+	dec	a

+	ld	b,a

+	jp	ser.in

+

+?conos:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.o.st

+	dec	a

+	ld	b,a

+	jp	ser.ost

+

+?cono:

+	ld	a,(iobyte)

+	and	03h

+	jp	z,ff.out

+	dec	a

+	ld	b,a

+	jp	ser.out

+    endif

+

+

+nullinput:

+	ld	a,1Ah

+	ret

+

+nulloutput:

+	ld	a,c

+	ret

+

+rettrue:

+	or	0FFh

+	ret

+

+nullstatus:

+	xor	a

+	ret

+

+	end

+

diff --git a/z180/ddtz.180 b/z180/ddtz.180
new file mode 100644
index 0000000..d18330c
--- /dev/null
+++ b/z180/ddtz.180
@@ -0,0 +1,6062 @@
+	page	255

+	.z80

+

+	extrn	?const,?conin,?cono

+	extrn	getiff

+	extrn	selbnk,@cbnk

+

+	global	ddtz,bpent

+	global	$stack

+

+

+	include config.inc

+	if CPU_Z180

+	include	z180reg.inc

+	include z180.lib

+	endif

+

+BS	equ	08h

+TAB	equ	09h

+CR	equ	0dh

+LF	equ	0ah

+DEL	equ	7fh

+CNTRX	equ	'X'-'@'

+

+TPA	equ	100h

+TOPRAM	equ	0f000h

+

+

+MEMDUMP_CNT	equ	16		;mem dump bytes per line

+BP_CNT 		equ	12		;number of breakbpoints

+

+

+;--------------------------------------------------

+;

+

+; copy code to common memory and execute it there

+comst	macro

+	call	?excom

+	ds	1

+?lcs	defl	$

+	endm

+

+; mark end of common code snippet

+comend	macro

+?lce	defl	$

+?lclen	defl	?lce-?lcs

+	org	?lcs-1

+	db	?lclen

+	org	?lce

+	ifndef	?lcmax

+?lcmax	defl	0

+	endif

+	if	?lclen gt ?lcmax

+?lcmax	defl	?lclen

+	endif

+	endm

+

+

+

+

+	cseg

+

+;----------------------------------------------------------

+

+MSG:

+	DB	'DDT/Z - HD64180  (ROM)'

+	DB	CR,LF,0

+

+HLPMSG:

+	DB 'DDT/Z180 (ROM) Commands:',CR,LF

+	DB '> @                             examine/substitute the displacement register @',CR,LF

+	DB '> A [address]                   Assemble',CR,LF

+	DB '> B[X]                          display [or clear] all Breakpoints',CR,LF

+	DB '  B breakp [:count] [breakp..]  set Breakpoints',CR,LF

+	DB '  BX address [address..]        clear Breakpoints',CR,LF

+	DB '>>C[N][J] [count]               trace over Calls [No list] [Jumps only]',CR,LF

+	DB '  C[N][J] W|U expression        trace over Calls While|Until ...',CR,LF

+	DB '>>D [startadr] [endadr]         Display memory in hex and ascii',CR,LF

+	DB '> G [startadr] [;breakp..]      Go [to start] [temporary breakpoints]',CR,LF

+	DB '> H [expression [expression]]   compute expressions / show High/max load adr.',CR,LF

+	DB '>>I [port]                      Input a byte from port',CR,LF

+	DB '>>L [startadr] [endadr]         List disassembled code',CR,LF

+	DB '> M[V] startadr endadr destadr  Move memory [and verify]',CR,LF

+	DB '>>O [byte] [port]               Output a byte to port',CR,LF

+	DB '> Q[J] startadr endadr bytes    Qery memory for byte string [Justified]',CR,LF

+	DB '> R [displacement]              Read intel hex from console [add displacemt]',CR,LF

+	DB '> S address                     Substitute memory',CR,LF

+	DB '>>T[N][J] [count]               Trace [No list] [Jumps only] [count steps]',CR,LF

+	DB '  T[N][J] W|U expression        Trace While|Until expression',CR,LF

+	DB '> V startadr endadr destadr     Verify (compare) two memory areas',CR,LF

+	DB '> X[register]                   eXamine [and substitute] registers',CR,LF

+	DB '> Y[0..9]                       eXamine [and substitute] Y variables',CR,LF

+	DB '> Z startadr endadr bytes       Zap (fill) memory with a byte string',CR,LF

+	DB 0

+

+ddtz:

+	ld	sp,$stack

+	ld	a,(wstrtflg)		;check warm start flag

+	or	a

+;;;	jr	nz,ddtz_w

+

+	exx

+	ld	hl,sysramc

+	ld	de,topcodbeg

+	ld	bc,topcodend-topcodbeg

+	ldir

+

+	exx

+

+	if CPU_Z180

+	ld	a,e

+	ld	(ubbr),a

+	endif

+

+ddtz_w:

+	ld hl,MSG

+	call PSTR

+	call ddtei

+

+; DDTZ main loop

+

+DDTZML:

+	ld sp,$stack

+	ld hl,l07eah

+	ld (CMD_ERR),hl

+	ld hl,(REG.PC)

+	ld (OFFS.pc),hl

+	call sub_0e68h

+	ld hl,(CMD_RPT)

+	ld de,DDTZML

+	call CP.HL.DE

+	ld a,'>'

+	call OUTCHAR

+	call nz,OUTCHAR

+	call z,OUTBL

+	call INLINE

+	call SKIPBL

+	jr z,exe_hl

+	ld hl,DDTZML

+	ld (CMD_RPT),hl

+	inc de

+	sub '?'

+	jr c,ERROR

+	cp 'Z'+1-'?'

+	jr nc,ERROR

+	add a,a

+	ld hl,CMDTAB

+	call ADD_HL_A

+	ld a,(hl)

+	inc hl

+	ld h,(hl)

+	ld l,a

+	jr exe_hl

+ERROR:

+	ld hl,(CMD_ERR)

+exe_hl:

+	call CALL.HL

+	jr DDTZML

+

+CALL.HL:

+	jp (hl)

+

+

+CMDTAB:

+	defw CMD.?		;Help

+	defw CMD.@		;Offset

+	defw CMD.A		;Assemble

+	defw CMD.B		;Breakpoint

+	defw CMD.C		;Call

+	defw CMD.D		;Display

+	defw ERROR		;

+	defw ERROR		;

+	defw CMD.G		;Go

+	defw CMD.H		;Hex Math

+	defw CMD.I		;In Port

+	defw ERROR		;

+	defw ERROR		;

+	defw CMD.L		;List

+	defw CMD.M		;Move

+	defw ERROR		;

+	defw CMD.O		;Out Port

+	defw ERROR		;

+	defw CMD.Q		;Query

+	defw CMD.R		;Read Intel Hex

+	defw CMD.S		;Substitute

+	defw CMD.T		;Trace

+	defw ERROR		;

+	defw CMD.V		;Verify

+	defw ERROR		;

+	defw CMD.X		;eXamine

+	defw CMD.Y		;eXamine Y Registers

+	defw CMD.Z		;Zap (fill) memory

+l07eah:

+	ld a,'?'

+	call OUTCHAR

+	jp CRLF

+

+CMD.?:

+	call	assert_eol

+	ld	hl,HLPMSG

+	call	PSTR

+	ret

+

+$ci:

+	push	hl

+	push	de

+	push	bc

+	call	?conin

+	pop	bc

+	pop	de

+	pop	hl

+	ret

+

+$co:

+	push	hl

+	push	de

+	push	bc

+	ld	c,a

+	call	?cono

+	pop	bc

+	pop	de

+	pop	hl

+	ret

+

+DELC:

+	ld	a,b

+	or	a

+	ret	z

+	call	DELC1

+	dec	hl

+	dec	b

+	inc	c

+	ld	a,(hl)

+	cp	' '

+	ret	nc

+DELC1:

+	push	de

+	push	hl

+	push	bc

+	ld	c,BS

+	call	?cono

+	ld	c,' '

+	call	?cono

+	ld	c,BS

+	call	?cono

+	pop	bc

+	pop	hl

+	pop	de

+	ret

+

+DELL:

+	ld a,b			;

+	or a			;

+	ret z			;

+	call DELC		;

+	jr DELL			;

+

+INLINE:

+	push hl			;

+	ld hl,CI.BUF		;

+	ld c,(hl)		;

+	inc hl			;

+	ld b,000h		;

+	inc hl			;

+inlnxtch:

+	ld a,c			;

+	or a			;

+	jr z,inl_e		;

+	call $ci		;

+	cp CR			;

+	jr z,inl_e		;Accept line

+	cp LF			;

+	jr z,inl_e		;Accept line

+	cp BS			;

+	jr nz,l0844h		;

+	call DELC		;Delete Char

+	jr inlnxtch		;

+l0844h:

+	cp DEL			;

+	jr nz,l084dh		;

+	call DELC		;Delete Char

+	jr inlnxtch		;

+l084dh:

+	cp CNTRX		;

+	jr nz,l0856h		;

+	call DELL		;Delete Line

+	jr inlnxtch		;

+l0856h:

+	cp TAB			;

+	jr nz,l085ch		;

+	ld a,' '		;

+l085ch:

+	ld (hl),a		;

+	cp ' '			;

+	jr nc,l0869h		;

+	ld a,'^'		;Controll characters

+	call $co		;

+	ld a,(hl)		;

+	add a,'@'		;

+l0869h:

+	call $co		;

+	inc hl			;

+	inc b			;

+	dec c			;

+	jr inlnxtch		;

+

+inl_e:

+	ld hl,ci.buf+1		;

+	ld (hl),b		;

+	call CRLF		;

+	ld de,ci.buf+1		;

+	ld a,(de)		;

+	ld b,a			;

+	ld c,000h		;

+	inc b			;

+l0880h:

+	inc de			;

+	dec b			;

+	jr z,l08b2h		;

+	ld a,(de)		;

+	bit 0,c			;

+	call z,UPCASE		;

+	ld (de),a		;

+	cp ''''			;

+	jr nz,l0880h		;

+	push de			;

+	dec de			;

+	ld a,(de)		;

+	cp ''''			;

+	jr z,l08aeh		;

+	dec de			;

+	ld a,(de)		;

+	cp '^'			;

+	jr z,l08a2h		;

+	dec de			;

+	ld a,(de)		;

+	cp '^'			;

+	jr nz,l08aeh		;

+l08a2h:

+	inc de			;

+	push bc			;

+	call sub_0a0eh		;

+	pop bc			;

+	dec de			;

+	ld a,(de)		;

+	cp ''''			;

+	jr z,l08afh		;

+l08aeh:

+	inc c			;

+l08afh:

+	pop de			;

+	jr l0880h		;

+l08b2h:

+	xor a			;

+	ld (de),a		;

+	ld de,ci.buf+2		;

+	pop hl			;

+	ret			;

+

+UPCASE:

+	cp 'a'			;

+	ret c			;

+	cp 'z'+1		;

+	ret nc			;

+	and 05fh		;

+	ret			;

+

+out.hl.@:

+	call out.hl		;

+	push de			;

+	push hl			;

+	ld de,(offs.@)		;

+	ld a,d			;

+	or e			;

+	jr z,l08ddh		;

+	call OUTBL		;

+	ld a,'@'		;

+	call OUTCHAR		;

+	and a			;

+	sbc hl,de		;

+	call out.hl		;

+l08ddh:

+	pop hl			;

+	pop de			;

+	ret			;

+

+out.bin.w:

+	ld a,h			;

+	call out.bin.b		;

+	ld a,l			;

+out.bin.b:

+	ld b,008h		;

+l08e7h:

+	add a,a			;

+	push af			;

+	ld a,0			;

+	adc a,a			;

+	call out.digit		;

+	pop af			;

+	djnz l08e7h		;

+	ld a,'"'		;

+	jp OUTCHAR		;

+

+sub_08f7h:

+	ld a,'-'		;

+	call OUTCHAR		;

+	dec hl			;

+	jp cpl.hl		;

+

+out.hl.decm:

+	push hl			;

+	call sub_08f7h		;

+	db	3eh		;  ld a,0E5h

+out.hl.dec:

+	push	hl

+	ld b,6			;

+	call sub_0917h		;

+	pop hl			;

+	ld a,'.'		;

+	call OUTCHAR		;

+l0911h:

+	call OUTBL		;

+	djnz l0911h		;

+	ret			;

+

+

+sub_0917h:

+	dec b

+	push de

+	ld de,10

+	call DIV_HL_DE

+	ld a,h

+	or l

+	call nz,sub_0917h

+	ld a,e

+	pop de

+	jr out.digit

+

+sub_0928h:

+	push hl

+	call sub_08f7h

+	call out.hl

+	pop hl

+	ret

+out.hl:

+	ld a,h

+	call out.hex

+	ld a,l

+out.hex:

+	push af

+	rra

+	rra

+	rra

+	rra

+	call out.digit

+	pop af

+out.digit:

+	and 00fh

+	cp 10

+	jr c,l0947h

+	add a,007h

+l0947h:

+	add a,'0'

+	jr OUTCHAR

+l094bh:

+	ld a,'-'

+	call OUTCHAR

+	ld a,040h

+out.ascii:

+	ex af,af'

+	call outquote

+	ex af,af'

+	push af

+	res 7,a

+	cp ' '

+	jr nc,l0960h

+	sub 0c0h

+l0960h:

+	call OUTCHAR

+	push af

+	cp ''''

+	call z,OUTCHAR

+	pop af

+	ex af,af'

+	call outquote

+	pop af

+	or a

+	ld a,'.'

+	call m,OUTCHAR

+	ex af,af'

+	jr c,l094bh

+	ret

+

+outquote:

+	ld a,''''

+OUTCHAR:

+	push	hl

+	push	de

+	push	bc

+	push	af

+	and	07fh

+	ld	c,a

+	call	?cono

+	ld	hl,CON.COL

+	inc	(hl)

+	pop	af

+	pop	bc

+	pop	de

+	pop	hl

+	ret

+

+inchar:

+	push	hl

+	push	de

+	push	bc

+	call	?const

+	and	a

+	jr	z,inch1

+	call	?conin

+	scf

+inch1:

+	pop	bc

+	pop	de

+	pop	hl

+	ret

+

+PSTR:

+	ld c,000h

+l0995h:

+	ld a,(hl)

+	and a

+	ret z

+	call OUTCHAR

+	inc c

+	inc hl

+	and a

+	ret m

+	jr l0995h

+

+outbl6:

+	call outbl2

+outbl4:

+	call outbl2

+outbl2:

+	call OUTBL

+OUTBL:

+	ld a,' '

+	jr OUTCHAR

+CRLF:

+	call inchar

+	ld a,CR

+	call OUTCHAR

+	ld a,LF

+	call OUTCHAR

+	ld a,000h

+	ld (CON.COL),a

+	jp c,DDTZML

+	ret

+

+ADD_HL_A:

+	add a,l

+	ld l,a

+	ret nc

+	inc h

+	ret

+

+SKIPBL0:

+	inc de

+SKIPBL:

+	ld a,(de)

+	cp ' '

+	jr z,SKIPBL0

+	cp 009h

+	jr z,SKIPBL0

+	or a

+	ret

+

+skip_to_nextarg:

+	call SKIPBL

+	cp ','

+	ret nz

+	inc de

+	call SKIPBL

+	cp a

+	ret

+

+assert_eol:

+	call SKIPBL

+	ret z

+l09e5h:

+	jp ERROR

+

+chk.sp:

+	push hl

+	push de

+	ld hl,0

+	add hl,sp

+	ld de,$stack-50

+	call CP.HL.DE

+	pop de

+	pop hl

+	jr c,l09e5h

+	ret

+

+CP.HL.DE:

+	and a

+	sbc hl,de

+	add hl,de

+	ret

+

+lookupch:

+	ld b,000h

+l0a00h:

+	ld a,(hl)

+	and a

+	ret z

+	ld a,(de)

+	cp (hl)

+	jr z,l0a0bh

+	inc hl

+	inc b

+	jr l0a00h

+l0a0bh:

+	scf

+	inc de

+	ret

+

+sub_0a0eh:

+	ld hl,b_0x132A_start

+	ld b,07fh

+	jr l0a17h

+

+sub_0a15h:

+	ld b,0ffh

+l0a17h:

+	inc b

+	ld a,(hl)

+	and a

+	ret z

+	call l0a27

+	jr nc,l0a17h

+	res 7,b

+	ret

+

+sub_0a23h:

+	push bc

+	res 7,b

+	db	3eh		;0a26  ld a,0c5h

+l0a27:

+	push bc

+	push de

+l0a29h:

+	ld a,(de)

+	xor (hl)

+	and 07fh

+	jr nz,l0a41h

+	bit 7,(hl)

+	inc hl

+	inc de

+	jr z,l0a29h

+	scf

+	bit 7,b

+	call z,sub_0d20h

+	jr nc,l0a44h

+	pop af

+	scf

+	pop bc

+	ret

+

+l0a41h:

+	call sub_0a50h

+l0a44h:

+	pop de

+	and a

+	pop bc

+	ret

+

+sub_0a48h:

+	inc b

+l0a49h:

+	dec b

+	ret z

+	call sub_0a50h

+	jr l0a49h

+sub_0a50h:

+	ld a,(hl)

+	and a

+	ret z

+l0a53h:

+	ld a,(hl)

+	inc hl

+	and a

+	ret m

+	jr l0a53h

+

+get_arg3:

+	call get_arg_range

+	push hl

+	push bc

+	call skip_to_nextarg

+	call get_arg

+	ex de,hl

+	pop bc

+	pop hl

+	ret

+

+sub_0a68h:

+	call EXPR

+	jr c,error0

+	ret

+

+get_arg:

+	call sub_0a68h

+l0a71h:

+	jp assert_eol

+

+get_lastarg_def:

+	call get_arg_def

+	jr l0a71h

+

+get_arg_def:

+	push hl

+	call EXPR

+	jr c,l0a80h

+	ex (sp),hl

+l0a80h:

+	pop hl

+	ret

+

+sub_0a82h:

+	call sub_0a87h

+	jr l0a71h

+

+sub_0a87h:

+	db	0e6h		;0a87  and 037h (clear carry)

+get_arg_range:

+	scf

+	ex af,af'

+	push bc

+	push hl

+	call EXPR

+	jr nc,l0a97h

+	ex af,af'

+	jr c,error0

+	ex af,af'

+	pop hl

+

+	defb 03eh

+l0a97h:

+	pop af

+	call sub_0aa5h

+	jr nc,l0aa3h

+	ex af,af'

+	pop bc

+	ret nc

+error0:

+	jp ERROR

+

+l0aa3h:

+	pop af

+	ret

+

+sub_0aa5h:

+	call skip_to_nextarg

+	cp 'S'

+	jr nz,l0aadh

+	inc de

+l0aadh:

+	push hl

+	push af

+	call EXPR

+	jr c,l0ac3h

+	ld b,h

+	ld c,l

+	pop af

+	pop hl

+	jr z,l0ac1h

+	ld a,c

+	sub l

+	ld c,a

+	ld a,b

+	sbc a,h

+	ld b,a

+	inc bc

+l0ac1h:

+	and a

+	ret

+

+l0ac3h:

+	pop af

+	pop hl

+	jr z,error0

+	scf

+	ret

+

+EXPR:

+	call SKIPBL

+EXPR1:

+	call do_subexpr

+	ret c

+	call do_rel_op

+	ret nc

+	push bc

+	push hl

+	call do_subexpr

+	jr c,error0

+	ex de,hl

+	ex (sp),hl

+	and a

+	sbc hl,de

+	ld hl,0ffffh

+	pop de

+	ret

+

+do_op_eq:

+	jr z,l0af8h

+	jr l0af7h

+do_op_ne:

+	jr nz,l0af8h

+	jr l0af7h

+do_op_le:

+	jr z,l0af8h

+do_op_lt:

+	jr c,l0af8h

+	jr l0af7h

+do_op_gt:

+	jr z,l0af7h

+do_op_ge:

+	jr nc,l0af8h

+l0af7h:

+	inc hl

+l0af8h:

+	and a

+	ret

+

+do_rel_op:

+	push hl

+	ld hl,tab_eq_le_ge

+	call lookupch

+	jr nc,l0b28h

+	ld a,b

+	or a

+	jr z,l0b1ch

+	ld a,(de)

+	cp '='

+	jr nz,l0b11h

+	inc de

+	inc b

+	inc b

+	jr l0b1ch

+

+l0b11h:

+	bit 0,b

+	jr z,l0b1ch

+	cp '>'

+	jr nz,l0b1ch

+	inc de

+	ld b,005h

+l0b1ch:

+	ld hl,tab_func_eqlege

+	ld a,b

+	add a,a

+	call ADD_HL_A

+	ld c,(hl)

+	inc hl

+	ld b,(hl)

+	scf

+l0b28h:

+	pop hl

+	ret

+

+tab_eq_le_ge:

+	db	'=<>',0

+

+tab_func_eqlege:

+	defw do_op_eq

+	defw do_op_lt

+	defw do_op_gt

+	defw do_op_le

+	defw do_op_ge

+	defw do_op_ne

+

+do_subexpr:

+	call do_factor

+	ret c

+l0b3eh:

+	call do_binary_op

+	push hl

+	push bc

+	call do_factor

+	pop bc

+	ex de,hl

+	ex (sp),hl

+	jr nc,l0b52h

+	pop de

+	ld a,b

+	or c

+	ret z

+	jp ERROR

+

+l0b52h:

+	ld a,b

+	or c

+	push bc

+	ret nz

+	pop bc

+do_op_add:

+	add hl,de

+l0b58h:

+	pop de

+	jr l0b3eh

+

+do_op_sub:

+	and a

+	sbc hl,de

+	jr l0b58h

+

+do_op_mlt:

+	push	bc

+	if CPU_Z180

+	ld	b,h

+	ld	c,e

+	ld	h,e

+	ld	e,l

+	mlt	bc

+	mlt	de

+	mlt	hl

+	ld	a,h

+	add	a,c

+	add	a,e

+	ld	h,a

+	else

+	 ld	b,h

+	 ld	c,l

+	 ld	hl,0

+	 ld	a,16

+mlt_1:

+	 add	hl,hl

+	 ex	de,hl

+	 add	hl,hl

+	 ex	de,hl

+	 jr	nc,mlt_2

+	 add	hl,bc

+mlt_2:

+	 dec	a

+	 jr	nz,mlt_1

+	endif

+	pop	bc

+	jr	l0b58h

+

+do_op_div:

+	call DIV_HL_DE

+	jr l0b58h

+

+do_op_mod:

+	call DIV_HL_DE

+	ex de,hl

+	jr l0b58h

+

+; divide x/y

+;     hl: x

+;     de: y

+;   return:

+;     hl: q  (x/y)

+;     de: r  (x%y)

+

+DIV_HL_DE:

+	push	bc

+	ex	de,hl		;de = x, hl = y

+	ld	b,h		;bc = y

+	ld	c,l

+	ld	hl,0		;r = 0

+	ld	a,16		;count

+

+;  de: x   (x shifted out, q shifted in)

+;  bc: y

+;  hl: r   (initially 0)

+

+l0b89h:

+	ex	de,hl		;x

+	add	hl,hl		;x <<= 1

+	ex	de,hl		;r

+	adc	hl,hl		;r <<= 1

+

+	or	a

+	sbc	hl,bc

+	inc	de

+	jr	nc,div_no_restore

+	add	hl,bc

+	dec	de

+div_no_restore:

+	dec	a

+	jr	nz,l0b89h

+	ex	de,hl		;hl: q   de: r

+	pop	bc

+	ret

+

+do_op_and:

+	ld	a,h

+	and	d

+	ld	h,a

+	ld	a,l

+	and	e

+	ld	l,a

+	jr	l0b58h

+

+do_op_or:

+	ld	a,h

+	or	d

+	ld	h,a

+	ld	a,l

+	or	e

+	ld	l,a

+	jr	l0b58h

+

+do_op_xor:

+	ld	a,h

+	xor	d

+	ld	h,a

+	ld	a,l

+	xor	e

+	ld	l,a

+	jr	l0b58h

+

+do_binary_op:

+	push	hl

+	ld	hl,tab_op_a

+	call	lookupch

+	ld	a,b

+	ld	hl,tab_func_opa

+	add	a,a

+	call	ADD_HL_A

+	ld	c,(hl)

+	inc	hl

+	ld	b,(hl)

+	pop	hl

+	ret

+

+tab_op_a:

+	DB	'+-*/%&!#',0

+tab_func_opa:

+	defw	do_op_add

+	defw	do_op_sub

+	defw	do_op_mlt

+	defw	do_op_div

+	defw	do_op_mod

+	defw	do_op_and

+	defw	do_op_or

+	defw	do_op_xor

+	defw	0

+

+fact_factor:

+	call	do_factor

+	ret	nc

+	jp	ERROR

+

+do_factor:

+	call	chk.sp

+	call	get.number

+	ret	nc

+	inc	de

+	ld	hl,TOPRAM

+	cp	'T'

+	ret	z

+	ld	hl,(HILOD)

+	cp	'H'

+	ret	z

+	ld	hl,(MAXLOD)

+	cp	'M'

+	ret	z

+	ld	hl,TPA

+	cp	'L'

+	ret	z

+	ld	hl,(offs.@)

+	cp	'@'

+	ret	z

+	ld	hl,(OFFS.pc)

+	cp	'$'

+	ret	z

+	cp	'-'

+	jr	z,fact_factneg

+	cp	'~'

+	jr	z,fact_factinv

+	cp	'+'

+	jr	z,fact_factor

+	cp	'^'

+	jr	z,fact_reg.CPU

+	cp	'Y'

+	jr	z,fact_reg.Y

+	cp	'('

+	jr	z,fact_mem

+	cp	'['

+	jp	z,EXPR_BRCKT		;0c35	[ expression ]

+	cp	''''

+	jr	z,fact_factstring

+	dec	de

+	scf

+	ret

+

+fact_reg.Y:

+	call	get.decdigit

+	jp	c,ERROR

+	inc	de

+	add	a,a

+	ld	hl,reg.Y

+	call	ADD_HL_A

+	ld	a,(hl)

+	inc	hl

+	ld	h,(hl)

+	ld	l,a

+	and	a

+	ret

+fact_factstring:

+	ld	hl,0

+l0c56h:

+	ld	a,(de)

+	cp	''''

+	jr	z,l0c62h

+	and	a

+	ret	z

+l0c5dh:

+	ld	h,l

+	ld	l,a

+	inc	de

+	jr	l0c56h

+

+l0c62h:

+	inc	de

+	ld	a,(de)

+	cp	''''

+	jr	z,l0c5dh

+	sub	'.'

+	or	a

+	ret	nz

+	inc	de

+	set	7,l

+	ret

+

+fact_reg.CPU:

+	call	sub_1315h

+	jr	nc,l0cbbh

+	ld	a,(hl)

+	inc	hl

+	ld	h,(hl)

+	ld	l,a

+	and	a

+	bit	0,c

+	ret	nz

+	ld	h,000h

+	ret

+

+fact_factneg:

+	call	fact_factor

+	dec	hl

+cpl.hl:

+	ld	a,h

+	cpl

+	ld	h,a

+	ld	a,l

+	cpl

+	ld	l,a

+	ret

+fact_factinv:

+	call	fact_factor

+	jr	cpl.hl

+

+fact_mem:

+	call	EXPR1

+	jr	c,l0cbbh

+	ld	a,(de)

+	cp	')'

+	jr	nz,l0cbbh

+	inc	de

+	comst

+	 ld	a,(hl)

+	 inc	hl			;

+	 ld	h,(hl)		;

+	comend

+	ld	l,a

+	ld	a,(de)

+	inc	de

+	cp	'.'

+	ret	z

+	dec	de

+	xor	a

+	ld	h,a

+	ret

+

+EXPR_BRCKT:

+	call	EXPR1

+	jr	c,l0cbbh

+	ld	a,(de)

+	cp	']'

+	inc	de

+	ret	z

+l0cbbh:

+	jp	ERROR

+

+get.number:

+	call	get.hexdigit

+	ret	c

+	push	de

+l0cc3h:

+	inc	de

+	call	get.hexdigit

+	jr	nc,l0cc3h

+	pop	de

+	cp	'.'

+	jr	z,l0d04h

+	cp	'"'

+	jr	z,l0ce9h

+	ld	hl,0

+l0cd5h:

+	call	get.hexdigit

+	jr	c,l0ce4h

+	add	hl,hl

+	add	hl,hl

+	add	hl,hl

+	add	hl,hl

+	call	ADD_HL_A

+	inc	de

+	jr	l0cd5h

+l0ce4h:

+	xor	'H'

+	ret	nz

+	inc	de

+	ret

+

+l0ce9h:

+	ld	hl,0

+l0cech:

+	call	get.bindigit

+l0cefh:

+	inc	de

+	jr	c,l0cf8h

+	add	hl,hl

+	call	ADD_HL_A

+	jr	l0cech

+l0cf8h:

+	cp	'"'

+	jp	nz,ERROR

+	call	get.bindigit

+	jr	nc,l0cefh

+	or	a

+	ret

+l0d04h:

+	ld	hl,0

+l0d07h:

+	call	get.decdigit

+	inc	de

+	jr	c,l0d1ah

+	push	bc

+	add	hl,hl		;0d0e	hl *= 10

+	ld	b,h

+	ld	c,l

+	add	hl,hl

+	add	hl,hl

+	add	hl,bc

+	pop	bc

+	call	ADD_HL_A

+	jr	l0d07h

+l0d1ah:

+	cp	'.'

+	ret	z

+	jp	ERROR

+

+sub_0d20h:

+	ld	a,(de)

+	cp	05bh

+	jr	l0d28h

+

+get.hexdigit:

+	ld	a,(de)

+sub_0d26h:

+	cp	'F'+1

+l0d28h:

+	ccf

+	ret	c

+	cp	'A'

+	jr	c,l0d32h

+	sub	'A'-10

+	ret

+

+get.decdigit:

+	ld	a,(de)

+l0d32h:

+	cp	'9'+1

+	jr	l0d39h

+get.bindigit:

+	ld	a,(de)

+	cp	'1'+1

+l0d39h:

+	ccf

+	ret	c

+	cp	'0'

+	ret	c

+	sub	'0'

+	ret

+

+l0d41h:

+	call	assert_eol

+

+prnt_cpustat:

+	call	prnt_f

+	call	outbl2

+	ld	hl,b_0x0DFD_start

+	ld	de,b_0x0E1D_start

+	ld	b,006h

+l0d52h:

+	call	prnt_regs

+	djnz	l0d52h

+	push	hl

+	push	de

+	ld	iy,(REG.PC)

+	call	sub_1f77h

+	exx

+	ex	af,af'

+	call	CRLF

+	call	prnt_f2

+	call	outbl2

+	pop	de

+	pop	hl

+	ld	b,007h

+l0d6fh:

+	call	prnt_regs

+	djnz	l0d6fh

+	exx

+	ex	af,af'

+	and	a

+	jr	z,l0d7fh

+	call	outbl6

+	call	sub_1f5bh

+l0d7fh:

+	jp	crlf

+

+prnt_f:

+	ld	a,(reg.f)

+	call	prnt_flags

+	ld	a,(reg.iff)

+	cp	0f3h

+	jp	z,outbl

+	ld	a,'E'

+	jp	outchar

+

+prnt_f2:

+	ld	a,(reg.f2)

+	call	prnt_flags

+	jp	outbl

+

+prnt_flags:

+	ld	b,a

+	ld	a,'S'

+	call	sub_0dbeh

+	ld	a,'Z'

+	call	sub_0dbeh

+	rl	b

+	ld	a,'H'

+	call	sub_0dbeh

+	rl	b

+	ld	a,'V'

+	call	sub_0dbeh

+	ld	a,'N'

+	call	sub_0dbeh

+	ld	a,'C'

+sub_0dbeh:

+	rl	b

+	jp	c,OUTCHAR

+	jp	OUTBL

+

+prnt_regs:

+	push	bc

+	push	de

+	call	PSTR

+	ld	a,'='

+	call	OUTCHAR

+	ex	(sp),hl

+	ld	e,(hl)

+	inc	hl

+	ld	d,(hl)

+	inc	hl

+	ld	a,(hl)

+	inc	hl

+	push	hl

+	and	a

+	jr	z,l0df2h

+	push	af

+	ld	a,(de)

+	ld	l,a

+	inc	de

+	ld	a,(de)

+	ld	h,a

+	pop	af

+	dec	a

+	jr	z,l0dedh

+	call	out.hl.@

+	call	z,outbl6

+	jr	l0df6h

+l0dedh:

+	call	out.hl

+	jr	l0df6h

+l0df2h:

+	ld	a,(de)

+	call	out.hex

+l0df6h:

+	call	OUTBL

+	pop	de

+	pop	hl

+	pop	bc

+	ret

+

+b_0x0DFD_start:

+	DC	'A '

+	DC	'BC '

+	DC	'DE '

+	DC	'HL '

+	DC	'SP'

+	DC	'PC'

+	DC	'A'''

+	DC	'BC'''

+	DC	'DE'''

+	DC	'HL'''

+	DC	'IX'

+	DC	'IY'

+	DC	'I'

+	DB	0

+

+b_0x0E1D_start:

+	defw	reg.a

+	defb	000h

+	defw	reg.c

+	defb	001h

+	defw	reg.e

+	defb	001h

+	defw	reg.l

+	defb	001h

+	defw	reg.sp

+	defb	001h

+	defw	reg.pc

+	defb	002h

+	defw	reg.a2

+	defb	000h

+	defw	reg.c2

+	defb	001h

+	defw	reg.e2

+	defb	001h

+	defw	reg.l2

+	defb	001h

+	defw	reg.ix

+	defb	001h

+	defw	reg.iy

+	defb	001h

+	defw	reg.i

+	dw	0

+

+CMD.G:

+	sub	a

+	ld	(TCFLG),a

+	ld	(XA747),a

+	call	EXPR

+	jr	c,l0e54h

+	ld	(REG.PC),hl

+l0e54h:

+	call	SKIPBL

+	jp	z,l1183h

+	cp	';'

+	jp	nz,ERROR

+	inc	de

+	ld	a,002h

+	call	sub_0f24h

+	jp	l1183h

+

+sub_0e68h:

+	ld	b,BP_CNT

+	ld	ix,bp_tab

+l0e6eh:

+	ld	a,(ix+000h)

+	and	0f1h

+	ld	(ix+000h),a

+	call	sub_11c5h

+	ld	de,BP_SIZE

+	add	ix,de

+	djnz	l0e6eh

+	ret

+

+CMD.B:

+	call	SKIPBL

+	jr	z,l0ecbh

+	inc	de

+	cp	'X'

+	jr	z,l0e91h

+	dec	de

+	ld	a,001h

+	jp	sub_0f24h

+l0e91h:

+	call	SKIPBL

+	jr	z,l0ea6h

+l0e96h:

+	call	EXPR

+	jp	c,assert_eol

+	push	de

+	call	sub_0ea7h

+	pop	de

+	call	skip_to_nextarg

+	jr	l0e96h

+l0ea6h:

+	scf

+sub_0ea7h:

+	ld	b,BP_CNT

+	ld	ix,bp_tab

+l0eadh:

+	push	af

+	jr	c,l0ebbh

+	ld	e,(ix+002h)

+	ld	d,(ix+003h)

+	call	CP.HL.DE

+	jr	nz,l0ec2h

+l0ebbh:

+	ld	(ix+000h),000h

+	call	sub_11c5h

+l0ec2h:

+	ld	de,BP_SIZE

+	add	ix,de

+	pop	af

+	djnz	l0eadh

+	ret

+l0ecbh:

+	ld	b,BP_CNT

+	ld	ix,bp_tab

+l0ed1h:

+	bit	0,(ix+000h)

+	jr	z,l0f1ch

+	ld	a,'R'

+	bit	4,(ix+000h)

+	jr	nz,l0ee1h

+	ld	a,' '

+l0ee1h:

+	call	OUTCHAR

+	call	OUTBL

+	ld	l,(ix+002h)

+	ld	h,(ix+003h)

+	call	out.hl.@

+	call	outbl2

+	ld	a,':'

+	call	OUTCHAR

+	ld	l,(ix+004h)

+	ld	h,(ix+005h)

+	call	out.hl

+	ld	l,(ix+006h)

+	ld	h,(ix+007h)

+	ld	a,h

+	or	l

+	jr	z,l0f19h

+	call	outbl4

+	ld	a,'I'

+	call	OUTCHAR

+	call	outbl2

+	call	PSTR

+l0f19h:

+	call	CRLF

+l0f1ch:

+	ld	de,BP_SIZE

+	add	ix,de

+	djnz	l0ed1h

+	ret

+

+sub_0f24h:

+	ld	b,a

+	call	SKIPBL

+	ret	z

+	cp	'R'

+	jr	nz,l0f30h

+	inc	de

+	set	4,b

+l0f30h:

+	push	bc

+	call	EXPR

+	jp	c,ERROR

+	pop	bc

+	bit	0,b

+	push	bc

+	push	de

+	push	hl

+	call	nz,sub_0ea7h

+	pop	hl

+	call	sub_0f68h

+	pop	de

+	ld	(ix+002h),l

+	ld	(ix+003h),h

+	call	sub_0f80h

+	ld	(ix+004h),l

+	ld	(ix+005h),h

+	call	sub_0f91h

+	ld	(ix+006h),l

+	ld	(ix+007h),h

+	call	skip_to_nextarg

+	pop	af

+	ld	(ix+000h),a

+	and	00fh

+	jr	sub_0f24h

+sub_0f68h:

+	ld	b,BP_CNT

+	ld	ix,bp_tab

+l0f6eh:

+	ld	a,(ix+000h)

+	and	00fh

+	ret	z

+	push	bc

+	ld	bc,BP_SIZE

+	add	ix,bc

+	pop	bc

+	djnz	l0f6eh

+	jp	ERROR

+

+sub_0f80h:

+	call	SKIPBL

+	ld	hl,1

+	cp	03ah

+	ret	nz

+	inc	de

+	call	EXPR

+	jp	c,ERROR

+	ret

+sub_0f91h:

+	call	SKIPBL

+	cp	049h

+	ld	hl,0

+	ret	nz

+	inc	de

+	call	SKIPBL

+	push	de

+	call	EXPR

+	jp	c,ERROR

+	ex	de,hl

+	pop	de

+	push	de

+	sbc	hl,de

+	ld	b,h

+	ld	c,l

+	ld	hl,(sexp1)

+	push	hl

+	add	hl,bc

+	ld	de,sexpbufe

+	call	CP.HL.DE

+	jp	nc,ERROR

+	pop	hl

+	ld	(sexp2),hl

+	pop	de

+	ex	de,hl

+	ldir

+	xor	a

+	ld	(de),a

+	inc	de

+	ex	de,hl

+	ld	(sexp1),hl

+	ld	hl,(sexp2)

+	ret

+

+bpddtz:

+	if ROMSYS

+	 ld	h,ROMEN

+	 jr	z,l0fd2h

+	 inc	h

+l0fd2h:

+	 push	hl		;save rom enable stat

+	endif

+	push	bc

+	push	de

+	push	ix

+	push	iy

+	ld	a,i

+	ld	h,a

+	ld	l,000h

+	push	hl		;save I register

+

+	if CPU_Z180

+	 ld	a,0f3h		;DI

+	 jp	po,l0fe6h

+	 ld	a,0fbh		;EI

+	else			;NMOS Z80 design flaw

+	 call	getiff		;return Carry set, if INTs are disabled.

+	 ld	a,0f3h		;DI

+	 jr	c,l0fe6h

+	 ld	a,0fbh		;EI

+	endif

+l0fe6h:

+	ld	(reg.iff),a

+	ld	hl,ivtab

+	ld	a,h

+	ld	i,a

+	call	ddtei

+	ex	af,af'

+	push	af

+	exx

+	push	bc

+	push	de

+	push	hl

+	call	bp.unset

+	if CPU_Z180

+	 in0	a,(itc)

+	 jp	p,l1017h

+	 res	TRAP,a

+	 out0	(itc),a

+	 bit	UFO,a

+	 jr	z,l1011h

+	 ld	hl,(REG.PC)

+	 dec	hl

+	 ld	(REG.PC),hl

+l1011h:

+	 ld	hl,MSG_trap

+	 call	PSTR

+l1017h:

+	endif

+

+	ld	a,(XBFE8)

+	dec	a

+	jr	z,l1051h

+	call	inchar

+	jr	c,l102eh

+	call	sub_1059h

+	and	a

+	jp	z,l1183h

+	and	083h

+	jp	z,l284ah

+l102eh:

+	call	sub_0e68h

+	call prnt_cpustat

+	jp	DDTZML

+

+	if CPU_Z180

+MSG_trap:

+	DB	CR,LF,'Undefined opcode trap'

+	DB	CR,LF,0

+	endif

+

+l1051h:

+	ld (XBFE8),a

+	ld c,007h

+	jp l119fh

+sub_1059h:

+	ld a,080h

+	ex af,af'

+	sub a

+	ld (XA747),a

+	ld b,BP_CNT

+	ld ix,bp_tab

+l1066h:

+	ld a,(ix+000h)

+	and 007h

+	jr z,l107eh

+	ld e,(ix+002h)

+	ld d,(ix+003h)

+	ld hl,(REG.PC)

+	call CP.HL.DE

+	push bc

+	call z,sub_1087h

+	pop bc

+l107eh:

+	ld de,BP_SIZE

+	add ix,de

+	djnz l1066h

+	ex af,af'

+	ret

+sub_1087h:

+	ex af,af'

+	res 7,a

+	ex af,af'

+	ld e,(ix+006h)

+	ld d,(ix+007h)

+	ld a,d

+	or e

+	ld hl,0ffffh

+	call nz,EXPR

+	ld a,h

+	or l

+	jr z,l10aeh

+	ld e,(ix+004h)

+	ld d,(ix+005h)

+	dec de

+	ld a,d

+	or e

+	jr z,l10b9h

+	ld (ix+004h),e

+	ld (ix+005h),d

+l10aeh:

+	bit 4,(ix+000h)

+	ret z

+	ld a,001h

+	ld (XA747),a

+	ret

+l10b9h:

+	ex af,af'

+	or (ix+000h)

+	ex af,af'

+	ret

+

+bp.unset:

+	ld b,BP_CNT

+	ld ix,bp_tab

+l10c5h:

+	bit 5,(ix+000h)

+	res 5,(ix+000h)

+	jr z,l10e7h

+	ld l,(ix+002h)

+	ld h,(ix+003h)

+	ld a,(ddtzrst)

+	comst

+	cp (hl)

+	comend

+	jr nz,l10e7h

+	ld a,(ix+001h)

+	comst

+	 ld (hl),a

+	comend

+l10e7h:

+	res 3,(ix+000h)

+	ld de,BP_SIZE

+	add ix,de

+	djnz l10c5h

+	ret

+sub_10f3h:

+	ld b,BP_CNT

+	ld ix,bp_tab

+l10f9h:

+	ld a,(ix+000h)

+	and 003h

+	jr z,l110dh

+	ld e,(ix+002h)

+	ld d,(ix+003h)

+	ld hl,(REG.PC)

+	call CP.HL.DE

+	ret z

+l110dh:

+	ld de,BP_SIZE

+	add ix,de

+	djnz l10f9h

+	sub a

+	inc a

+	ret

+sub_1117h:

+	call sub_0f68h

+	ld (ix+004h),001h

+	ld (ix+005h),000h

+	ld (ix+002h),l

+	ld (ix+003h),h

+	ld (ix+006h),000h

+	ld (ix+007h),000h

+	ld a,(XBFE8)

+	and a

+	ld a,008h

+	jr nz,l113ah

+	ld a,004h

+l113ah:

+	ld (ix+000h),a

+	ret

+

+bp.set:

+	ld b,BP_CNT

+	ld ix,bp_tab

+l1144h:

+	ld a,(ix+000h)

+	and c

+	jr z,l117bh

+	set 5,(ix+000h)

+	ld l,(ix+002h)

+	ld h,(ix+003h)

+

+

+	ld a,(ddtzrst)

+	comst

+	ld e,(hl)

+	ld (hl),a

+	comend

+	ld (ix+001h),e

+	and 038h

+	ld h,0

+	ld l,a

+	ld de,bpent

+	comst			;

+	ld (hl),0c3h

+	inc hl

+	ld (hl),e

+	inc hl

+	ld (hl),d

+	comend

+

+

+l117bh:

+	ld de,BP_SIZE

+	add ix,de

+	djnz l1144h

+	ret

+

+l1183h:

+	sub a

+	ld (XBFE8),a

+	ld a,(XA747)

+	and a

+	call nz,prnt_cpustat

+	call sub_10f3h

+	ld c,007h

+	jr nz,l119fh

+	ld a,001h

+	ld (XBFE8),a

+	call sub_26e7h

+	ld c,008h

+l119fh:

+	call bp.set

+	ld sp,$stack		;11a2	set/restore user cpu state

+	pop hl

+	pop de

+	pop bc

+	pop af

+	exx

+	ex af,af'

+	pop af

+	ld i,a

+	pop iy

+	pop ix

+	pop de

+	pop bc

+	if ROMSYS

+	 pop hl

+	 ld a,l

+	 and M_MWI

+	 ld l,a

+	 di

+	 in0 a,(dcntl)

+	 and ~M_MWI

+	 or l

+	 ld l,a

+	 ld a,h

+	else

+	 pop hl

+	 di

+	endif

+	jp $go			;11c2	common ram, switch banks and go to user prog

+

+sub_11c5h:

+	ld a,(ix+000h)

+	and 003h

+	ret nz

+	ld e,(ix+006h)

+	ld d,(ix+007h)

+	ld a,d

+	or e

+	ret z

+	push bc

+	ld h,d

+	ld l,e

+	sub a

+	ld (ix+006h),a

+	ld (ix+007h),a

+	ld bc,0ffffh

+	cpir

+l11e3h:

+	push de

+	ld de,(sexp1)

+	call CP.HL.DE

+	pop de

+	jr nc,l11f9h

+	call sub_11ffh

+l11f1h:

+	ld a,(hl)

+	ldi

+	and a

+	jr nz,l11f1h

+	jr l11e3h

+l11f9h:

+	ld (sexp1),de

+	pop bc

+	ret

+sub_11ffh:

+	ld iy,bp_tab

+	push de

+l1204h:

+	ld e,(iy+006h)

+	ld d,(iy+007h)

+	call CP.HL.DE

+	jr z,l1216h

+	ld de,BP_SIZE

+	add iy,de

+	jr l1204h

+l1216h:

+	pop de

+	ld (iy+006h),e

+	ld (iy+007h),d

+	ret

+

+CMD.Y:

+	call get.decdigit

+	jr c,l122fh

+	inc de

+	push af

+	call assert_eol

+	pop af

+	call sub_1248h

+	jp l127ch

+l122fh:

+	call assert_eol

+	xor a

+l1233h:

+	push af

+	call sub_1248h

+	call outbl4

+	pop af

+	inc a

+	bit 0,a

+	push af

+	call z,CRLF

+	pop af

+	cp LF

+	jr c,l1233h

+	ret

+

+sub_1248h:

+	ld c,a

+	ld b,0

+	add a,'0'+080h

+	ld de,msg.Y+1

+	ld (de),a

+	dec de

+	ld hl,reg.Y

+	add hl,bc

+	add hl,bc

+	ex de,hl

+	ld c,003h

+	jp l129ah

+

+CMD.X:

+	call SKIPBL

+	call sub_1315h

+	jp nc,l0d41h

+	call assert_eol

+	ld a,b

+	cp 01fh

+	jr z,l12c6h

+	cp 020h

+	jr z,l12b6h

+	ex de,hl

+	ld hl,b_0x132A_start

+	call sub_0a48h

+l1279h:

+	call l129ah

+l127ch:

+	call OUTBL

+	push de

+	push bc

+	call INLINE

+	call SKIPBL

+	jr z,l1297h

+	call get_arg

+	ld b,h

+	ld c,l

+	pop af

+	pop hl

+	ld (hl),c

+	bit 0,a

+	ret z

+	inc hl

+	ld (hl),b

+	ret

+l1297h:

+	pop af

+	pop hl

+	ret

+l129ah:

+	ld b,c

+	call PSTR

+	ld a,'='

+	call OUTCHAR

+	ld a,(de)

+	bit 0,b

+	jp z,out.hex

+	ld l,a

+	inc de

+	ld a,(de)

+	dec de

+	ld h,a

+	bit 1,b

+	jp z,out.hl

+	jp out.hl.@

+

+l12b6h:

+	call prnt_f

+	ld a,0f3h

+	ld (reg.iff),a

+	scf

+	call sub_12d1h

+	ld (reg.f),a

+	ret

+

+l12c6h:

+	call prnt_f2

+	and a

+	call sub_12d1h

+	ld (reg.f2),a

+	ret

+

+sub_12d1h:

+	ex af,af'

+	ld b,000h

+	call outbl

+	call assert_eol

+	call inline

+l12ddh:

+	call skipbl

+	ld a,b

+	ret z

+	push bc

+	ld hl,tab_pr_flags

+	call lookupch

+	jp nc,error

+	ld a,b

+	cp 008h

+	jr z,l12feh

+	inc b

+	ld a,001h

+	jr l12f7h

+l12f6h:

+	rlca

+l12f7h:

+	djnz l12f6h

+	pop bc

+	or b

+	ld b,a

+	jr l12ddh

+l12feh:

+	ex af,af'

+	jp nc,ERROR

+	ex af,af'

+	ld a,0FBh

+	ld (reg.iff),a

+	pop bc

+	jr l12ddh

+

+tab_pr_flags:

+	db	'CNV H ZSE'

+	db	0

+

+sub_1315h:

+	call sub_0a0eh

+	ret nc

+	ld a,b

+	add a,b

+	add a,b

+	ld hl,b_0x136C_start

+	call ADD_HL_A

+	ld c,(hl)

+	inc hl

+	ld a,(hl)

+	inc hl

+	ld h,(hl)

+	ld l,a

+	scf

+	ret

+

+b_0x132A_start:

+	if ROMSYS

+	 DC	'ROMSEL'

+	endif

+	if CPU_Z180

+	DC	'CBAR'

+	DC	'BBR'

+	else

+	 DC	'BNK'

+	endif

+	DC	'BC'''

+	DC	'DE'''

+	DC	'HL'''

+	DC	'BC'

+	DC	'DE'

+	DC	'HL'

+	DC	'A'''

+	DC	'B'''

+	DC	'C'''

+	DC	'D'''

+	DC	'E'''

+	DC	'H'''

+	DC	'L'''

+	DC	'A'

+	DC	'B'

+	DC	'C'

+	DC	'D'

+	DC	'E'

+	DC	'H'

+	DC	'L'

+	DC	'IX'

+	DC	'IY'

+	DC	'SP'

+	DC	'PC'

+	DC	'X'

+	DC	'Y'

+	DC	'S'

+	DC	'P'

+	DC	'I'

+	DC	'F'''

+	DC	'F'

+	DB	0

+b_0x136C_start:

+	if	ROMSYS

+	 defb	000h

+	 defw	uromen

+	endif

+	if CPU_Z180

+	defb	000h

+	defw	ucbar

+	defb	000h

+	defw	ubbr

+	else

+	 defb	000h

+	 defw	ubnk

+	endif

+	defb	003h

+	defw	reg.c2

+	defb	003h

+	defw	reg.e2

+	defb	003h

+	defw	reg.l2

+	defb	003h

+	defw	reg.c

+	defb	003h

+	defw	reg.e

+	defb	003h

+	defw	reg.l

+	defb	000h

+	defw	reg.a2

+	defb	000h

+	defw	reg.b2

+	defb	000h

+	defw	reg.c2

+	defb	000h

+	defw	reg.d2

+	defb	000h

+	defw	reg.e2

+	defb	000h

+	defw	reg.h2

+	defb	000h

+	defw	reg.l2

+	defb	000h

+	defw	reg.a

+	defb	000h

+	defw	reg.b

+	defb	000h

+	defw	reg.c

+	defb	000h

+	defw	reg.d

+	defb	000h

+	defw	reg.e

+	defb	000h

+	defw	reg.h

+	defb	000h

+	defw	reg.l

+	defb	003h

+	defw	reg.ix

+	defb	003h

+	defw	reg.iy

+	defb	003h

+	defw	reg.sp

+	defb	003h

+	defw	reg.pc

+	defb	003h

+	defw	reg.ix

+	defb	003h

+	defw	reg.iy

+	defb	003h

+	defw	reg.sp

+	defb	003h

+	defw	reg.pc

+	defb	000h

+	defw	reg.i

+	defb	000h

+	defw	reg.f2

+	defb	000h

+	defw	reg.f

+CMD.S:

+	ld	hl,(lst.S)

+	call	get_lastarg_def

+l13d8h:

+	ld	(lst.S),hl

+	call	out.hl.@

+	call	OUTBL

+	comst

+	ld	a,(hl)

+	comend

+	call	out.hex

+	call	outbl2

+	call	INLINE

+	call	SKIPBL

+	inc	hl

+	jr	z,l13d8h

+	dec	hl

+	inc	de

+	cp	'.'

+	jp	z,assert_eol

+	cp	'-'

+	jr	nz,l1406h

+	ld	a,(de)

+	or	a

+	dec	hl

+	jr	z,l13d8h

+	inc	hl

+l1406h:

+	dec	de

+	call	get_bytes_m

+	jr	l13d8h

+

+CMD.@:

+	call	assert_eol

+	ld	hl,MSG_at

+	ld	de,offs.@

+	ld	c,001h

+	jp	l1279h

+MSG_at:

+	dc	'@'

+

+CMD.I:

+	ld	hl,CMD.I

+	ld	(CMD_RPT),hl

+	ld	hl,(lst.IP)

+	call	get_lastarg_def

+	ld	(lst.IP),hl

+	ld	b,h

+	ld	c,l

+	if CPU_Z180

+	 ld	a,b

+	 or	a

+	 jr	nz,l1442h

+	 ld	a,c

+	 ld	hl,ucbar

+	 cp	cbar

+	 jr	z,l143fh

+	 ld	hl,ubbr

+	 cp	bbr

+	 jr	nz,l1442h

+l143fh:

+	 ld	a,(hl)

+	 jr	l1444h

+l1442h:

+	endif

+	in	a,(c)

+l1444h:

+	push	af

+	call	out.hex

+	call	outbl4

+	pop	af

+	call	out.bin.b

+	jp	CRLF

+CMD.O:

+	ld	hl,CMD.O

+	ld	(CMD_RPT),hl

+	ld	hl,(lst.OD)

+	call	get_arg_def

+	ld	a,l

+	ld	(lst.OD),a

+	push	af

+	call	skip_to_nextarg

+	ld	hl,(lst.OP)

+	call	get_lastarg_def

+	ld	(lst.OP),hl

+	ld	b,h

+	ld	c,l

+	if CPU_Z180

+	 ld	a,b

+	 or	a

+	 jr	nz,l1489h

+	 ld	a,c

+	 ld	hl,ucbar

+	 cp	cbar

+	 jr	z,l148dh

+	 ld	hl,ubbr

+	 cp	bbr

+	 jr	z,l148dh

+	 cp	cbr

+	 jp	z,ERROR

+l1489h:

+	endif

+	pop	af

+	out	(c),a

+	ret

+	if CPU_Z180

+l148dh:

+	 pop	af

+	 ld	(hl),a

+	 ret

+	endif

+

+CMD.V:

+	call	get_arg3		;1490	get from, size, to

+cmp_mem:

+	push	bc

+	comst

+	 ld	a,(de)

+	 ld	b,(hl)

+	comend

+	cp	b

+	jr	z,l14bah

+	ld	c,a

+	call	out.hl.@

+	call	OUTBL

+	ld	a,b

+	call	out.hex

+	call	outbl2

+	ld	a,c

+	call	out.hex

+	call	OUTBL

+	ex	de,hl

+	call	out.hl.@

+	ex	de,hl

+	call	CRLF

+l14bah:

+	pop	bc

+	inc	hl

+	inc	de

+	dec	bc

+	ld	a,b

+	or	c

+	jr	nz,cmp_mem

+	ret

+

+CMD.M:

+	ld	a,(de)

+	cp	'V'

+	jr	nz,bm_nv

+	inc	de

+bm_nv:

+	push	af			;14c9	save 'V' flag

+	call	get_arg3

+	push	hl

+	push	de

+	push	bc

+	call	CP.HL.DE

+	jr	nc,bm_mvdown

+	add	hl,bc

+	ex	de,hl

+	add	hl,bc

+	ex	de,hl

+	dec	hl

+	dec	de

+	comst

+	 lddr

+	comend

+	jr	bm_done

+bm_mvdown:

+	comst

+	ldir

+	comend

+bm_done:

+	pop	bc

+	pop	de

+	pop	hl

+	pop	af

+	jr	z,cmp_mem		;14ed	validate?

+	ret

+CMD.H:

+	call	EXPR

+	jp	c,l173ch		;no parameters, print High and Max

+	call	skip_to_nextarg

+	push	hl

+	call	EXPR

+	push	af

+	call	assert_eol

+	pop	af

+	ex	de,hl

+	pop	hl

+	jr	c,l1511h

+	push	hl

+	push	de

+	add	hl,de

+	call	l1511h

+	pop	de

+	pop	hl

+	and	a

+	sbc	hl,de

+l1511h:

+	call	out.hl			;1511	val

+	call	outbl2

+	call	sub_0928h		;1517	-val

+	call	outbl4

+	call	out.hl.dec		;151d	dec

+	call	outbl2

+	call	out.hl.decm		;1523	-dec

+	call	outbl4

+	call	out.bin.w		;1529	bin

+	call	outbl2

+	ld	a,l

+	call	out.ascii

+	jp	CRLF

+

+CMD.Q:

+	ld a,(de)

+	sub 'J'

+	ld (lst.Qj),a

+	jr nz,l153fh

+	inc de

+l153fh:

+	call get_arg_range

+	push bc

+	push hl

+	call sub_15a7h

+	pop hl

+l1548h:

+	call sub_1594h

+	jr nz,l1562h

+	push bc

+	push hl

+	ld a,(lst.Qj)

+	or a

+	jr nz,l1559h

+	ld bc,-8

+	add hl,bc

+l1559h:

+	ld bc,MEMDUMP_CNT

+	and a

+	call memdump

+	pop hl

+	pop bc

+l1562h:

+	inc hl

+	ex (sp),hl

+	dec hl

+	ld a,h

+	or l

+	ex (sp),hl

+	jr nz,l1548h

+	pop bc

+	ret

+

+CMD.Z:

+	call get_arg_range

+	push bc

+	push hl

+	call sub_15a7h

+	ld a,b

+	pop hl

+	pop bc

+	push hl

+	ex de,hl

+l1579h:

+	push af

+	ld a,(hl)

+	comst

+	ld (de),a

+	comend

+	pop af

+	inc de

+	cpi

+	jp po,l1592h

+	dec a

+	jr nz,l1579h

+	pop hl

+	comst

+	ldir

+	comend

+	ret

+l1592h:

+	pop hl

+	ret

+

+sub_1594h:

+	push hl

+	push de

+	push bc

+l1597h:

+	ld a,(de)

+	comst

+	cp (hl)

+	comend

+	jr nz,l15a3h

+	inc de

+	inc hl

+	djnz l1597h

+l15a3h:

+	pop bc

+	pop de

+	pop hl

+	ret

+

+sub_15a7h:

+	ld hl,ci.buf+1

+	call get_bytes

+	ld de,ci.buf+1

+	and a

+	sbc hl,de

+	ld b,l

+	ret nz

+	jp ERROR

+

+get_bytes:

+	db	0e6h		;15b8  and 037h (clear carry, skip next opc)

+get_bytes_m:

+	scf

+l15bah:

+	push af

+	call skip_to_nextarg

+	cp 'W'

+	jr nz,l15d9h

+	inc de

+	push hl

+	call sub_0a68h

+	ex de,hl

+	pop bc

+	pop af

+	push af

+	push bc

+	ex (sp),hl

+	jr nc,l15d3h

+	comst

+l15d3h:

+	ld (hl),e

+	comend

+	inc hl

+	ld c,d

+	pop de

+	jr l15e5h

+l15d9h:

+	cp ''''

+	jr z,l15f1h

+	push hl

+	call EXPR

+	ld c,l

+	pop hl

+	jr c,l1626h

+l15e5h:

+	pop af

+	push af

+	jr nc,l15edh

+	comst

+l15edh:

+	ld (hl),c

+	comend

+	inc hl

+	jr l161eh

+l15f1h:

+	inc de

+	ld a,(de)

+	cp ''''

+	jr z,l1607h

+	or a

+	jr z,l1626h

+l15fah:

+	ld c,a

+	pop af

+	push af

+	jr nc,l1603h

+	comst

+l1603h:

+	ld (hl),c

+	comend

+	inc hl

+	jr l15f1h

+l1607h:

+	inc de

+	ld a,(de)

+	cp ''''

+	jr z,l15fah

+	cp '.'

+	jr nz,l161eh

+	inc de

+	dec hl

+	pop af

+	push af

+	jr nc,l161bh

+	comst

+l161bh:

+	set 7,(hl)

+	comend

+	inc hl

+l161eh:

+	pop af

+	jr nc,l15bah

+	ld (lst.S),hl

+	jr l15bah

+

+l1626h:

+	pop af

+	ret nc

+	ld (lst.S),hl

+	ret

+

+CMD.D:

+	ld hl,CMD.D

+	ld (CMD_RPT),hl

+	ld hl,(lst.D)

+	ld bc,00080h

+	call sub_0a82h

+	scf

+memdump:

+	push bc

+	push de

+	push hl

+	ex af,af'

+l1640h:

+	call out.hl.@

+	call z,outbl2

+	call OUTBL

+	ld de,0

+l164ch:

+	comst

+	ld a,(hl)

+	comend

+	inc hl

+	call out.hex

+	call OUTBL

+	dec bc

+	inc e

+	ld a,e

+	cp 010h

+	jr z,l1668h

+	and 003h

+	call z,OUTBL

+	ld a,b

+	or c

+	jr nz,l164ch

+l1668h:

+	call OUTBL

+	and a

+	sbc hl,de

+l166eh:

+	comst

+	ld a,(hl)

+	comend

+	call sub_168fh

+	call OUTCHAR

+	inc hl

+	dec e

+	jr nz,l166eh

+	ex af,af'

+	jr nc,l1683h

+	ld (lst.D),hl

+l1683h:

+	ex af,af'

+	call CRLF

+	ld a,b

+	or c

+	jr nz,l1640h

+	pop hl

+	pop de

+	pop bc

+	ret

+sub_168fh:

+	and 07fh

+	cp 07fh

+	jr z,l1698h

+	cp 020h

+	ret nc

+l1698h:

+	ld a,02eh

+	ret

+

+;	Read Intel Hex File from console.

+CMD.R:

+	ld hl,0

+	call get_lastarg_def	;169e	get offset from command line

+	push hl

+	ld hl,0

+	ld (HILOD),hl

+w_recstart:

+	call i.getchar

+	jr z,l16deh

+	cp ':'

+	jr nz,w_recstart

+	ld c,0			;16b1	init checksum

+	call i.gethexbyte	;16b3	record len

+	ld b,a

+	call i.gethexbyte	;16b7	address high

+	ld h,a

+	call i.gethexbyte	;16bb	address low

+	ld l,a

+	call i.gethexbyte	;16bf	record type (ignored)

+	ld a,b

+	and a			;16c3	record len == 0?

+	jr z,l16deh

+l16c6h:

+	call i.gethexbyte

+	pop de			;16c9	offset

+	push de

+	push hl

+	add hl,de

+	call i.storebyte

+	pop hl

+	inc hl

+	djnz l16c6h		;16d2	repeat for record len

+	call i.gethexbyte	;16d4	checksum

+	ld a,c

+	and a

+	jp nz,ERROR		;16d9	exit if checksum error

+	jr w_recstart		;16dc	next record

+l16deh:

+	pop hl

+	call i.gethexbyte

+	jp l173fh

+

+i.gethexbyte:

+	call sub_16f6h

+	rlca

+	rlca

+	rlca

+	rlca

+	ld d,a

+	call sub_16f6h

+	add a,d

+	ld d,a

+	add a,c

+	ld c,a

+	ld a,d

+	ret

+

+sub_16f6h:

+	call i.getchar

+	jr z,l16ffh

+	call sub_0d26h

+	ret nc

+l16ffh:

+	jp ERROR

+

+i.getchar:

+	call $ci

+	cp 01ah

+	ret

+

+i.storebyte:

+	push af

+	push de

+	ld de,TPA		;170a	lowest allowed load address

+	call CP.HL.DE

+	jp c,ERROR

+	ld de,$stcka		;1713	highest allowed load address

+	call CP.HL.DE

+	jp nc,ERROR

+	ld de,(HILOD)

+	call CP.HL.DE

+	jr c,l1728h

+	ld (HILOD),hl

+l1728h:

+	ld de,(MAXLOD)

+	call CP.HL.DE

+	jr c,l1734h

+	ld (MAXLOD),hl

+l1734h:

+	pop de

+	pop af

+	comst

+	ld (hl),a		;173a	store byte

+	comend

+	ret

+

+l173ch:

+	call assert_eol

+l173fh:

+	ld hl,MSG_high

+	call PSTR

+	ld hl,(HILOD)

+	call out.hl

+	ld hl,MSG_max

+	call PSTR

+	ld hl,(MAXLOD)

+	call out.hl

+	jp CRLF

+

+MSG_high:

+	DC	'High = '

+MSG_max:

+	DC	'  Max = '

+

+CMD.A:

+	ld hl,(lst.A)

+	call get_lastarg_def

+	push hl

+	pop iy

+	ld hl,l17c4h

+	ld (CMD_ERR),hl

+	ld (XB068),sp

+l177ch:

+	push iy

+	pop hl

+	ld (lst.A),hl

+	ld (OFFS.pc),hl

+	push hl

+	call sub_1f3fh

+	pop iy

+	ld c,b

+	ld de,(offs.@)

+	ld a,d

+	or e

+	ld b,011h

+	jr z,l1798h

+	ld b,019h

+l1798h:

+	call OUTBL

+	ld a,(CON.COL)

+	cp b

+	jr c,l1798h

+	push bc

+	call INLINE

+	pop bc

+	call SKIPBL

+	cp '.'

+	ret z

+	cp '-'

+	jr nz,l17b6h

+	ld iy,(XB06C)

+	jr l177ch

+l17b6h:

+	and a

+	call nz,sub_17cdh

+	ld (XB06C),iy

+	ld b,0

+	add iy,bc

+	jr l177ch

+l17c4h:

+	call l07eah

+	ld sp,(XB068)

+	jr l177ch

+

+sub_17cdh:

+	call SKIPBL

+	ld hl,t_MNEMONICS

+	call sub_0a15h

+	jp nc,ERROR

+	call SKIPBL

+	push de

+	ld a,b

+	add a,b

+	add a,b

+	ld hl,b_0x17EE_start

+	call ADD_HL_A

+	ld e,(hl)

+	inc hl

+	ld d,(hl)

+	inc hl

+	ld b,(hl)

+	ex de,hl

+	pop de

+	jp (hl)

+

+b_0x17EE_start:

+	defw l1b54h

+	defb 088h

+	defw l1b74h

+	defb 080h

+	defw l1babh

+	defb 0a0h

+	defw l1c14h

+	defb 040h

+	defw l1c38h

+	defb 0c4h

+	defw l1b36h

+	defb 03fh

+	defw l1babh

+	defb 0b8h

+	defw gen.opc.ED2

+	defb 0a9h

+	defw gen.opc.ED2

+	defb 0b9h

+	defw gen.opc.ED2

+	defb 0a1h

+	defw gen.opc.ED2

+	defb 0b1h

+	defw l1b36h

+	defb 02fh

+	defw l1b36h

+	defb 027h

+	defw l1dabh

+	defb 005h

+	defw l1b36h

+	defb 0f3h

+	defw l1ca4h

+	defb 010h

+	defw l1b36h

+	defb 0fbh

+	defw l1d54h

+	defb 0e3h

+	defw l1b36h

+	defb 0d9h

+	defw l1b36h

+	defb 076h

+	defw l1cbfh

+	defb 046h

+	defw l1cf8h

+	defb 040h

+	defw l1dabh

+	defb 004h

+	defw gen.opc.ED2

+	defb 0aah

+	defw gen.opc.ED2

+	defb 0bah

+	defw gen.opc.ED2

+	defb 0a2h

+	defw gen.opc.ED2

+	defb 0b2h

+	defw l1c5eh

+	defb 0c2h

+	defw l1cabh

+	defb 020h

+	defw l1934h

+	defb 040h

+	defw gen.opc.ED2

+	defb 0a8h

+	defw gen.opc.ED2

+	defb 0b8h

+	defw gen.opc.ED2

+	defb 0a0h

+	defw gen.opc.ED2

+	defb 0b0h

+	defw gen.opc.ED2

+	defb 044h

+	defw l1b36h

+	defb 000h

+	defw l1babh

+	defb 0b0h

+	defw gen.opc.ED2

+	defb 0bbh

+	defw gen.opc.ED2

+	defb 0b3h

+	defw l1d2ch

+	defb 041h

+	defw gen.opc.ED2

+	defb 0abh

+	defw gen.opc.ED2

+	defb 0a3h

+	defw l1ce4h

+	defb 0c1h

+	defw l1ce4h

+	defb 0c5h

+	defw l1c14h

+	defb 080h

+	defw l1c50h

+	defb 0c0h

+	defw gen.opc.ED2

+	defb 04dh

+	defw gen.opc.ED2

+	defb 045h

+	defw l1bd8h

+	defb 010h

+	defw l1b36h

+	defb 017h

+	defw l1bd8h

+	defb 000h

+	defw l1b36h

+	defb 007h

+	defw gen.opc.ED2

+	defb 06fh

+	defw l1bd8h

+	defb 018h

+	defw l1b36h

+	defb 01fh

+	defw l1bd8h

+	defb 008h

+	defw l1b36h

+	defb 00fh

+	defw gen.opc.ED2

+	defb 067h

+	defw l1cd5h

+	defb 0c7h

+	defw l1b54h

+	defb 098h

+	defw l1b36h

+	defb 037h

+	defw l1c14h

+	defb 0c0h

+	defw l1bd8h

+	defb 020h

+	defw l1bd8h

+	defb 028h

+	defw l1bd8h

+	defb 038h

+	defw l1babh

+	defb 090h

+	defw l1babh

+	defb 0a8h

+	defw A.IN0

+	defb 000h

+	defw A.MLT

+b_0x18BC_start:

+	defb 04ch

+	ld b,e

+	dec de

+

+b_0x18BF_start:

+	defb 08bh

+	defw gen.opc.ED2

+	defb 09bh

+	defw gen.opc.ED2

+	defb 083h

+	defw gen.opc.ED2

+	defb 093h

+	defw l18fdh

+	defb 001h

+	defw gen.opc.ED2

+	defb 076h

+	defw l191dh

+	defb 004h

+	defw l192ch

+	defb 074h

+A.IN0:

+	call sub_1e41h

+	jr nc,l1931h

+	cp 006h

+	jr z,l1931h

+	rlca

+	rlca

+	rlca

+	add a,b

+	ld b,a

+	call sub_1ed1h

+	call sub_1e06h

+l18e9h:

+	call assert_eol

+	comst

+	ld (iy+000h),0edh

+	ld (iy+001h),b

+	ld (iy+002h),l

+	comend

+	ld c,003h

+	ret

+l18fdh:

+	call sub_1e06h

+	call sub_1ed1h

+	call sub_1e41h

+	jr nc,l1931h

+	cp 006h

+	jr z,l1931h

+	rlca

+	rlca

+	rlca

+	add a,b

+	ld b,a

+	jr l18e9h

+A.MLT:

+	call sub_1e2eh

+	jr nc,l1931h

+	add a,b

+	ld b,a

+	jp gen.opc.ED2

+l191dh:

+	call sub_1e41h

+	jr nc,l192ah

+	rlca

+	rlca

+	rlca

+	add a,b

+	ld b,a

+	jp gen.opc.ED2

+l192ah:

+	ld b,064h

+l192ch:

+	call sub_1e12h

+	jr l18e9h

+l1931h:

+	jp ERROR

+l1934h:

+	call sub_1e41h

+	jp c,l19bfh

+	call sub_1e68h

+	jp c,l1a64h

+	call sub_1e2eh

+	jp c,l1a93h

+	call sub_1e50h

+	jp c,l1af0h

+	ld a,(de)

+	cp 049h

+	jp z,l1b0ch

+	cp 052h

+	jp z,l1b14h

+	cp 028h

+	jp nz,ERROR

+	inc de

+	call sub_1e2eh

+	jp c,l1b23h

+	call tst_EXPR

+	call sub_1ed8h

+	call sub_1ed1h

+	call sub_1e2eh

+	jr c,l19adh

+	call sub_1e50h

+	jr nc,l1991h

+	ld b,022h

+l1978h:

+	call assert_eol

+	ld a,(pfx.IXY)

+l197eh:

+	comst

+	ld (iy+000h),a

+	ld (iy+001h),b

+	ld (iy+002h),l

+	ld (iy+003h),h

+	comend

+	ld c,004h

+	ret

+l1991h:

+	ld a,(de)

+	cp 041h

+	jp nz,ERROR

+	inc de

+	ld b,032h

+l199ah:

+	call assert_eol

+	comst

+	ld (iy+000h),b

+	ld (iy+001h),l

+	ld (iy+002h),h

+	comend

+	ld c,003h

+	ret

+l19adh:

+	cp 020h

+	jr z,l19bbh

+	add a,043h

+	ld b,a

+l19b4h:

+	call assert_eol

+	ld a,0edh

+	jr l197eh

+l19bbh:

+	ld b,022h

+	jr l199ah

+l19bfh:

+	ld b,a

+	call sub_1ed1h

+	call sub_1e41h

+	jr nc,l19dbh

+	push af

+	ld a,b

+	rlca

+	rlca

+	rlca

+	ld b,a

+	pop af

+	add a,b

+	add a,040h

+	cp 076h

+	jp z,ERROR

+l19d7h:

+	ld b,a

+	jp l1b36h

+l19dbh:

+	call sub_1e68h

+	jr nc,l1a02h

+	ld a,b

+	rlca

+	rlca

+	rlca

+	add a,046h

+	cp 076h

+	jp z,ERROR

+l19ebh:

+	ld b,a

+	call assert_eol

+	ld a,(pfx.IXY)

+	comst

+	ld (iy+000h),a

+	ld (iy+001h),b

+	ld (iy+002h),c

+	comend

+	ld c,003h

+	ret

+l1a02h:

+	ld a,(de)

+	cp 'I'

+	jr z,l1a15h

+	cp 'R'

+	jr nz,l1a21h

+	ld a,b

+	cp 007h

+	jp nz,ERROR

+	ld b,05fh

+	jr l1a1dh

+l1a15h:

+	ld a,b

+	cp 007h

+	jp nz,ERROR

+	ld b,057h

+l1a1dh:

+	inc de

+	jp gen.opc.ED2

+l1a21h:

+	cp '('

+	jr z,l1a3fh

+	call sub_1e12h

+	ld a,b			;1a28	ld r,nn

+	rlca

+	rlca

+	rlca

+	add a,006h

+l1a2eh:

+	ld b,a

+l1a2fh:

+	call assert_eol

+	comst

+	ld (iy+000h),b

+	ld (iy+001h),l

+	comend

+	ld c,002h

+	ret

+l1a3fh:

+	inc de

+	ld a,b

+	cp 007h

+	jp nz,ERROR

+	call sub_1e2eh

+	jr nc,l1a59h

+	cp 030h

+	jp nc,ERROR

+	add a,00ah

+	ld b,a

+	call sub_1ed8h

+	jp l1b36h

+l1a59h:

+	call tst_EXPR

+	call sub_1ed8h

+	ld b,03ah

+	jp l199ah

+l1a64h:

+	call sub_1ed1h

+	call sub_1e41h

+	jr nc,l1a76h

+	cp 006h

+	jp z,ERROR

+	add a,070h

+	jp l19ebh

+l1a76h:

+	call sub_1e12h

+	call assert_eol

+	ld a,(pfx.IXY)

+	comst

+	ld (iy+000h),a		;1a83	dd/fd

+	ld (iy+001h),036h

+	ld (iy+002h),c		;1a8a 	displacement

+	ld (iy+003h),l		;1a8d	nn

+	comend

+	ld c,4

+	ret

+l1a93h:

+	ld b,a

+	call sub_1ed1h

+	ld hl,t_HL.AF

+	call sub_0a23h

+	jr c,l1abeh

+	call sub_1e50h

+	jr nc,l1ac7h

+	ld a,b

+	cp 030h

+	jr nz,l1b20h

+	ld b,0f9h

+l1aabh:

+	call assert_eol

+	ld a,(pfx.IXY)

+	comst

+	ld (iy+000h),a

+	ld (iy+001h),b

+	comend

+	ld c,002h

+	ret

+l1abeh:

+	ld a,b

+	cp 030h

+	jr nz,l1b20h

+	ld b,0f9h

+	jr l1b36h

+l1ac7h:

+	ld a,(de)

+	cp 028h

+	jr nz,l1ae3h

+	inc de

+	call tst_EXPR

+	call sub_1ed8h

+	ld a,b

+	cp 020h

+	jr z,l1adeh

+	add a,04bh

+	ld b,a

+	jp l19b4h

+l1adeh:

+	ld b,02ah

+	jp l199ah

+l1ae3h:

+	call tst_EXPR

+	call assert_eol

+	ld a,001h

+	add a,b

+	ld b,a

+	jp l199ah

+l1af0h:

+	call sub_1ed1h

+	ld a,(de)

+	cp 028h

+	jr nz,l1b04h

+	inc de

+	call tst_EXPR

+	call sub_1ed8h

+	ld b,02ah

+	jp l1978h

+l1b04h:

+	call tst_EXPR

+	ld b,021h

+	jp l1978h

+l1b0ch:

+	inc de

+	call sub_1ed1h

+	ld b,047h

+	jr l1b1ah

+l1b14h:

+	inc de

+	call sub_1ed1h

+	ld b,04fh

+l1b1ah:

+	ld a,(de)

+	inc de

+	cp 041h

+	jr z,gen.opc.ED2

+l1b20h:

+	jp ERROR

+l1b23h:

+	cp 020h

+	jr nc,l1b20h

+	add a,002h

+	ld b,a

+	call sub_1ed8h

+	call sub_1ed1h

+	ld a,(de)

+	cp 041h

+	jr nz,l1b20h

+	inc de

+l1b36h:

+	call assert_eol

+	comst

+	ld (iy+000h),b

+	comend

+	ld c,001h

+	ret

+gen.opc.ED2:

+	call assert_eol

+	comst

+	ld (iy+000h),0edh

+	ld (iy+001h),b

+	comend

+	ld c,002h

+	ret

+l1b54h:

+	ld hl,t_HL.AF

+	call sub_0a23h

+	jr nc,l1babh

+	call sub_1ed1h

+	call sub_1e2eh

+	jp nc,ERROR

+	push af

+	ld a,b

+	cp 088h

+	ld b,04ah

+	jr z,l1b6fh

+	ld b,042h

+l1b6fh:

+	pop af

+	add a,b

+l1b71h:

+	ld b,a

+	jr gen.opc.ED2

+l1b74h:

+	ld hl,t_HL.AF

+	call sub_0a23h

+	jr c,l1b9dh

+	call sub_1e50h

+	jr nc,l1babh

+	call sub_1ed1h

+	ld hl,t_BC.DE.IX.SP

+	ld a,(pfx.IXY)

+	cp 0fdh

+	jr nz,l1b91h

+	ld hl,t_BC.DE.IY.SP

+l1b91h:

+	call sub_1e2bh

+	jp nc,ERROR

+	add a,009h

+l1b99h:

+	ld b,a

+	jp l1aabh

+l1b9dh:

+	call sub_1ed1h

+	call sub_1e2eh

+	jp nc,ERROR

+	add a,009h

+	jp l19d7h

+l1babh:

+	ld a,(de)

+	cp 041h

+	jr nz,l1bbbh

+	push de

+	inc de

+	call skip_to_nextarg

+	jr z,l1bbah

+	pop de

+	jr l1bbbh

+l1bbah:

+	pop af

+l1bbbh:

+	call sub_1e41h

+	jr c,l1bceh

+	call sub_1e68h

+	jr c,l1bd2h

+	call sub_1e12h

+	ld a,b

+	add a,046h

+	jp l1a2eh

+l1bceh:

+	add a,b

+	jp l19d7h

+l1bd2h:

+	ld a,b

+	add a,006h

+	jp l19ebh

+l1bd8h:

+	call sub_1e41h

+	jr c,l1c01h

+	call sub_1e68h

+	jp nc,ERROR

+	ld a,b

+	add a,006h

+	ld b,a

+l1be7h:

+	call assert_eol

+	ld a,(pfx.IXY)

+	comst

+	ld (iy+000h),a

+	ld (iy+001h),0cbh

+	ld (iy+002h),c

+	ld (iy+003h),b

+	comend

+	ld c,004h

+	ret

+l1c01h:

+	add a,b

+l1c02h:

+	ld b,a

+	call assert_eol

+	comst

+	ld (iy+000h),0cbh

+	ld (iy+001h),b

+	comend

+	ld c,002h

+	ret

+l1c14h:

+	call sub_1de6h

+	call sub_1ed1h

+	call sub_1e41h

+	jr c,l1c2fh

+	call sub_1e68h

+	jp nc,ERROR

+	ld a,l

+	rlca

+	rlca

+	rlca

+	add a,006h

+	add a,b

+	ld b,a

+	jr l1be7h

+l1c2fh:

+	add a,b

+	ld b,a

+	ld a,l

+	rlca

+	rlca

+	rlca

+	add a,b

+	jr l1c02h

+l1c38h:

+	push de

+	call sub_1eb8h

+	jr nc,l1c47h

+	add a,b

+	ld b,a

+	call skip_to_nextarg

+	jr z,l1c49h

+	pop de

+	push de

+l1c47h:

+	ld b,0cdh

+l1c49h:

+	pop af

+	call tst_EXPR

+	jp l199ah

+l1c50h:

+	call sub_1eb8h

+	jr nc,l1c59h

+	add a,b

+	ld b,a

+	jr l1c5bh

+l1c59h:

+	ld b,0c9h

+l1c5bh:

+	jp l1b36h

+l1c5eh:

+	push de

+	call sub_1eb8h

+	jr c,l1c71h

+l1c64h:

+	pop de

+	ld hl,b_0x1C97_start

+	call sub_0a15h

+	jr c,l1c7fh

+	ld b,0c3h

+	jr l1c79h

+l1c71h:

+	add a,b

+	ld b,a

+	call skip_to_nextarg

+	jr nz,l1c64h

+	pop af

+l1c79h:

+	call tst_EXPR

+	jp l199ah

+l1c7fh:

+	call assert_eol

+	ld a,b

+	and a

+	jr nz,l1c8bh

+	ld b,0e9h

+	jp l1b36h

+l1c8bh:

+	ld b,0ddh

+	dec a

+	jr z,l1c92h

+	ld b,0fdh

+l1c92h:

+	ld l,0e9h

+	jp l1a2fh

+

+b_0x1C97_start:

+	DC	'(HL)'

+	DC	'(IX)'

+	DC	'(IY)'

+	DB	0

+

+l1ca4h:

+	call skip_to_nextarg

+	ld b,010h

+	jr l1cb9h

+l1cabh:

+	call sub_1ebfh

+	jr c,l1cb4h

+	ld b,018h

+	jr l1cb9h

+l1cb4h:

+	add a,b

+	ld b,a

+	call sub_1ed1h

+l1cb9h:

+	call sub_1defh

+	jp l1a2fh

+l1cbfh:

+	call sub_1e12h

+	ld a,l

+	cp 003h

+	jr nc,l1d23h

+	and a

+	jr z,l1cd2h

+	ld b,056h

+	cp 001h

+	jr z,l1cd2h

+	ld b,05eh

+l1cd2h:

+	jp gen.opc.ED2

+l1cd5h:

+	call sub_1e12h

+	ld a,l

+	push af

+	add a,b

+	ld b,a

+	pop af

+	and 0c7h

+	jr nz,l1d23h

+	jp l1b36h

+l1ce4h:

+	call sub_1e50h

+	jr c,l1cf2h

+	call sub_1e25h

+	jr nc,l1d23h

+	add a,b

+	jp l19d7h

+l1cf2h:

+	ld a,b

+	add a,020h

+	jp l1b99h

+l1cf8h:

+	call sub_1e41h

+	jr nc,l1d23h

+	cp 006h

+	jr z,l1d23h

+	rlca

+	rlca

+	rlca

+	add a,b

+	ld b,a

+	cp 078h

+	jr nz,l1d1ah

+	call sub_1ed1h

+	call sub_1d26h

+	jr c,l1d20h

+	call sub_1e06h

+	ld b,0dbh

+	jp l1a2fh

+l1d1ah:

+	call sub_1ed1h

+	call sub_1d26h

+l1d20h:

+	jp c,gen.opc.ED2

+l1d23h:

+	jp ERROR

+sub_1d26h:

+	ld hl,t__C_

+	jp sub_0a23h

+l1d2ch:

+	call sub_1d26h

+	jr nc,l1d44h

+	call sub_1ed1h

+	call sub_1e41h

+	jr nc,l1d23h

+	cp 006h

+	jr z,l1d23h

+	rlca

+	rlca

+	rlca

+	add a,b

+	jp l1b71h

+l1d44h:

+	call sub_1e06h

+	call sub_1ed1h

+	cp 041h

+	jr nz,l1d23h

+	inc de

+	ld b,0d3h

+	jp l1a2fh

+l1d54h:

+	ld hl,b_0x1D80_start

+	call sub_0a15h

+	jp nc,ERROR

+	ld c,b

+	call assert_eol

+	ld b,000h

+	ld hl,b_0x1DA1_start

+	add hl,bc

+	add hl,bc

+	ld a,(hl)

+	comst

+	ld (iy+000h),a

+	comend

+	ld c,001h

+	inc hl

+	ld a,(hl)

+	and a

+	ret z

+	comst

+	ld (iy+001h),a

+	comend

+	ld c,002h

+	ret

+

+b_0x1D80_start:

+	DC	'AF,AF'''

+l1d86h:

+	DC	'DE,HL'

+	DC	'(SP),HL'

+	DC	'(SP),IX'

+	DC	'(SP),IY'

+	db	000h

+

+b_0x1DA1_start:

+	db	008h

+	db	000h

+	db	0ebh

+	db	000h

+	db	0e3h

+	db	000h

+	db	0ddh

+	db	0e3h

+	db	0fdh

+	db	0e3h

+l1dabh:

+	call sub_1e50h

+	jr c,l1dc6h

+	call sub_1e2eh

+	jr c,l1dd2h

+	call sub_1e41h

+	jr c,l1ddfh

+	call sub_1e68h

+	jp nc,ERROR

+	ld a,b

+	add a,030h

+	jp l19ebh

+l1dc6h:

+	ld a,b

+	ld b,023h

+	cp 004h

+	jr z,l1dcfh

+	ld b,02bh

+l1dcfh:

+	jp l1aabh

+l1dd2h:

+	push af

+	ld a,b

+	ld b,003h

+	cp 004h

+	jr z,l1ddch

+	ld b,00bh

+l1ddch:

+	pop af

+	jr l1de2h

+l1ddfh:

+	rlca

+	rlca

+	rlca

+l1de2h:

+	add a,b

+	jp l19d7h

+sub_1de6h:

+	call sub_1e12h

+	ld a,l

+	cp 008h

+	jr nc,error1

+	ret

+sub_1defh:

+	call tst_EXPR

+	push bc

+	push iy

+	pop bc

+	and a

+	sbc hl,bc

+	dec hl

+	dec hl

+	pop bc

+	call sub_1e15h

+	ld a,h

+	xor l

+	bit 7,a

+	jr nz,error1

+	ret

+sub_1e06h:

+	ld a,(de)

+	cp 028h

+	jr nz,sub_1e12h

+	inc de

+	call sub_1e12h

+	jp sub_1ed8h

+

+sub_1e12h:

+	call tst_EXPR

+sub_1e15h:

+	ld a,h

+	and a

+	ret z

+	inc a

+	ret z

+	jr error1

+

+tst_EXPR:

+	push bc

+	call EXPR

+	pop bc

+	ret nc

+error1:

+	jp ERROR

+sub_1e25h:

+	push hl

+	ld hl,t_BC.DE.HL.AF

+	jr l1e32h

+sub_1e2bh:

+	push hl

+	jr l1e32h

+sub_1e2eh:

+	push hl

+	ld hl,t_BC.DE.HL.SP

+l1e32h:

+	push bc

+	call sub_0a15h

+	jr nc,l1e3eh

+	ld a,b

+	rlca

+	rlca

+	rlca

+	rlca

+	scf

+l1e3eh:

+	pop bc

+	pop hl

+	ret

+sub_1e41h:

+	call SKIPBL

+	push bc

+	push hl

+	ld hl,t_BCDEHL_HL_A

+	call sub_0a15h

+	ld a,b

+	pop hl

+	pop bc

+	ret

+sub_1e50h:

+	push hl

+	push bc

+	ld hl,t_IX.IY

+	call sub_0a15h

+	jr nc,l1e65h

+	ld a,0ddh

+	dec b

+	jr nz,l1e61h

+	ld a,0fdh

+l1e61h:

+	ld (pfx.IXY),a

+	scf

+l1e65h:

+	pop bc

+	pop hl

+	ret

+sub_1e68h:

+	push hl

+	push bc

+	ld a,(de)

+	cp '('

+	jr nz,l1eb4h

+	push de

+	inc de

+	ld hl,t_IX.IY

+	call sub_0a15h

+	jr nc,l1eb3h

+	pop af

+	ld a,0ddh

+	dec b

+	jr nz,l1e81h

+	ld a,0fdh

+l1e81h:

+	ld (pfx.IXY),a

+	ld a,(de)

+	cp '+'

+	jr z,l1e95h

+	cp ')'

+	ld hl,0

+	jr z,l1eadh

+	cp '-'

+	jp nz,ERROR

+l1e95h:

+	push af

+	inc de

+	call sub_1e12h		;1e97	get displacement

+	pop af

+	cp '+'

+	jr z,l1ea7h

+	ld b,h

+	ld c,l

+	ld hl,0

+	and a

+	sbc hl,bc

+l1ea7h:

+	ld a,(de)

+	cp ')'

+	jp nz,ERROR

+l1eadh:

+	inc de

+	pop bc

+	ld c,l

+	pop hl

+	scf

+	ret

+l1eb3h:

+	pop de

+l1eb4h:

+	pop bc

+	pop hl

+	and a

+	ret

+sub_1eb8h:

+	ld hl,t_tstfl_ZCPS

+	ld c,007h

+	jr l1ec4h

+sub_1ebfh:

+	ld hl,t_tstfl_ZC

+	ld c,003h

+l1ec4h:

+	push bc

+	call sub_0a15h

+	ld a,b

+	pop bc

+	ret nc

+	and c

+	rlca

+	rlca

+	rlca

+	scf

+	ret

+sub_1ed1h:

+	call skip_to_nextarg

+	ret z

+l1ed5h:

+	jp ERROR

+sub_1ed8h:

+	ld a,(de)

+	cp 029h

+	jr nz,l1ed5h

+	inc de

+	ret

+CMD.L:

+	ld hl,CMD.L

+	ld (CMD_RPT),hl

+	call EXPR

+	jr nc,l1eedh

+	ld hl,(lst.L)

+l1eedh:

+	push hl

+	pop iy

+	call skip_to_nextarg

+	call sub_0aa5h

+	jr nc,l1f17h

+	call assert_eol

+	ld b,010h

+l1efdh:

+	push bc

+	push iy

+	pop hl

+	push hl

+	call sub_1f3fh

+	call CRLF

+	pop iy

+	ld c,b

+	ld b,000h

+	add iy,bc

+	ld (lst.L),iy

+	pop bc

+	djnz l1efdh

+	ret

+l1f17h:

+	call assert_eol

+	ld h,b

+	ld l,c

+	ld a,b

+	or c

+	jr nz,l1f21h

+	dec hl

+l1f21h:

+	push hl

+	push iy

+	pop hl

+	push hl

+	call sub_1f3fh

+	call CRLF

+	pop iy

+	ld e,b

+	ld d,000h

+	add iy,de

+	ld (lst.L),iy

+	pop hl

+	and a

+	sbc hl,de

+	ret z

+	ret c

+	jr l1f21h

+sub_1f3fh:

+	call out.hl.@

+	call z,OUTBL

+	call OUTBL

+	sub a

+	ld (CON.COL),a

+	call sub_1f77h

+	and a

+	ret z

+l1f51h:

+	call OUTBL

+	ld a,(CON.COL)

+	cp 010h

+	jr c,l1f51h

+sub_1f5bh:

+	ld de,(offs.@)

+	ld a,d

+	or e

+	ret z

+	ld a,'('

+	call OUTCHAR

+	ld a,'@'

+	call OUTCHAR

+	and a

+	sbc hl,de

+	call out.hl

+	ld a,')'

+	jp OUTCHAR

+sub_1f77h:

+	sub a

+	ld (XBE03),a

+	call sub_1f9eh

+	jr nc,l1f91h

+	push bc

+	call sub_2581h

+	ex de,hl

+	call sub_1fdbh

+	pop bc

+	ld a,(XBE03)

+	ld hl,(XBE01)

+	scf

+	ret

+l1f91h:

+	ld hl,b_0x1F9B_start

+	call PSTR

+	ld b,001h

+	sub a

+	ret

+

+b_0x1F9B_start:

+	DC	'???'

+

+sub_1f9eh:

+	sub a

+	ld (is.pfx.IXY),a

+	comst

+	ld a,(iy+000h)

+	comend

+	cp 0edh

+	jp z,disas_pfx.ED

+	cp 0ddh

+	jr z,l1fc5h

+	cp 0fdh

+	jr z,l1fc9h

+sub_1fb6h:

+	comst

+	ld a,(iy+000h)

+	comend

+	cp 0cbh

+	jp z,l2061h

+	jp l2078h

+l1fc5h:

+	ld a,001h

+	jr l1fcbh

+l1fc9h:

+	ld a,002h

+l1fcbh:

+	ld (is.pfx.IXY),a

+	call sub_1fdch

+	ret nc

+	push bc

+	call sub_1fb6h

+	pop af

+	add a,b

+	ld b,a

+	scf

+	ret

+

+sub_1fdbh:

+	jp (hl)

+

+sub_1fdch:

+	inc iy

+	ld hl,b_0x2011_start

+	call sub_20bbh

+	ld b,002h

+	ret c

+	ld hl,l202ch

+	call sub_20bbh

+	ld b,001h

+	ret c

+	comst

+	ld a,(iy+000h)

+	comend

+	cp 0cbh

+	jr nz,l200fh

+	comst

+	ld a,(iy+002h)

+	comend

+	cp 036h

+	ret z

+	and 007h

+	cp 006h

+	jr nz,l200fh

+	ld b,002h

+	scf

+	ret

+l200fh:

+	and a

+	ret

+

+b_0x2011_start:

+	db	034h

+	db	035h

+	db	036h

+	db	046h

+	db	04eh

+	db	056h

+	db	05eh

+	db	066h

+	db	06eh

+	db	070h

+	db	071h

+	db	072h

+	db	073h

+	db	074h

+	db	075h

+	db	076h

+	db	077h

+	db	07eh

+	db	086h

+	db	08eh

+	db	096h

+	db	09eh

+	db	0a6h

+	db	0aeh

+	db	0b6h

+	db	0beh

+	db	000h

+l202ch:

+	db	009h

+	db	019h

+	db	021h

+	db	022h

+	db	023h

+	db	029h

+	db	02ah

+	db	02bh

+	db	039h

+	db	0e1h

+	db	0e3h

+	db	0e5h

+	db	0e9h

+	db	0f9h

+	db	000h

+

+disas_pfx.ED:

+	inc iy

+	ld hl,b_0x2200_start

+	call sub_209dh

+	ld b,002h

+	ret c

+	ld hl,l2235h

+	call lookup_opc

+	ld b,002h

+	ret c

+	ld hl,l228bh

+	call lookup_opc

+	ld b,003h

+	ret c

+	ld hl,l22b4h

+	call lookup_opc

+	ld b,004h

+	ret

+l2061h:

+	push iy

+	inc iy

+	ld a,(is.pfx.IXY)

+	and a

+	jr z,l206dh

+	inc iy

+l206dh:

+	ld hl,l22c9h

+	call lookup_opc

+	pop iy

+	ld b,002h

+	ret

+l2078h:

+	ld hl,b_0x218B_start

+	call lookup_opc

+	ld b,002h

+	ret c

+	ld hl,b_0x20ED_start

+	call sub_209dh

+	ld b,001h

+	ret c

+	ld hl,b_0x2108_start

+	call lookup_opc

+	ld b,001h

+	ret c

+	ld hl,b_0x21D2_start

+	call lookup_opc

+	ret nc

+	ld b,003h

+	ret

+

+sub_209dh:

+	ld a,(hl)

+	cp 0ffh

+	ret z

+	comst

+	cp (iy+000h)

+	comend

+	jr z,l20aeh

+	inc hl

+	inc hl

+	jr sub_209dh

+l20aeh:

+	inc hl

+	ld c,(hl)

+	ld hl,t_MNEMONICS

+	ld b,000h

+	add hl,bc

+	ld de,l230bh

+	scf

+	ret

+sub_20bbh:

+	ld a,(hl)

+	and a

+	ret z

+	inc hl

+	comst

+	cp (iy+000h)

+	comend

+	jr nz,sub_20bbh

+	scf

+	ret

+

+lookup_opc:

+	comst

+	ld a,(iy+000h)

+	comend

+	and (hl)

+	inc hl

+	cp (hl)

+	jr z,l20dfh

+	inc hl

+	inc hl

+	inc hl

+	inc hl

+	ld a,(hl)

+	and a

+	jr nz,lookup_opc

+	ret

+l20dfh:

+	inc hl

+	ld c,(hl)

+	inc hl

+	ld e,(hl)

+	inc hl

+	ld d,(hl)

+	ld hl,t_MNEMONICS

+	ld b,000h

+	add hl,bc

+	scf

+	ret

+

+b_0x20ED_start:			;	1 byte opcodes (no parameters)

+	db	076h		;20ed	halt

+	db	039h		;20ee

+	db	0d9h		;20ef	exx

+	db	036h

+	db	0f3h		;20f1	di

+	db	02ch

+	db	0fbh		;20f3	ei

+	db	032h

+	db	000h		;20f5	nop

+	db	069h

+	db	007h		;20f7	rlca

+	db	09eh

+	db	00fh		;20f9	rrca

+	db	0adh

+	db	017h		;20fb	rla

+	db	098h

+	db	01fh		;20fd	rra

+	db	0a7h

+	db	027h		;20ff	daa

+	db	026h

+	db	02fh		;2101	cpl

+	db	023h

+	db	037h		;2103	scf

+	db	0bah

+	db	03fh		;2105	ccf

+	db	010h

+	db	0ffh		;2107	EOT

+

+b_0x2108_start:			;	1 byte opcodes

+	defb 0c0h		;2108	ld r,r

+	defb 040h

+	defb 056h

+	defw l22fch

+

+	defb 0f8h		;210d	add a,r

+	defb 080h

+	defb 003h

+	defw l2305h

+

+	defb 0f8h		;2112	adc a,r

+	defb 088h

+	defb 000h

+	defw l2305h

+

+	defb 0f8h

+	defb 090h

+	defb 0c9h

+	defw l24ebh

+

+	defb 0f8h

+	defb 098h

+	defb 0b7h

+	defw l2305h

+

+	defb 0f8h

+	defb 0a0h

+	defb 006h

+	defw l24ebh

+

+	defb 0f8h

+	defb 0a8h

+	defb 0cch

+	defw l24ebh

+

+	defb 0f8h

+	defb 0b0h

+	defb 06ch

+	defw l24ebh

+

+	defb 0f8h

+	defb 0b8h

+	defb 013h

+	defw l24ebh

+

+	defb 0c7h

+	defb 0c0h		;2136	ret cc

+	defb 08bh

+	defw l2561h

+

+	defb 0c7h		;213a	rst

+	defb 0c7h

+	defb 0b4h

+	defw l231eh

+

+	defb 0ffh		;213f	ret

+	defb 0c9h

+	defb 08bh

+	defw l230bh

+

+	defb 0cfh		;2144	pop rr

+	defb 0c1h

+	defb 081h

+	defw l2546h

+

+	defb 0cfh		;2149	push rr

+	defb 0c5h

+	defb 084h

+	defw l2546h

+

+	defb 0ffh		;214e	ex (sp),hl

+	defb 0e3h

+	defb 034h

+	defw l232ah

+

+	defb 0ffh		;2153	jp (hl)

+	defb 0e9h

+	defb 052h

+	defw l2338h

+

+	defb 0ffh		;2158	ex de,hl

+	defb 0ebh

+	defb 034h

+	defw l2345h

+

+	defb 0ffh		;215d	ld sp,hl

+	defb 0f9h

+	defb 056h

+	defw l234bh

+

+	defb 0cfh		;2162	inc rr

+	defb 003h

+	defb 041h

+	defw l254bh

+

+	defb 0cfh		;2167	dec rr

+	defb 00bh

+	defb 029h

+	defw l254bh

+

+

+	defb 0c7h		;216c	inc r

+	defb 004h

+	defb 041h

+	defw l24dfh

+

+	defb 0c7h		;2171	dec r

+	defb 005h

+	defb 029h

+	defw l24dfh

+

+	defb 0ffh		;2176	ex af,af'

+	defb 008h

+	defb 034h

+	defw l2357h

+

+	defb 0cfh		;217b	add hl,rr

+	defb 009h

+	defb 003h

+	defw l235dh

+

+	defb 0efh		;2180	ld (rr),a ;rr=bc,de

+	defb 002h

+	defb 056h

+	defw l2366h

+

+	defb 0efh		;2185	ld a,(rr) ;rr=bc,de

+	defb 00ah

+	defb 056h

+	defw l236fh

+

+	defb 000h		;218a	EOT

+

+b_0x218B_start:			;	2 byte opdodes

+	defb 0c7h		;218b	ld r,nn

+	defb 006h

+	defb 056h

+	defw l2384h

+

+	defb 0ffh		;2190	add a,nn

+	defb 0c6h

+	defb 003h

+	defw l237fh

+

+	defb 0ffh		;2195	adc a,nn

+	defb 0ceh

+	defb 000h

+	defw l237fh

+

+	defb 0ffh		;219a	sub a,nn

+	defb 0d6h

+	defb 0c9h

+	defw l2397h

+

+	defb 0ffh

+	defb 0deh

+	defb 0b7h

+	defw l237fh

+

+	defb 0ffh		;21a4	and a,nn

+	defb 0e6h

+	defb 006h

+	defw l2397h

+

+	defb 0ffh

+	defb 0eeh

+	defb 0cch

+	defw l2397h

+

+	defb 0ffh

+	defb 0f6h

+	defb 06ch

+	defw l2397h

+

+	defb 0ffh		;21b3	cp a,nn

+	defb 0feh

+	defb 013h

+	defw l2397h

+

+	defb 0ffh		;21b8	djnz

+	defb 010h

+	defb 02eh

+	defw l23b0h

+

+	defb 0ffh		;21bd	jr

+	defb 018h

+	defb 054h

+	defw l23b0h

+

+	defb 0e7h		;21c2	jr,cc

+	defb 020h

+	defb 054h

+	defw l23a1h

+

+	defb 0ffh

+	defb 0d3h		;21c8	out (nn),a

+	defb 076h

+	defw l23d5h

+

+	defb 0ffh		;21cc	in a,(nn)

+	defb 0dbh

+	defb 03fh

+	defw l23c3h

+

+	defb 000h		;21d1	EOT

+

+b_0x21D2_start:			;	3 byte opcodes

+	defb 0c7h

+	defb 0c2h

+	defb 052h

+	defw l23e0h

+

+	defb 0c7h

+	defb 0c4h

+	defb 00ch

+	defw l23e0h

+

+	defb 0cfh

+	defb 001h

+	defb 056h

+	defw l23fch

+

+	defb 0ffh

+	defb 0c3h

+	defb 052h

+	defw l23e6h

+

+	defb 0ffh

+	defb 0cdh

+	defb 00ch

+	defw l23e6h

+

+	defb 0ffh

+	defb 022h

+	defb 056h

+	defw l2404h

+

+	defb 0ffh

+	defb 02ah

+	defb 056h

+	defw l240dh

+

+	defb 0ffh

+	defb 032h

+	defb 056h

+	defw l2416h

+

+	defb 0ffh

+	defb 03ah

+	defb 056h

+	defw l2421h

+

+	defb 000h

+

+b_0x2200_start:			;	prefix ED + 1 byte opcode

+	defb 044h		;2200	neg

+	defb 066h

+	defb 045h		;2202	retn

+	defb 092h

+	defb 04dh		;2204	reti

+	defb 08eh

+	defb 067h		;2206	rrd

+	defb 0b1h

+	defb 06fh		;2208	rld

+	defb 0a2h

+	defb 0a0h		;220a	ldi

+	defb 05fh

+	defb 0a1h

+	defb 01ch

+	defb 0a2h

+	defb 04bh

+	defb 0a3h

+	defb 07dh

+	defb 0a8h		;2212	ldd

+	defb 058h

+	defb 0a9h

+	defb 015h

+	defb 0aah

+	defb 044h

+	defb 0abh

+	defb 079h

+	defb 0b0h		;221a	ldir

+	defb 062h

+	defb 0b1h

+	defb 01fh

+	defb 0b2h

+	defb 04eh

+	defb 0b3h

+	defb 072h

+	defb 0b8h		;2222	lddr

+	defb 05bh

+	defb 0b9h

+	defb 018h

+	defb 0bah

+	defb 047h

+	defb 0bbh

+	defb 06eh

+	defb 08bh		;222a	otdm

+	defb 0d5h

+	defb 09bh		;222c	otdmr

+	defb 0d9h

+	defb 083h		;222e	otim

+	defb 0deh

+	defb 093h		;2230	otimr

+	defb 0e2h

+	defb 076h		;2232	slp

+	defb 0ebh

+	defb 0ffh		;2234	EOT

+

+l2235h:

+	defb 0e7h		;2235	in r,(c) ;r=bcde

+	defb 040h

+	defb 03fh

+	defw l2455h

+

+	defb 0f7h		;223a	in r,(c) ;r=hl

+	defb 060h

+	defb 03fh

+	defw l2455h

+

+	defb 0ffh		;223f	in r,(c) ;r=a

+	defb 078h

+	defb 03fh

+	defw l2455h

+

+	defb 0e7h

+	defb 041h

+	defb 076h

+	defw l2461h

+

+	defb 0f7h

+	defb 061h

+	defb 076h

+	defw l2461h

+

+	defb 0ffh		;224e	out (c),r ;r=a

+	defb 079h

+	defb 076h

+	defw l2461h

+

+	defb 0cfh		;2253	sbc hl,rr

+	defb 042h

+	defb 0b7h

+	defw l246dh

+

+	defb 0cfh		;2258	adc hl,rr

+	defb 04ah

+	defb 000h

+	defw l246dh

+

+	defb 0ffh		;225d	im 0

+	defb 046h

+	defb 03dh

+	defw l2427h

+

+	defb 0ffh		;2262	im 1

+	defb 056h

+	defb 03dh

+	defw l242bh

+

+	defb 0ffh		;2267	im 2

+	defb 05eh

+	defb 03dh

+	defw l242fh

+

+	defb 0ffh		;226c	ld i,a

+	defb 047h

+	defb 056h

+	defw l2434h

+

+	defb 0ffh

+	defb 057h

+	defb 056h

+	defw l2439h

+

+	defb 0ffh

+	defb 04fh

+	defb 056h

+	defw l243eh

+

+	defb 0ffh

+	defb 05fh

+	defb 056h

+	defw l2443h

+

+	defb 0cfh		;2280	mlt rr

+	defb 04ch

+	defb 0d2h

+	defw l254bh

+

+	defb 0c7h		;2285	tst r

+	defb 004h

+	defb 0eeh

+	defw l24dfh

+

+	defb 000h

+

+l228bh:

+	defb 0e7h

+	defb 000h

+	defb 0cfh

+	defw l230ch

+

+	defb 0f7h

+	defb 020h

+	defb 0cfh

+	defw l230ch

+

+	defb 0ffh

+	defb 038h

+	defb 0cfh

+	defw l230ch

+

+	defb 0e7h

+	defb 001h

+	defb 0e7h

+	defw l2315h

+

+	defb 0f7h

+	defb 021h

+	defb 0e7h

+	defw l2315h

+

+	defb 0ffh

+	defb 039h

+	defb 0e7h

+	defw l2315h

+

+	defb 0ffh

+	defb 064h

+	defb 0eeh

+	defw l2397h

+

+	defb 0ffh

+	defb 074h

+	defb 0f1h

+	defw l2397h

+	defb 000h

+

+l22b4h:

+	defb 0efh

+	defb 043h

+	defb 056h

+

+b_0x22B7_start:

+	defw l2476h

+

+b_0x22B9_start:

+	defb 0ffh

+	defb 073h

+	defb 056h

+

+b_0x22BC_start:

+	defw l2476h

+

+b_0x22BE_start:

+	defb 0efh

+	defb 04bh

+	defb 056h

+

+b_0x22C1_start:

+	defw l247fh

+

+b_0x22C3_start:

+	defb 0ffh

+	defb 07bh

+	defb 056h

+

+b_0x22C6_start:

+	defw l247fh

+

+b_0x22C8_start:

+	defb 000h

+l22c9h:

+	defb 0f8h

+	defb 000h

+	defb 09bh

+

+b_0x22CC_start:

+	defw l24aeh

+

+b_0x22CE_start:

+	defb 0f8h

+	defb 008h

+	defb 0aah

+

+b_0x22D1_start:

+	defw l24aeh

+

+b_0x22D3_start:

+	defb 0f8h

+	defb 010h

+	defb 096h

+

+b_0x22D6_start:

+	defw l24aeh

+

+b_0x22D8_start:

+	defb 0f8h

+	defb 018h

+	defb 0a5h

+

+b_0x22DB_start:

+	defw l24aeh

+

+b_0x22DD_start:

+	defb 0f8h

+	defb 020h

+	defb 0c0h

+

+b_0x22E0_start:

+	defw l24aeh

+

+b_0x22E2_start:

+	defb 0f8h

+	defb 028h

+	defb 0c3h

+

+b_0x22E5_start:

+	defw l24aeh

+

+b_0x22E7_start:

+	defb 0f8h

+	defb 038h

+	defb 0c6h

+

+b_0x22EA_start:

+	defw l24aeh

+

+b_0x22EC_start:

+	defb 0c0h

+	defb 040h

+	defb 009h

+

+b_0x22EF_start:

+	defw l2487h

+

+b_0x22F1_start:

+	defb 0c0h

+	defb 080h

+	defb 088h

+

+b_0x22F4_start:

+	defw l2487h

+

+b_0x22F6_start:

+	defb 0c0h

+	defb 0c0h

+	defb 0bdh

+

+b_0x22F9_start:

+	defw l2487h

+

+b_0x22FB_start:

+	defb 000h

+l22fch:

+	call l24dfh

+	call sub_257ch

+	jp l24ebh

+l2305h:

+	call sub_2579h

+	jp l24ebh

+l230bh:

+	ret

+l230ch:

+	call l24dfh

+	call sub_257ch

+	jp l23c6h

+l2315h:

+	call l23c6h

+	call sub_257ch

+	jp l24dfh

+l231eh:

+	comst

+	ld a,(iy+000h)

+	comend

+	and 038h

+	jp out.hex

+l232ah:

+	ld hl,b_0x2333_start

+	call PSTR

+	jp l253eh

+

+b_0x2333_start:

+	DC	'(SP),'

+

+l2338h:

+	ld a,'('

+	call OUTCHAR

+	call l253eh

+	ld a,')'

+	jp OUTCHAR

+l2345h:

+	ld hl,l1d86h

+	jp PSTR

+l234bh:

+	ld hl,b_0x2354_start

+	call PSTR

+	jp l253eh

+

+b_0x2354_start:

+	DC	'SP,'

+

+l2357h:

+	ld hl,b_0x1D80_start

+	jp PSTR

+l235dh:

+	call l253eh

+	call sub_257ch

+	jp l254bh

+l2366h:

+	call sub_2372h

+	call sub_257ch

+	jp l23dbh

+l236fh:

+	call sub_2579h

+sub_2372h:

+	ld a,'('

+	call OUTCHAR

+	call l254bh

+	ld a,')'

+	jp OUTCHAR

+l237fh:

+	call sub_2579h

+	jr l2397h

+l2384h:

+	call l24dfh

+	call sub_257ch

+	ld a,(is.pfx.IXY)

+	and a

+	comst

+	ld a,(iy+002h)

+	comend

+	jr nz,l239eh

+l2397h:

+	comst

+	ld a,(iy+001h)

+	comend

+l239eh:

+	jp out.hex

+l23a1h:

+	comst

+	ld a,(iy+000h)

+	comend

+	and 018h

+	call sub_2568h

+	call sub_257ch

+l23b0h:

+	comst

+	ld c,(iy+001h)

+	comend

+	ld a,c

+	rla

+	sbc a,a

+	ld b,a

+	push iy

+	pop hl

+	add hl,bc

+	inc hl

+	inc hl

+	jr l23f0h

+l23c3h:

+	call sub_2579h

+l23c6h:

+	ld a,028h

+	call OUTCHAR

+	comst

+	ld a,(iy+001h)

+	comend

+	jp l252bh

+l23d5h:

+	call l23c6h

+	call sub_257ch

+l23dbh:

+	ld a,041h

+	jp OUTCHAR

+l23e0h:

+	call l2561h

+	call sub_257ch

+l23e6h:

+	comst

+	ld l,(iy+001h)

+	ld h,(iy+002h)

+	comend

+l23f0h:

+	ld a,002h

+sub_23f2h:

+	ld (XBE03),a

+	ld (XBE01),hl

+	call out.hl

+	ret

+l23fch:

+	call l254bh

+	call sub_257ch

+	jr l23e6h

+l2404h:

+	call sub_24c6h

+	call sub_257ch

+	jp l253eh

+l240dh:

+	call l253eh

+	call sub_257ch

+	jp sub_24c6h

+l2416h:

+	call sub_24c6h

+	call sub_257ch

+	ld a,041h

+	jp OUTCHAR

+l2421h:

+	call sub_2579h

+	jp sub_24c6h

+l2427h:

+	ld a,030h

+	jr l2431h

+l242bh:

+	ld a,031h

+	jr l2431h

+l242fh:

+	ld a,032h

+l2431h:

+	jp OUTCHAR

+l2434h:

+	ld hl,b_0x2449_start

+	jr l2446h

+l2439h:

+	ld hl,l244ch

+	jr l2446h

+l243eh:

+	ld hl,l244fh

+	jr l2446h

+l2443h:

+	ld hl,l2452h

+l2446h:

+	jp PSTR

+

+b_0x2449_start:

+	DC	'I,A'

+l244ch:

+	DC	'A,I'

+l244fh:

+	DC	'R,A'

+l2452h:

+	DC	'A,R'

+

+l2455h:

+	call l24dfh

+	call sub_257ch

+	ld hl,t__C_

+	jp PSTR

+l2461h:

+	ld hl,t__C_

+	call PSTR

+	call sub_257ch

+	jp l24dfh

+l246dh:

+	call l253eh

+	call sub_257ch

+	jp l254bh

+l2476h:

+	call sub_24c6h

+	call sub_257ch

+	jp l254bh

+l247fh:

+	call l254bh

+	call sub_257ch

+	jr sub_24c6h

+l2487h:

+	ld a,(is.pfx.IXY)

+	and a

+	jr nz,l2496h

+	comst

+	ld a,(iy+001h)

+	comend

+	jr l249dh

+l2496h:

+	comst

+	ld a,(iy+002h)

+	comend

+l249dh:

+	push af

+	rra

+	rra

+	rra

+	and 007h

+	add a,'0'

+	call OUTCHAR

+	call sub_257ch

+	pop af

+	jr l24f2h

+l24aeh:

+	ld a,(is.pfx.IXY)

+	and a

+	jr nz,l24bdh

+	comst

+	ld a,(iy+001h)

+	comend

+	jr l24c4h

+l24bdh:

+	comst

+	ld a,(iy+002h)

+	comend

+l24c4h:

+	jr l24f2h

+sub_24c6h:

+	ld a,'('

+	call OUTCHAR

+	comst

+	ld l,(iy+001h)

+	ld h,(iy+002h)

+	comend

+	ld a,001h

+	call sub_23f2h

+	ld a,')'

+	jp OUTCHAR

+l24dfh:

+	comst

+	ld a,(iy+000h)

+	comend

+	rra

+	rra

+	rra

+	jr l24f2h

+l24ebh:

+	comst

+	ld a,(iy+000h)

+	comend

+l24f2h:

+	and 007h

+	cp 006h

+	jr nz,l2533h

+	ld a,(is.pfx.IXY)

+	and a

+	ld a,006h

+	jr z,l2533h

+	ld hl,b_0x2538_start

+	ld a,(is.pfx.IXY)

+	dec a

+	jr z,l250ch

+	ld hl,b_0x253B_start

+l250ch:

+	call PSTR

+	comst

+	ld a,(iy+001h)

+	comend

+	and a

+	push af

+	jp m,l2523h

+	ld a,'+'

+	call OUTCHAR

+	pop af

+	jr l252bh

+l2523h:

+	ld a,'-'

+	call OUTCHAR

+	pop af

+	neg

+l252bh:

+	call out.hex

+	ld a,')'

+	jp OUTCHAR

+l2533h:

+	ld hl,t_BCDEHL_HL_A

+	jr l2572h

+

+b_0x2538_start:

+	DC	'(IX'

+b_0x253B_start:

+	DC	'(IY'

+

+l253eh:

+	ld a,(is.pfx.IXY)

+	ld hl,t_HL.IX.IY

+	jr l2572h

+l2546h:

+	ld hl,t_BC.DE.HL.AF

+	jr l254eh

+l254bh:

+	ld hl,t_BC.DE.HL.SP

+l254eh:

+	comst

+	ld a,(iy+000h)

+	comend

+	rra

+	rra

+	rra

+	rra

+	and 003h

+	cp 002h

+	jr z,l253eh

+	jr l2572h

+l2561h:

+	comst

+	ld a,(iy+000h)

+	comend

+sub_2568h:

+	rra

+	rra

+	rra

+	and 007h

+	ld hl,t_tstfl_ZCPS

+	jr l2572h

+l2572h:

+	ld b,a

+	call sub_0a48h

+	jp PSTR

+sub_2579h:

+	call l23dbh

+sub_257ch:

+	ld a,','

+	jp OUTCHAR

+sub_2581h:

+	call PSTR

+l2584h:

+	call OUTBL

+	inc c

+	ld a,c

+	cp 006h

+	jr nz,l2584h

+	ret

+

+t_MNEMONICS:

+	DC	'ADC'

+	DC	'ADD'

+	DC	'AND'

+	DC	'BIT'

+	DC	'CALL'

+	DC	'CCF'

+	DC	'CP'

+	DC	'CPD'

+	DC	'CPDR'

+	DC	'CPI'

+	DC	'CPIR'

+	DC	'CPL'

+	DC	'DAA'

+	DC	'DEC'

+	DC	'DI'

+	DC	'DJNZ'

+	DC	'EI'

+	DC	'EX'

+	DC	'EXX'

+	DC	'HALT'

+	DC	'IM'

+	DC	'IN'

+	DC	'INC'

+	DC	'IND'

+	DC	'INDR'

+	DC	'INI'

+	DC	'INIR'

+	DC	'JP'

+	DC	'JR'

+	DC	'LD'

+	DC	'LDD'

+	DC	'LDDR'

+	DC	'LDI'

+	DC	'LDIR'

+	DC	'NEG'

+	DC	'NOP'

+	DC	'OR'

+	DC	'OTDR'

+	DC	'OTIR'

+	DC	'OUT'

+	DC	'OUTD'

+	DC	'OUTI'

+	DC	'POP'

+	DC	'PUSH'

+	DC	'RES'

+	DC	'RET'

+	DC	'RETI'

+	DC	'RETN'

+	DC	'RL'

+	DC	'RLA'

+	DC	'RLC'

+	DC	'RLCA'

+	DC	'RLD'

+	DC	'RR'

+	DC	'RRA'

+	DC	'RRC'

+	DC	'RRCA'

+	DC	'RRD'

+	DC	'RST'

+	DC	'SBC'

+	DC	'SCF'

+	DC	'SET'

+	DC	'SLA'

+	DC	'SRA'

+	DC	'SRL'

+	DC	'SUB'

+	DC	'XOR'

+	DC	'IN0'

+	DC	'MLT'

+	DC	'OTDM'

+	DC	'OTDMR'

+	DC	'OTIM'

+	DC	'OTIMR'

+	DC	'OUT0'

+	DC	'SLP'

+	DC	'TST'

+	DC	'TSTIO'

+	DB	0

+

+t_BCDEHL_HL_A:

+	DC	'B'

+	DC	'C'

+	DC	'D'

+	DC	'E'

+	DC	'H'

+	DC	'L'

+	DC	'(HL)'

+	DC	'A'

+	DB	0

+t_BC.DE.HL.SP:

+	DC	'BC'

+	DC	'DE'

+	DC	'HL'

+	DC	'SP'

+	DB	0

+t_BC.DE.HL.AF:

+	DC	'BC'

+	DC	'DE'

+t_HL.AF:

+	DC	'HL'

+	DC	'AF'

+	DB	0

+t_BC.DE.IY.SP:

+	DC	'BC'

+	DC	'DE'

+	DC	'IY'

+	DC	'SP'

+	DB	0

+t_BC.DE.IX.SP:

+	DC	'BC'

+	DC	'DE'

+	DC	'IX'

+	DC	'SP'

+	DB	0

+t_HL.IX.IY:

+	DC	'HL'

+t_IX.IY:

+	DC	'IX'

+	DC	'IY'

+	DB	0

+t_tstfl_ZC:

+	DC	'NZ'

+	DC	'Z'

+	DC	'NC'

+	DC	'C'

+	DC	'NE'

+	DC	'EQ'

+	DC	'GE'

+	DC	'LT'

+	DB	0

+t_tstfl_ZCPS:

+	DC	'NZ'

+	DC	'Z'

+	DC	'NC'

+	DC	'C'

+	DC	'PO'

+	DC	'PE'

+	DC	'P'

+	DC	'M'

+	DC	'NE'

+	DC	'EQ'

+	DC	'GE'

+	DC	'LT'

+	DC	'NV'

+	DC	'V'

+	DB	0

+t__C_:

+	DC	'(C)'

+	DB	0

+

+sub_26e7h:

+	ld hl,(REG.PC)

+	ld a,h

+	or l

+	jr z,l2715h

+	ld iy,(REG.PC)

+	call sub_1f9eh

+	jp nc,ERROR

+	ld c,b

+	ld b,000h

+	ld hl,(REG.PC)

+	add hl,bc

+	call sub_1117h

+	ld iy,(REG.PC)

+	ld hl,b_0x2717_start

+	call lookup_opc

+	ccf

+	ret c

+	ex de,hl

+	call CALL.HL

+	call c,sub_1117h

+l2715h:

+	scf

+	ret

+

+b_0x2717_start:

+	db	0ffh

+	db	0ddh

+	db	000h

+	dw	x278d

+

+	db	0ffh

+	db	0fdh

+	db	000h

+	dw	x2792

+

+	db	0ffh

+	db	0edh

+	db	000h

+	dw	x27a2

+

+l2726h:

+	db	0ffh

+	db	0cdh

+	db	000h

+	dw	x275e

+

+	db	0ffh

+	db	0c3h

+	db	000h

+	dw	x2769

+

+	db	0ffh

+	db	0e9h

+	db	000h

+	dw	x2788

+

+	db	0ffh

+	db	0c9h

+	db	000h

+	dw	x27c9

+

+	db	0ffh

+	db	0cfh

+	db	000h

+	dw	x280e

+

+	db	0c7h

+	db	0c7h

+	db	000h

+	dw	x27ea

+

+	db	0c7h

+	db	0c4h

+	db	000h

+	dw	x275e

+

+	db	0f7h

+	db	010h

+	db	000h

+	dw	x2775

+

+	db	0e7h

+	db	020h

+	db	000h

+	dw	x2775

+

+	db	0c7h

+	db	0c2h

+	db	000h

+	dw	x2769

+

+	db	0c7h

+	db	0c0h

+	db	000h

+	dw	x27b3

+

+	db	000h

+

+x275e:

+	ld a,(XBFE8)

+	and a

+	jr nz,x2769

+	ld a,(TCFLG)

+	and a

+	ret nz

+

+x2769:

+	comst

+	ld l,(iy+001h)

+	ld h,(iy+002h)

+	comend

+	scf

+	ret

+

+x2775:

+	comst

+	ld c,(iy+001h)

+	comend

+	ld a,c

+	rla

+	sbc a,a

+	ld b,a

+	ld hl,(REG.PC)

+	add hl,bc

+	inc hl

+	inc hl

+	scf

+	ret

+

+x2788:

+	ld hl,(REG.L)

+	scf

+	ret

+

+x278d:

+	ld hl,(reg.ix)

+	jr l2795h

+

+x2792:

+	ld hl,(reg.iy)

+l2795h:

+	comst

+	ld a,(iy+001h)

+	comend

+	cp 0e9h

+	scf

+	ret z

+	and a

+	ret

+

+x27a2:

+	comst

+	ld a,(iy+001h)

+	comend

+	cp 04dh

+	jr z,x27c9

+	cp 045h

+	jr z,x27c9

+	and a

+	ret

+

+x27b3:

+	comst

+	ld a,(iy+000h)

+	comend

+	ld (XBEDD),a

+	ld hl,(REG.F)

+	push hl

+	pop af

+	call XBEDD

+	scf

+	jr c,x27c9

+	ret

+

+x27c9:

+	ld a,(XBFE8)

+	and a

+	jr nz,l27dah

+	ld a,(TCFLG)

+	and a

+	jr z,l27dah

+	call l27dah

+	pop hl

+	ret

+l27dah:

+	ld hl,(REG.SP)

+	comst

+	ld e,(hl)

+	inc hl

+	ld d,(hl)

+	comend

+	ex de,hl

+	call sub_1117h

+	and a

+	ret

+

+x27ea:

+	ld a,(ddtzrst)

+	comst

+	cp (iy+000h)

+	comend

+	ret z

+	comst

+	ld a,(iy+000h)

+	comend

+	and 038h

+	ld l,a

+	ld h,000h

+	ld a,(XBFE8)

+	and a

+	jr nz,l280ch

+	ld a,(TCFLG)

+	and a

+	ret nz

+l280ch:

+	scf

+	ret

+

+x280e:

+	and a

+	ret

+

+CMD.C:

+	ld hl,CMD.C

+	ld a,001h

+	jr l281bh

+

+CMD.T:

+	xor a

+	ld hl,CMD.T

+l281bh:

+	ld (CMD_RPT),hl

+	ld (TCFLG),a

+	ld a,(de)

+	sub 'N'

+	jr nz,l2827h

+	inc de

+l2827h:

+	ld (TCNFLG),a

+	ld a,(de)

+	sub 'J'

+	jr nz,l2830h

+	inc de

+l2830h:

+	ld (TRJFLG),a

+	call sub_289fh

+	jr z,l283eh

+	ld hl,1

+	call get_lastarg_def

+l283eh:

+	ld (TCCSTR),hl

+	sub a

+	ld (XA747),a

+l2845h:

+	call sub_26e7h

+	jr l289ch

+l284ah:

+	call sub_0e68h

+	ld a,(TRJFLG)

+	and a

+	jr nz,l2864h

+	ld iy,(REG.PC)

+	call sub_28c1h

+	jr z,l2864h

+	ld hl,l2726h

+	call lookup_opc

+	jr nc,l2845h

+l2864h:

+	ld a,(XBFEA)

+	and a

+	jr z,l2881h

+	ld de,(TCCSTR)

+	call EXPR

+	ld a,h

+	or l

+	add a,0ffh

+	sbc a,a

+	ld hl,XBFEA

+	xor (hl)

+	bit 1,a

+	jr z,l288ch

+l287eh:

+	jp l102eh

+l2881h:

+	ld hl,(TCCSTR)

+	dec hl

+	ld (TCCSTR),hl

+	ld a,h

+	or l

+	jr z,l287eh

+l288ch:

+	call sub_26e7h

+	jr nc,l287eh

+	ld a,(TCNFLG)

+	ld b,a

+	ld a,(XA747)

+	or b

+	ld (XA747),a

+l289ch:

+	jp l1183h

+

+sub_289fh:

+	call SKIPBL

+	xor a

+	ld (XBFEA),a

+	ld a,(de)

+	cp 'U'

+	jr z,l28aeh

+	cp 'W'

+	ret nz

+

+l28aeh:

+	inc de

+	push af

+	push de

+	call EXPR

+	jp c,ERROR

+	call assert_eol

+	pop hl

+	pop af

+	ld (XBFEA),a

+	sub a

+	ret

+

+sub_28c1h:

+	comst

+	ld a,(iy+000h)

+	ld b,(iy+0001)

+	comend

+	cp 0edh

+	jr z,l28dbh

+	and 0dfh

+	cp 0ddh

+	ret nz

+	ld a,b

+	cp 0e9h

+	ret

+l28dbh:

+	ld a,b

+	and 0f7h

+	cp 045h

+	ret

+

+?excom:

+	ex (sp),hl

+	push af

+	push bc

+	push de

+	ld c,(hl)

+	ld b,000h

+	inc hl

+	ld a,?lcmax

+	sub c

+	ld de,?exeit

+	ldir

+	ex de,hl

+	ld (hl),018h

+	inc hl

+	ld (hl),a

+	ex de,hl

+	pop de

+	pop bc

+	pop af

+	ex (sp),hl

+	if CPU_Z180

+	push hl

+	ld hl,(ubbr)

+

+	else

+	 push af

+	 ld a,(ubnk)

+	endif

+	if ROMSYS

+	 push af

+	 ld a,(uromen)

+	endif

+	jp ?comcod

+

+;------------------------------------------

+;	ddtram

+;------------------------------------------

+

+vartab:

+;	dseg

+	cseg

+ddtram:

+;todo:

+; The following 2 params are changeable by user.

+; Should these moved to top ram?

+;

+ddtzrst:

+	rst	DDTZRSTVEC	;rst used by ddtz

+ddtei:	ei			;ints enabled/disabled while ddtz is running

+	ret			;

+offs.pc:

+	dw	TPA

+offs.@:

+	dw	0

+CMD_ERR:

+	dw	0

+CMD_RPT:

+	dw	DDTZML

+ci.buf:

+	db	80

+	rept	83

+	db	0

+	endm

+CON.COL:

+	db 	0

+XA747:

+	db	0

+bp_tab:

+	rept	BP_CNT

+	db	0,0

+	dw	0,0,0

+	endm

+BP_SIZE	equ	8

+sexp1:

+	dw	sexpbuf

+sexp2:

+	dw	sexpbuf

+sexpbuf:

+	rept	128

+	db	0

+	endm

+sexpbufe:

+

+msg.Y:

+	dc	'Y0'

+reg.Y:

+	rept	10

+	dw	0

+	endm

+lst.S:

+	dw	0

+lst.IP:

+	dw	0

+lst.OP:

+	dw	0

+lst.OD:

+	db	0

+lst.Qj:

+	db	0

+lst.D:

+	dw	0

+HILOD:

+	dw	0

+MAXLOD:

+	dw	0

+XB068:

+	dw	0

+lst.A:

+	dw	0

+XB06C:

+	dw	0

+pfx.IXY:

+	db	000h

+is.pfx.IXY:

+	db	000h

+lst.L:

+	dw	0

+XBE01:

+	dw	0

+XBE03:

+	db	000h

+XBEDD:

+	ret		;ret cc

+	and a

+	pop hl

+	inc hl

+	jp (hl)

+XBFE8:

+	db	0

+TCFLG:

+	db	0

+XBFEA:

+	db	0

+TCCSTR:

+	dw	0

+TCNFLG:

+	db	0

+TRJFLG:

+	db	0

+wstrtflg:

+	db	1

+

+	cseg

+vartabe:

+

+;------------------------------------------

+

+	.phase	sysram_start+bs$stack$size

+$stack:

+$stcka	equ	$ - bs$stack$size

+

+curphse	defl	$

+	.dephase

+sysramc:

+	.phase curphse

+topcodbeg:

+

+reg.l2:	db	0		; 0fe50h

+reg.h2:	db	0		; 0fe51h

+reg.e2:	db	0		; 0fe52h

+reg.d2:	db	0		; 0fe53h

+reg.c2:	db	0		; 0fe54h

+reg.b2:	db	0		; 0fe55h

+reg.f2:	db	0		; 0fe56h

+reg.a2:	db	0		; 0fe57h

+	db	0

+reg.i:	db	high ivtab

+reg.iy:	dw	0		; 0fe5ah

+reg.ix:	dw	0		; 0fe5ch

+reg.e:	db	0		; 0fe5eh

+reg.d:	db	0		; 0fe5fh

+reg.c:	db	0		; 0fe60h

+reg.b:	db	0		; 0fe61h

+	if	ROMSYS

+udcntl:	 db	CWAITIO		; 0fe62h	(mem-, io- wait)

+uromen:	 db	ROM_DIS		; 0fe63h

+	endif

+	if CPU_Z180

+ubbr:	db	0		; 0fe64h

+ucbar:	db	USR$CBAR	; 0fe65h

+	else

+	 db	0		; 0fe64h

+ubnk:	 db	0		; 0fe65h

+	endif

+reg.f:	db	0		; 0fe66h

+reg.a:	db	0		; 0fe67h

+reg.l:	db	0		; 0fe68h

+reg.h:	db	0		; 0fe69h

+reg.sp:	dw	TOPRAM		; 0fe6ah

+

+$go:

+	if	ROMSYS

+	 out (000h),a		;064c fe6c

+	 out0 (dcntl),l

+	 pop hl

+	endif

+	if CPU_Z180

+	out0 (cbar),h

+	out0 (bbr),l

+	else

+	 ld a,h

+	 call selbnk

+	endif

+	pop af

+	pop hl

+	ld sp,(reg.sp)

+reg.iff:

+	ei

+	db	0C3h		;jp TPA	;065f feff ($+1): reg.pc

+reg.pc:

+	dw	TPA

+

+bpent:

+	ld (reg.l),hl		;0662 fe82: bpent:

+	pop hl

+	dec hl

+	ld (reg.pc),hl

+	ld (reg.sp),sp

+	ld sp,reg.l

+	push af

+	if CPU_Z180

+;;;	 TODO: cbar on trap?

+	in0 h,(cbar)

+	in0 l,(bbr)

+	ld a,SYS$CBAR

+	out0 (cbar),a

+	else

+	 ld a,(@cbnk)

+	 ld h,a

+	 xor a

+	 ld l,a

+	 call selbnk

+	endif

+	 push hl

+

+	if ROMSYS

+	 in0 l,(dcntl)

+	 ld a,CWAITROM+CWAITIO

+	 out0 (dcntl),a

+	 ld a,($crom)

+	 cp c$rom

+	 ld a,ROM_EN

+	 out (000h),a

+	endif

+

+	jp bpddtz

+

+?comcod:

+	if ROMSYS

+	 out (000h),a		;0692 feb2

+	 pop af

+	endif

+

+	if CPU_Z180

+	out0 (cbar),h

+	out0 (bbr),l

+	pop hl

+	else

+	 call selbnk

+	 pop af

+	endif

+?exeit:

+	ds ?lcmax+2

+	push af

+	if CPU_Z180

+	ld a,SYS$CBAR

+	out0 (cbar),a

+

+;;;	 TODO: bbr?

+	else

+	 xor a

+	 call selbnk

+	endif

+	if ROMSYS

+	 ld a,ROM_EN

+	 out (000h),a

+	endif

+

+	pop af

+	ret

+

+topcodend:

+curph	defl	$

+	.dephase

+sysrame:

+

+	end

diff --git a/z180/fifoio.180 b/z180/fifoio.180
new file mode 100644
index 0000000..cbcece9
--- /dev/null
+++ b/z180/fifoio.180
@@ -0,0 +1,128 @@
+	page	255

+	.z80

+

+;

+; FIFO channels for communication with stm32

+;

+	global	f.init,f.in,f.out,f.i.st

+

+	extrn	buf.init

+

+	include config.inc

+	include	z180reg.inc

+

+

+;--------------------------------------------------------------

+

+	dseg

+

+

+	mkbuf	ci.fifo_id, rx.buf,rx.buf_len

+	mkbuf	co.fifo_id, tx.buf,tx.buf_len

+

+

+;--------------------------------------------------------------

+

+	cseg

+

+; Init Serial I/O for console input and output

+;

+

+f.init:

+	ld	ix,rx.buf

+	ld	a,rx.buf.mask

+	call	buf.init

+	ld	ix,tx.buf

+	ld	a,tx.buf.mask

+	jp	buf.init

+

+

+f.i.st:

+	push	ix

+	ld	ix,rx.buf		;

+

+buf.empty:

+	ld	a,(ix+o.in_idx)		;

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+

+f.in:

+	push	ix

+	ld	ix,rx.buf		;

+

+buf.get:

+	ld	a,(ix+o.out_idx)	;

+bg.wait:

+	cp	(ix+o.in_idx)		;

+	jr	z,bg.wait

+

+	push	hl			;

+	push	ix

+	pop	hl

+	add	a,l

+	ld	l,a

+	jr	nc,bg.nc

+	inc	h

+bg.nc:

+	ld	l,(hl)

+

+	ld	a,(ix+o.out_idx)	;

+	inc	a

+	and	(ix+o.mask)

+	ld	(ix+o.out_idx),a

+

+	ld	a,l

+	pop	hl

+	pop	ix

+	ret

+

+

+f.o.st:

+	push	ix

+	ld	ix,tx.buf		;

+

+buf.full:

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+

+f.out:

+	push	ix

+	ld	ix,tx.buf		;

+

+buf.put:

+	push	hl			;

+	push	bc

+	push	ix

+	pop	hl

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	add	hl,bc

+	ld	b,a

+

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	(hl),b

+	ld	(ix+o.in_idx),a

+

+	ld	a,b

+	pop	bc

+	pop	hl

+	pop	ix

+	ret

+

+	end

diff --git a/z180/init-80.180 b/z180/init-80.180
new file mode 100644
index 0000000..8b71993
--- /dev/null
+++ b/z180/init-80.180
@@ -0,0 +1,591 @@
+	page	255

+	.z80

+

+	extrn ddtz,bpent

+	extrn $stack

+	extrn charini,?const,?conin

+	extrn ?cono,?conos

+

+	extrn romend

+

+	global	iobyte

+	global	isv_sw

+

+	include config.inc

+

+

+

+

+;----------------------------------------------------------------------

+

+	cseg

+romstart equ	$

+

+	org	romstart+0

+	jp	start

+

+iobyte:	db	0

+

+; restart vectors

+

+rsti	defl	1

+	rept	7

+

+	org	8*rsti + romstart

+	 jp bpent

+rsti	 defl rsti+1

+	endm

+

+;----------------------------------------------------------------------

+	

+	org	romstart+40h

+

+	dw	0

+	db	0

+

+	cseg

+

+	if ROMSYS

+$crom:	 defb c$rom		;

+	else

+	 db	0		;

+	endif

+

+

+hwini0:

+	db	0		;count

+;	db	rcr,CREFSH	;configure DRAM refresh

+;	db	dcntl,INIWAITS	;wait states

+;	db	cbar,SYS$CBAR

+

+

+;----------------------------------------------------------------------

+

+	org	romstart+50h

+

+start:

+	jp	cstart

+	jp	wstart

+	jp	?const

+	jp	?conin

+	jp	?cono

+	jp	?conos

+	jp	charini

+

+cstart:

+	di

+

+	xor	a

+	ld	(@cbnk),a

+

+; search warm start mark

+

+	ld ix,mark_55AA		; top of common area

+	ld a,0aah		;

+	cp (ix+000h)		;

+	jr nz,kstart		;

+	cp (ix+002h)		;

+	jr nz,kstart		;

+	cpl			;

+	cp (ix+001h)		;

+	jr nz,kstart		;

+	cp (ix+003h)		;

+	jr nz,kstart		;

+	ld sp,$stack		; mark found, check

+;	call checkcrc_alv	;

+	jp z,wstart		; check ok,

+

+;

+; ram not ok, initialize    --  kstart --

+

+kstart:

+	ld	sp,$stack	;01e1

+

+; Clear RAM 

+

+; Init bank manager

+

+;----------------------------------------------------------------------

+;

+

+	ld	hl,055AAh	;set warm start mark

+	ld	(mark_55AA),hl	;

+	ld	(mark_55AA+2),hl;

+

+;

+;       --  wstart  --

+;

+wstart:

+	call	sysram_init	;027f

+	call	ivtab_init

+

+	call	charini

+	call	bufferinit

+

+	ld	c,0

+	call	selbnk

+

+

+	im 2			;?030e

+	ei			;0282

+

+	call ?const		;0284

+	call ?const		;0287

+	or a			;028a

+	call nz,?conin		;028d

+

+;;;	ld a,(banktab)		;

+;;;	ld e,a			;

+	jp ddtz			;0290

+

+

+;----------------------------------------------------------------------

+;

+

+;TODO: Make a ringbuffer module.

+

+	global	buf.init

+

+buf.init:

+	ld	(ix+o.in_idx),0

+	ld	(ix+o.out_idx),0

+	ld	(ix+o.mask),a

+	ret

+

+;----------------------------------------------------------------------

+

+

+	extrn	msginit,msg.sout

+	extrn	mtx.fifo,mrx.fifo

+	extrn	co.fifo,ci.fifo

+

+

+bufferinit:

+	call	 msginit

+

+	ld	hl,buffers

+	ld	b,buftablen

+bfi_1:

+	ld	a,(hl)

+	inc	hl

+	ld	(bufdat+0),a

+	ld	e,(hl)

+	inc	hl

+	ld	d,(hl)

+	inc	hl

+	ex	de,hl

+

+	or	a

+	jr	nz,bfi_2

+

+	ld	a,(@cbnk)

+	call	bnk2phys

+

+	ld	(40h+0),hl

+	ld	(40h+2),a

+	out	(AVRINT5),a

+	jr	bfi_3

+bfi_2:

+

+	ld	a,(@cbnk)

+	call	bnk2phys

+

+	ld	(bufdat+1),hl

+	ld	(bufdat+3),a

+	ld	hl,inimsg

+	call	msg.sout

+bfi_3:

+	ex	de,hl

+	djnz	bfi_1

+	ret

+

+

+buffers:

+	db	0

+	dw	mtx.fifo

+	db	1

+	dw	mrx.fifo

+	db	2

+	dw	co.fifo

+	db	3

+	dw	ci.fifo

+buftablen equ	($ - buffers)/3

+

+inimsg:

+	db	inimsg_e - $ -1

+	db	0AEh

+	db	inimsg_e - $ -1

+	db	0

+bufdat:

+	db	0

+	dw	0

+	db	0

+inimsg_e:

+

+

+;

+;----------------------------------------------------------------------

+;

+

+bnk2phys:

+	sla	h

+	jr	nc,b2p_1		;A15=1 --> common

+	ld	a,3

+b2p_1:

+	srl	a

+	rr	h

+	ret

+

+;

+;----------------------------------------------------------------------

+;

+

+sysram_init:

+	ld hl,sysramw

+	ld de,topcodsys

+	ld bc,sysrame-sysramw

+	ldir

+

+	ret

+

+;----------------------------------------------------------------------

+

+ivtab_init:

+	ld	hl,ivtab	;

+	ld	a,h		;

+	ld	i,a		;

+;	out0	(il),l		;

+

+; Let all vectors point to spurious int routines.

+

+	ld	d,high sp.int0

+	ld	a,low  sp.int0

+	ld	b,9

+ivt_i1:

+	ld	(hl),a

+	inc	l

+	ld	(hl),d

+	inc	l

+	add	a,sp.int.len

+	djnz	ivt_i1

+	ret

+

+;----------------------------------------------------------------------

+;

+

+	global io.ini

+	

+io.ini:

+	push	bc

+

+	if CPU_Z180

+

+	ld	b,0		;high byte port adress

+	ld	a,(hl)		;count

+	inc	hl

+	or	a

+	jr	z,ioi_e

+ioi_1:

+	ld	c,(hl)		;port address

+	inc	hl

+	outi

+	inc	b		;outi decrements b

+	dec	a

+	jr	nz,ioi_1

+

+	else

+	jr	ioi_nxt

+ioi_l:

+	ld	c,(hl)		;port address

+	inc	hl

+	otir

+ioi_nxt:

+	ld	b,(hl)		;count

+	inc	hl

+	inc	b

+	djnz	ioi_l

+	endif

+ioi_e:	

+	pop	bc

+	ret

+

+	if CPU_Z180

+io.ini.m:

+	push	bc

+	ld	b,(hl)

+	inc	hl

+	ld	c,(hl)

+	inc	hl

+	otimr

+	pop	bc

+	ret

+	endif

+

+io.ini.l:

+;

+

+

+;----------------------------------------------------------------------

+;

+;return:

+; hl = hl + a

+; Flags undefined

+;

+

+add_hl_a:

+	add a,l

+	ld l,a

+	ret nc

+	inc h

+	ret

+

+; ---------------------------------------------------------

+

+sysramw:

+

+	.phase isvsw_loc

+topcodsys:

+

+; Trampoline for interrupt routines in banked ram.

+; Switch stack pointer to "system" stack in top ram

+

+; todo: z80 bank switch

+

+isv_sw:				;

+	ex (sp),hl		; save hl, return adr in hl

+	push de			;

+	push af			;

+	ex de,hl		;

+	ld hl,0			;

+	add hl,sp		;

+	ld a,h			;

+	cp 0f8h			;

+	jr nc,isw_1		;

+	ld sp,$stack		;

+isw_1:

+	push hl			;

+				; save current bank

+;	in0 h,(cbar)		;

+	push hl			;

+				; switch to system bank

+;	ld a,SYS$CBAR		;

+;	out0 (cbar),a		; 

+	ex de,hl		;

+	ld e,(hl)		;

+	inc hl			;

+	ld d,(hl)		;

+	ex de,hl		;

+	push bc			;

+	call jphl		;

+

+	pop bc			;

+	pop hl			; restore bank

+;	out0 (cbar),h		;

+	pop hl			;

+	ld sp,hl		;

+	pop af			;

+	pop de			;

+	pop hl			;

+	ei			;

+	ret			;

+jphl:

+	jp (hl)			;

+

+; ---------------------------------------------------------

+

+sp.int0:

+	ld	a,0d0h

+	jr	sp.i.1

+sp.int.len equ	$-sp.int0

+	ld	a,0d1h

+	jr	sp.i.1

+	ld	a,0d2h

+	jr	sp.i.1

+	ld	a,0d3h

+	jr	sp.i.1

+	ld	a,0d4h

+	jr	sp.i.1

+	ld	a,0d5h

+	jr	sp.i.1

+	ld	a,0d6h

+	jr	sp.i.1

+	ld	a,0d7h

+	jr	sp.i.1

+	ld	a,0d8h

+sp.i.1:

+;	out	(80h),a

+	halt

+

+; ---------------------------------------------------------

+

+; Get IFF2

+; This routine may not be loaded in page zero

+;

+; return Carry clear, if INTs are enabled.

+;

+	global getiff

+getiff:

+	xor	a		;clear accu and carry

+	push	af		;stack bottom := 00xxh

+	pop	af

+	ld	a,i		;P flag := IFF2

+	ret	pe		;exit carry clear, if enabled

+	dec	sp

+	dec	sp		;has stack bottom been overwritten?

+	pop	af

+	and	a		;if not 00xxh, INTs were

+	ret	nz		;actually enabled

+	scf			;Otherwise, they really are disabled

+	ret

+

+;----------------------------------------------------------------------

+

+	global	selbnk

+

+; a: bank (0..2)

+

+selbnk:

+	push	bc

+	ld	c,a

+	call	getiff

+	push	af

+

+	ld	a,c

+	di

+	ld	(@cbnk),a

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio0),a

+

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	pop	af

+	pop	bc

+	ret	c			;INTs were disabled

+	ei

+	ret

+

+;----------------------------------------------------------------------

+

+; c: bank (0..2)

+

+	if 0

+

+selbnk:

+	ld	a,(@cbnk)

+	xor	c

+	and	3

+	ret	z		;no change

+

+	call	getiff

+	push	af

+	ld	a,c

+	di

+	ld	(@cbnk),a

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio0),a

+

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	pop	af

+	ret	nc			;INTs were disabled

+	ei

+	ret

+

+	endif

+

+;----------------------------------------------------------------------

+

+	if 0

+	ex	af,af'

+	push	af

+	ex	af,af'

+

+	rra

+	jr	nc,stbk1

+	ex	af,af'

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio1),a

+	ex	af,af'

+

+stbk1:

+	rra

+	jr	nc,stbk2

+	ex	af,af'

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	ex	af,af'

+

+stbk2:

+	endif

+

+	global	@cbnk

+	global	mm_sio0, mm_sio1

+

+@cbnk:	db	0		; current bank (0..2)

+mm_sio0:

+	ds	1

+mm_sio1:

+	ds	1

+

+;----------------------------------------------------------------------

+

+curph	defl	$

+	.dephase

+sysrame:

+	.phase curph

+tim_ms:	db	0

+tim_s:	dw	0

+	.dephase

+

+;-----------------------------------------------------

+

+	cseg

+

+	;.phase	0ffc0h

+;ivtab	equ	0ffc0h		; 0ffc0h	;int vector table

+	;.dephase

+

+	;.phase	0fffch

+mark_55AA equ 0fffch

+	;ds	4		; 0fffch

+	;.dephase

+

+

+	end

+

diff --git a/z180/init.180 b/z180/init.180
new file mode 100644
index 0000000..05c24ff
--- /dev/null
+++ b/z180/init.180
@@ -0,0 +1,913 @@
+	page	255

+	.z80

+

+	extrn ddtz,bpent

+	extrn $stack

+	extrn charini,?const,?conin

+	extrn ?cono,?conos

+	extrn romend

+

+

+	global	iobyte

+	global	isv_sw

+

+	include config.inc

+    if CPU_Z180

+	include	z180reg.inc

+	include z180.lib

+    endif

+

+

+

+

+;----------------------------------------------------------------------

+

+	cseg

+romstart equ	$

+

+	org	romstart+0

+	jp start

+

+iobyte:	db	2

+

+; restart vectors

+

+rsti	defl	1

+	rept	7

+	org	8*rsti + romstart

+	jp bpent

+rsti	defl rsti+1

+	endm

+

+;----------------------------------------------------------------------

+; Config space

+;

+

+	org	romstart+40h

+

+	dw	0

+	db	0

+

+

+    if ROMSYS

+$crom:	defb c$rom		;

+    else

+	db	0		;

+    endif

+

+INIWAITS defl	CWAITIO

+    if	ROMSYS

+INIWAITS defl	INIWAITS+CWAITROM

+    endif

+

+;----------------------------------------------------------------------

+

+	org	romstart+50h

+start:

+	jp	cstart

+	jp	wstart

+	jp	?const

+	jp	?conin

+	jp	?cono

+	jp	?conos

+	jp	charini

+

+;----------------------------------------------------------------------

+

+hwini0:

+    if CPU_Z180

+	db			;count

+	db	rcr,CREFSH	;configure DRAM refresh

+	db	dcntl,INIWAITS	;wait states

+	db	cbr,SYS$CBR

+	db	cbar,SYS$CBAR

+    endif

+	db     0

+

+    if CPU_Z180

+dmclrt:				;clear ram per dma

+	db	dmct_e-dmclrt-2 ;

+	db	sar0l		;first port

+	dw	nullbyte	;src (fixed)

+nullbyte:

+	db 	000h		;src

+	dw	romend		;dst (inc), start after "rom" code

+	db	00h		;dst

+	dw 	0-romend	;count (64k)

+dmct_e:

+	db	0

+    endif

+

+

+cstart:

+    if CPU_Z180

+

+	push af

+	in0 a,(itc)		;Illegal opcode trap?

+	jp m,??st01

+	ld a,i			;I register == 0 ?

+	jr z,hw_reset		;    yes, harware reset

+

+??st01:

+	; TODO: SYS$CBR

+	ld	a,(syscbr)

+	out0	(cbr),a

+	pop af			;restore registers

+	jp bpent		;

+

+hw_reset:

+	di			;0058

+	ld	a,CREFSH

+	out0	(rcr),a		;	configure DRAM refresh

+	ld	a,CWAITIO

+	out0	(dcntl),a	;	wait states

+

+	ld	a,M_NCD		;No Clock Divide

+	out0	(ccr),a

+;	ld	a,M_X2CM	;X2 Clock Multiplier

+;	out0	(cmr),a

+    else

+	di

+	xor	a

+	ld	(@cbnk),a

+    endif

+

+; check warm start mark

+

+	ld ix,mark_55AA		; top of common area

+	ld a,0aah		;

+	cp (ix+000h)		;

+	jr nz,kstart		;

+	cp (ix+002h)		;

+	jr nz,kstart		;

+	cpl			;

+	cp (ix+001h)		;

+	jr nz,kstart		;

+	cp (ix+003h)		;

+	jr nz,kstart		;

+	ld sp,$stack		; mark found, check

+	jp z,wstart		; check ok,

+

+; ram not ok, initialize    --  kstart --

+

+kstart:

+    if CPU_Z180

+	ld	a,SYS$CBR	;TODO:

+	out0	(cbr),a

+	ld	a,SYS$CBAR

+	out0	(cbar),a

+    endif

+

+	ld	sp,$stack	;01e1

+

+; Clear RAM using DMA0

+

+    if CPU_Z180

+     if 0

+

+	ld	hl,dmclrt	;load DMA registers

+	call	ioiniml

+	ld	a,0cbh		;01ef	dst +1, src fixed, burst

+	out0	(dmode),a	;01f1

+

+	ld	b,512/64

+	ld	a,062h		;01f4	enable dma0,

+??cl_1:

+	out0	(dstat),a	;01f9	clear (up to) 64k

+	djnz	??cl_1		;	end of RAM?

+

+     endif

+    endif

+

+	ld	hl,055AAh	;set warm start mark

+	ld	(mark_55AA),hl

+	ld	(mark_55AA+2),hl

+

+;	--  wstart  --

+

+wstart:

+	call	sysram_init

+	call	ivtab_init

+    if CPU_Z180

+;	call	prt0_init

+    endif

+

+	call	msginit

+	call	charini

+

+    if CPU_Z80

+	ld	a,0

+	call	selbnk

+    endif

+

+	ld	a,INIDONEVAL	;tell others (CP/M) that hardware and fifos

+	ld	(INIDONE),a	;    are allready initialized

+

+	im 2

+	ei

+

+	call ?const

+	call ?const

+	or a

+	call nz,?conin

+

+    if CPU_Z180

+	ld e,0			;Sys$Bank

+    else

+; TODO:

+    endif

+	jp ddtz

+

+

+    if CPU_Z180

+; TODO: SYS$CBR

+syscbr:	db	0

+    endif

+

+;

+;----------------------------------------------------------------------

+;

+

+	global	bufinit

+

+bufinit:

+	ld	(ix+o.in_idx),0		;reset pointers (empty fifo)

+	ld	(ix+o.out_idx),0

+	ld	a,(ix+o.id)

+	ld	hl,fifolst

+	ld	e,a

+	ld	d,0

+	add	hl,de

+	add	hl,de

+	push	ix

+	pop	de

+	cp	4

+	jr	nc,bfi_skip

+

+	ld	(hl),e

+	inc	hl

+	ld	(hl),d

+

+bfi_skip:

+	ex	de,hl

+	call	hwl2phy			;get phys. address of fifo

+	ld	c,a

+	ld	a,(ix+o.id)		;fifo id

+	or	a			;test if fifo 0

+	ret	z

+

+	ld	b,a

+	push	bc			;c: bank-addr, b: ignored

+	push	hl			;address

+	ld	c,0

+	push	bc			;c: function, b:subf

+	ld	b,5

+	ld	h,c

+	ld	l,c

+	add	hl,sp

+	call	msg.sm

+	pop	hl

+	pop	hl

+	pop	hl

+	ret

+

+	public	fifolst

+fifolst :

+	rept 4

+	 dw	0

+	endm

+

+;----------------------------------------------------------------------

+

+	extrn	msg.sm

+	extrn	msginit,msg.sout

+	extrn	mtx.fifo,mrx.fifo

+	extrn	ff.init,co.fifo,ci.fifo

+

+

+fifoinit:

+    if CPU_Z180

+

+	ret

+

+    else ;CPU_Z180

+

+	call	msginit

+

+	ld	hl,buffers

+	ld	b,buftablen

+bfi_1:

+	ld	a,(hl)

+	inc	hl

+	ld	(bufdat+0),a

+	ld	e,(hl)

+	inc	hl

+	ld	d,(hl)

+	inc	hl

+	ex	de,hl

+

+	or	a

+	jr	nz,bfi_2

+

+	ld	a,(@cbnk)

+	call	bnk2phy

+

+	ld	(40h+0),hl

+	ld	(40h+2),a

+	out	(AVRINT5),a

+	jr	bfi_3

+bfi_2:

+

+	ld	a,(@cbnk)

+	call	bnk2phy

+

+	ld	(bufdat+1),hl

+	ld	(bufdat+3),a

+	ld	hl,inimsg

+	call	msg.sout

+bfi_3:

+	ex	de,hl

+	djnz	bfi_1

+	ret

+    endif

+

+

+

+

+;

+;----------------------------------------------------------------------

+;

+

+sysram_init:

+	ld hl,sysramw

+	ld de,topcodsys

+	ld bc,sysrame-sysramw

+	ldir

+

+	ret

+

+;----------------------------------------------------------------------

+

+ivtab_init:

+	ld	hl,ivtab	;

+	ld	a,h		;

+	ld	i,a		;

+    if CPU_Z180

+	out0	(il),l		;

+    endif

+

+; Let all vectors point to spurious int routines.

+

+	ld	d,high sp.int0

+	ld	a,low  sp.int0

+	ld	b,9

+ivt_i1:

+	ld	(hl),a

+	inc	l

+	ld	(hl),d

+	inc	l

+	add	a,sp.int.len

+	djnz	ivt_i1

+	ret

+

+;----------------------------------------------------------------------

+

+; Reload value for 10 ms Int. (0.1KHz):

+; tc10ms = phi/prescale/0.1KHz  = phi / (prescale/10)

+

+PRT_TC10MS	equ	18432 / (PRT_PRE/10)

+

+

+    if CPU_Z180

+prt0_init:

+	ld	a,i

+	ld	h,a

+	in0	a,(il)

+	and	0E0h

+	or	IV$PRT0

+	ld	l,a

+	ld	(hl),low  iprt0

+	inc	hl

+	ld	(hl),high iprt0

+	ld	hl,prt0itab

+	call	ioiniml

+	ret

+

+prt0itab:

+	db	prt0it_e-prt0itab-2

+	db	tmdr0l

+	dw	PRT_TC10MS

+	dw	PRT_TC10MS

+	db	M_TIE0+M_TDE0	;enable timer 0 interrupt and down count.

+prt0it_e:

+	db	0

+    endif

+

+

+;

+;----------------------------------------------------------------------

+;

+

+    if CPU_Z180

+io.ini:

+     if 0

+	push	bc

+	ld	b,0		;high byte port adress

+ioi_nxt:

+	ld	a,(hl)		;count

+	inc	hl

+	or	a

+	jr	z,ioi_e

+

+	ld	c,(hl)		;port address

+	inc	hl

+ioi_r:

+	outi

+	inc	b		;outi decrements b

+	dec	a

+	jr	nz,ioi_r

+	jr	ioi_nxt

+ioi_e:

+	pop	bc

+	ret

+

+     else ;(if 1/0)

+

+	push	bc

+	jr	ioi_nxt

+ioi_l:

+	ld	c,(hl)		;port address

+	inc	hl

+	inc	c

+ioi_r:

+	dec	c		;otim increments c

+	otim

+	jr	z,ioi_r

+ioi_nxt:

+	ld	b,(hl)		;count

+	inc	hl

+	inc	b		;stop if count == 0

+	djnz	ioi_l

+	pop	bc

+	ret

+

+     endif ;(1/0)

+

+    else

+

+io.ini:

+	push	bc

+	jr	ioi_nxt

+ioi_l:

+	ld	c,(hl)		;port address

+	inc	hl

+	otir

+ioi_nxt:

+	ld	b,(hl)		;count

+	inc	hl

+	inc	b

+	djnz	ioi_l

+    endif

+	pop	bc

+	ret

+

+;----------------------------------------------------------------------

+

+    if CPU_Z180

+

+	global ioiniml

+

+ioiniml:

+	push	bc

+	xor	a

+ioml_lp:

+	ld	b,(hl)

+	inc	hl

+	cp	b

+	jr	z,ioml_e

+

+	ld	c,(hl)

+	inc	hl

+	otimr

+	jr	ioml_lp

+ioml_e:

+	pop	bc

+	ret	z

+    endif

+

+io.ini.l:

+;

+

+

+

+;----------------------------------------------------------------------

+;

+    if CPU_Z180

+

+;--------------------------------------------------------------------

+; Return the BBR value for the given bank number

+;

+; in  a: Bank number

+; out a: bbr value

+

+bnk2log:

+	or	a		;

+	ret	z		; Bank 0 is at physical address 0

+

+	push	bc		;

+	ld	b,a		;

+	ld	c,CA		;

+	mlt	bc		;

+	ld	a,c		;

+	add	a,10h		;

+	pop	bc		;

+	ret			;

+

+;--------------------------------------------------------------

+

+;in  hl: Log. Address

+;     a: Bank number

+;

+;out ahl: Phys. (linear) Address

+

+

+bnk2phy:

+	call	bnk2log

+	; fall thru

+

+;--------------------------------------------------------------

+;

+; hl: Log. Address

+;  a: Bank base (bbr)

+;

+;	     2           0       0

+;	     0   6       8       0

+; hl	          hhhhhhhhllllllll

+;  a	+     bbbbbbbb

+;

+; OP: ahl = (a<<12) + (h<<8) + l

+;

+;out ahl: Phys. (linear) Address

+

+log2phy:

+	push	bc		;

+l2p_i:

+	ld	c,a		;

+	ld	b,16		;

+	mlt	bc		; bc = a<<4

+	ld	a,c		;

+	add	a,h		;

+	ld	h,a		;

+	ld	a,b		;

+	adc	a,0		;

+	pop	bc		;

+	ret			;

+

+;--------------------------------------------------------------

+;

+; hl: Log. Address

+;

+;

+; OP: ahl = (bankbase<<12) + (d<<8) + e

+;

+;out ahl: Phys. (linear) Address

+

+	public	hwl2phy

+

+hwl2phy:

+	push	bc		;

+	in0	c,(cbar)	;

+	ld	a,h		;

+	or	00fh		; log. addr in common1?

+	cp	c

+	jr	c,hlp_1

+

+	in0	a,(cbr)		; yes, cbr is address base

+	jr	hl2p_x

+hlp_1:

+	ld	b,16		; log. address in baked area?

+	mlt	bc

+	ld	a,h

+	cp	c

+	jr	c,hlp_2

+	in0	a,(bbr)		; yes, bbr is address base

+	jr	hl2p_x

+hlp_2:

+	xor	a		; common1

+hl2p_x:

+	jr	nz,l2p_i

+

+	pop	bc		; bank part is 0, no translation

+	ret			;

+

+

+

+    else	;CPU_Z180

+

+;----------------------------------------------------------------------

+;

+

+bnk2phy:

+	sla	h

+	jr	nc,b2p_1		;A15=1 --> common

+	ld	a,3

+b2p_1:

+	srl	a

+	rr	h

+	ret

+

+    endif

+

+;--------------------------------------------------------------

+;

+;return:

+; hl = hl + a

+; Flags undefined

+;

+

+add_hl_a:

+	add a,l

+	ld l,a

+	ret nc

+	inc h

+	ret

+

+; ---------------------------------------------------------

+

+sysramw:

+

+	.phase isvsw_loc

+topcodsys:

+

+; Trampoline for interrupt routines in banked ram.

+; Switch stack pointer to "system" stack in top ram

+; Save cbar

+

+isv_sw:				;

+	ex (sp),hl		;save hl, 'return adr' in hl

+	push de			;

+	push af			;

+	ex de,hl		;'return address' in de

+	ld hl,0			;

+	add hl,sp		;

+	ld a,h			;

+	cp 0f8h			;

+	jr nc,isw_1		;stack allready in top ram

+	ld sp,$stack		;

+isw_1:

+	push hl			;save user stack pointer

+	in0 h,(cbar)		;

+	push hl			;

+	ld a,SYS$CBAR		;

+	out0 (cbar),a		;

+	ex de,hl		;

+	ld e,(hl)		;

+	inc hl			;

+	ld d,(hl)		;

+	ex de,hl		;

+	push bc			;

+	call jphl		;

+

+	pop bc			;

+	pop hl			;

+	out0 (cbar),h		;

+	pop hl			;

+	ld sp,hl		;

+	pop af			;

+	pop de			;

+	pop hl			;

+	ei			;

+	ret			;

+jphl:

+	jp (hl)			;

+

+; ---------------------------------------------------------

+

+    if CPU_Z180

+

+iprt0:

+	push	af

+	push	hl

+	in0	a,(tcr)

+	in0	a,(tmdr0l)

+	in0	a,(tmdr0h)

+	ld	a,(tim_ms)

+	inc	a

+	cp	100

+	jr	nz,iprt_1

+	xor	a

+	ld	hl,(tim_s)

+	inc	hl

+	ld	(tim_s),hl

+iprt_1:

+	ld	(tim_ms),a

+	pop	hl

+	pop	af

+	ei

+	ret

+

+    endif

+

+; ---------------------------------------------------------

+

+sp.int0:

+	ld	a,0d0h

+	jr	sp.i.1

+sp.int.len equ	$-sp.int0

+	ld	a,0d1h

+	jr	sp.i.1

+	ld	a,0d2h

+	jr	sp.i.1

+	ld	a,0d3h

+	jr	sp.i.1

+	ld	a,0d4h

+	jr	sp.i.1

+	ld	a,0d5h

+	jr	sp.i.1

+	ld	a,0d6h

+	jr	sp.i.1

+	ld	a,0d7h

+	jr	sp.i.1

+	ld	a,0d8h

+sp.i.1:

+;	out	(80h),a

+	halt

+

+; ---------------------------------------------------------

+

+    if CPU_Z80

+

+; Get IFF2

+; This routine may not be loaded in page zero

+;

+; return Carry clear, if INTs are enabled.

+;

+	global getiff

+getiff:

+	xor	a		;clear accu and carry

+	push	af		;stack bottom := 00xxh

+	pop	af

+	ld	a,i		;P flag := IFF2

+	ret	pe		;exit carry clear, if enabled

+	dec	sp

+	dec	sp		;has stack bottom been overwritten?

+	pop	af

+	and	a		;if not 00xxh, INTs were

+	ret	nz		;actually enabled

+	scf			;Otherwise, they really are disabled

+	ret

+

+;----------------------------------------------------------------------

+

+	global	selbnk

+

+; a: bank (0..2)

+

+selbnk:

+	push	bc

+	ld	c,a

+	call	getiff

+	push	af

+

+	ld	a,c

+	di

+	ld	(@cbnk),a

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio0),a

+

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	pop	af

+	pop	bc

+	ret	c			;INTs were disabled

+	ei

+	ret

+

+;----------------------------------------------------------------------

+

+; c: bank (0..2)

+

+    if 0

+

+selbnk:

+	ld	a,(@cbnk)

+	xor	c

+	and	3

+	ret	z		;no change

+

+	call	getiff

+	push	af

+	ld	a,c

+	di

+	ld	(@cbnk),a

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio0),a

+

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	pop	af

+	ret	nc			;INTs were disabled

+	ei

+	ret

+

+    endif

+

+;----------------------------------------------------------------------

+

+    if 0

+	ex	af,af'

+	push	af

+	ex	af,af'

+

+	rra

+	jr	nc,stbk1

+	ex	af,af'

+	ld	a,5

+	out	(SIOAC),a

+	ld	a,(mm_sio0)

+	rla

+	srl	c

+	rra

+	out	(SIOAC),a

+	ld	(mm_sio1),a

+	ex	af,af'

+

+stbk1:

+	rra

+	jr	nc,stbk2

+	ex	af,af'

+	ld	a,5

+	out	(SIOBC),a

+	ld	a,(mm_sio1)

+	rla

+	srl	c

+	rra

+	out	(SIOBC),a

+	ld	(mm_sio1),a

+	ex	af,af'

+

+stbk2:

+    endif

+

+	global	@cbnk

+	global	mm_sio0, mm_sio1

+

+@cbnk:	db	0		; current bank (0..2)

+mm_sio0:

+	ds	1

+mm_sio1:

+	ds	1

+

+

+    endif

+

+;----------------------------------------------------------------------

+

+curph	defl	$

+	.dephase

+sysrame:

+	.phase curph

+tim_ms:	db	0

+tim_s:	dw	0

+	.dephase

+

+;-----------------------------------------------------

+

+

+	cseg

+

+	;.phase	0ffc0h

+;ivtab	equ	0ffc0h		; 0ffc0h	;int vector table

+	;.dephase

+

+	;.phase	0fffah

+mark_55AA equ 0 - 2 - 4		;2 byte for trap stack

+	;ds	4

+	;.dephase

+

+

+	end

diff --git a/z180/modebaud.inc b/z180/modebaud.inc
new file mode 100644
index 0000000..2e60e44
--- /dev/null
+++ b/z180/modebaud.inc
@@ -0,0 +1,31 @@
+	; equates for mode byte bit fields

+

+mb$input		equ 00000001b	; device may do input

+mb$output		equ 00000010b	; device may do output

+mb$in$out		equ mb$input+mb$output

+

+mb$soft$baud		equ 00000100b	; software selectable

+					; baud rates

+

+mb$serial		equ 00001000b	; device may use protocol

+mb$xon$xoff		equ 00010000b	; XON/XOFF protocol

+					; enabled

+

+baud$none		equ 0		; no baud rate associated

+					; with this device

+baud$50			equ 1		; 50 baud

+baud$75			equ 2		; 75 baud

+baud$110		equ 3		; 110 baud

+baud$134		equ 4		; 134.5 baud

+baud$150		equ 5		; 150 baud

+baud$300		equ 6		; 300 baud

+baud$600		equ 7		; 600 baud

+baud$1200		equ 8		; 1200 baud

+baud$1800		equ 9		; 1800 baud

+baud$2400		equ 10		; 2400 baud

+baud$3600		equ 11		; 3600 baud

+baud$4800		equ 12		; 4800 baud

+baud$7200		equ 13		; 7200 baud

+baud$9600		equ 14		; 9600 baud

+baud$19200		equ 15		; 19.2k baud

+

diff --git a/z180/msgbuf-a.180 b/z180/msgbuf-a.180
new file mode 100644
index 0000000..3575569
--- /dev/null
+++ b/z180/msgbuf-a.180
@@ -0,0 +1,374 @@
+	page	255

+	.z80

+

+	public	mrx.fifo,mtx.fifo

+

+	public	msginit,msgi.st,msg.in,msgo.st

+	public	msg.sm,msg.sout

+

+	extrn	bufinit,hwl2phy

+	extrn	fifolst

+

+	include config.inc

+	if CPU_Z180

+	include	z180reg.inc

+	endif

+

+;--------------------------------------------------------------

+

+	dseg

+

+	mkbuf	mtx.fifo_id, mtx.fifo, mtx.fifo_len

+	mkbuf	mrx.fifo_id, mrx.fifo, mrx.fifo_len

+

+;--------------------------------------------------------------

+

+	cseg

+

+;

+; Init buffer

+;

+

+msginit:

+	ld	a,(043h)

+;TODO: value should be 0

+	ld	ix,mtx.fifo

+	call	bufinit

+	push	ix

+	pop	hl

+	call	hwl2phy

+	ld	(040h),hl

+	ld	(040h+2),a

+	ld	a,0ffh

+	ld	(043h),a

+	out	(AVRINT5),a

+wait:

+	ld	a,(043h)

+	or	a

+	jr	nz,wait

+

+	ld	ix,mrx.fifo

+	jp	bufinit

+

+;--------------------------------------------------------------

+

+msgi.st:

+	push	ix

+	ld	ix,mrx.fifo		;

+

+buf.empty:

+	ld	a,(ix+o.in_idx)		;

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+;--------------------------------------------------------------

+

+msg.in:

+	push	ix

+	ld	ix,mrx.fifo		;

+

+buf.get:

+	ld	a,(ix+o.out_idx)	;

+bg.wait:

+	cp	(ix+o.in_idx)		;

+	jr	z,bg.wait

+

+	push	hl			;

+	push	ix

+	pop	hl

+	add	a,l

+	ld	l,a

+	jr	nc,bg.nc

+	inc	h

+bg.nc:

+	ld	l,(hl)

+

+	ld	a,(ix+o.out_idx)	;

+	inc	a

+	and	(ix+o.mask)

+	ld	(ix+o.out_idx),a

+

+	ld	a,l

+	pop	hl

+	pop	ix

+	ret

+

+;--------------------------------------------------------------

+

+msgo.st:

+	push	ix

+	ld	ix,mtx.fifo		;

+

+buf.full:

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+;--------------------------------------------------------------

+

+    if 0

+

+msg.out:

+	push	ix

+	ld	ix,mtx.fifo		;

+

+buf.put:

+	push	hl			;

+	push	bc

+	push	ix

+	pop	hl

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	add	hl,bc

+	ld	b,a

+

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	(hl),b

+	ld	(ix+o.in_idx),a

+

+	ld	a,b

+	out	(AVRINT5),a

+	pop	bc

+	pop	hl

+	pop	ix

+	ret

+

+    endif

+

+;--------------------------------------------------------------

+

+   if 0

+

+msg.out:

+	push	ix

+	ld	ix,mtx.fifo		;

+

+buf.put:

+	push	bc

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	push	ix			;14

+	add	ix,bc			;10

+	ld	(ix+0),a		;15

+	pop	ix			;12 / 51

+	ld	b,a			; 4

+	ld	a,c			;

+	inc	a			;

+	and	(ix+o.mask)		;

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait		;

+	ld	(ix+o.in_idx),a		;

+

+	ld	a,b

+	out	(AVRINT5),a

+	pop	bc

+	pop	ix

+	ret

+

+   endif

+

+;----------------------------------------------------------------------

+;

+; Put char in message buffer:

+;     ix: buffer to put into

+;     c:  char

+

+buf.put:

+	push	ix			;15

+	push	bc			;11

+	ld	a,(ix+o.in_idx)		;19

+	ld	c,a			;4

+	ld	b,0			;7

+	add	ix,bc			;11

+	pop	bc			;10

+	ld	(ix),c			;7

+	pop	ix			;14

+

+	inc	a			;4

+	and	(ix+o.mask)		;19	=121

+bufp.wait:

+	cp	(ix+o.out_idx)		;19

+	jr	z,bufp.wait		;12/7

+	ld	(ix+o.in_idx),a		;19

+

+	out	(AVRINT5),a		;11

+	ld	a,c			;4

+	ret				;10	=191

+

+

+;--------------------------------------------------------------

+

+    if 0

+    	; Works only, if buffer size < (128 - 3)

+    	; 	--> mask must be 03fh or less

+

+msg.out:

+	push	ix

+	ld	ix,mtx.fifo		;

+

+buf.put:

+	push	bc

+   	ld	b,a			; 4

+	ld	a,(ix+o.in_idx)		;14

+	ld	($ + 3 + 2),a		;15

+	ld	(ix+0),b		;15

+	inc	a			;

+	and	(ix+o.mask)		;

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait		;

+	ld	(ix+o.in_idx),a		;

+

+	ld	a,b

+	out	(AVRINT5),a

+	pop	bc

+	pop	ix

+	ret

+

+    endif

+

+;--------------------------------------------------------------

+;

+; (hl): data

+

+msg.sout:

+	push	ix			;14

+	ld	ix,mtx.fifo		;12

+	push	bc			;11

+	push	de			;11

+	ld	c,(hl)			; 6

+	ld	b,0			; 6

+	inc	hl			; 7

+ms.ol:					;	\

+	ld	a,low mtx.fifo		; 6

+	add	a,(ix+o.in_idx)		;14

+	ld	e,a			; 4

+	ld	a,high mtx.fifo		; 6

+	adc	a,b			; 4

+	ld	d,a			; 4

+

+	ld	a,(ix+o.in_idx)		;14

+	inc	a			; 4

+	and	(ix+o.mask)		;14

+ms.wait:

+	cp	(ix+o.out_idx)		;14

+	jr	z,ms.wait		; 6/8

+

+	ldi				;12

+	ld	(ix+o.in_idx),a		;15

+	jp	pe,ms.ol		; 6/9    -- 126

+

+	out	(AVRINT5),a		;10

+	pop	de			; 9

+	pop	bc			; 9

+	pop	ix			;12

+	ret				; 9

+

+;--------------------------------------------------------------

+;

+; (hl): data

+

+    if 0

+

+msg.sout:

+	push	ix			;14

+	ld	ix,mtx.fifo		;12

+	push	bc			;11

+	push	de			;11

+	ld	b,(hl)			; 6

+	inc	hl			; 4

+	ex	de,hl			; 3

+ms.ol:					;	\

+	push	ix			;14

+	pop	hl			; 9

+	ld	c,(ix+o.in_idx)		;14

+	ld	a,c			; 4

+	add	l			; 4

+	ld	l,a			; 4

+	jr	nc,ms.on		; 6/8

+	inc	h			; 4

+ms.on:

+	ld	a,c			; 4

+	inc	a			; 4

+	and	(ix+o.mask)		;14

+ms.wait:

+	cp	(ix+o.out_idx)		;14

+	jr	z,ms.wait		; 6/8

+	ld	c,a			; 4

+	ld	a,(de)			; 6

+	inc	de			; 4

+	ld	(hl),a			; 7

+	ld	(ix+o.in_idx),c		;15

+	djnz	ms.ol			; 7/9	-- 130

+

+	out	(AVRINT5),a		;10

+	ex	de,hl			; 3

+	pop	de			; 9

+	pop	bc			; 9

+	pop	ix			;12

+	ret				; 9

+

+    endif

+

+;--------------------------------------------------------------

+

+msg.co:

+	push	af

+	push	hl

+	ld	(buf_char),a

+	ld	hl,buf

+	call	msg.sout

+	pop	hl

+	pop	af

+	ret

+

+

+buf:

+	db	buf_end - $ - 1		;output string length

+	db	0AEh			; message start token

+	db	buf_end - $ - 1		; message length

+	db	1			; command

+	db	1			; subcommand

+buf_char:

+	db	0			; pay load

+buf_end:

+

+;----------------------------------------------------------------------

+

+;----------------------------------------------------------------------

+; Send message MEMORY

+;

+;     hl: pointer to message (netto)

+;     b: msg length

+

+msg.sm:

+	push	ix

+	ld	ix,mtx.fifo

+	ld	c,0AEh

+	call	buf.put

+	ld	c,b

+	call	buf.put

+msm_l:

+	ld	c,(hl)

+	inc	hl

+	call	buf.put

+	djnz	msm_l

+	pop	ix

+	ret

+

+

+	end

diff --git a/z180/msgbuf-s.180 b/z180/msgbuf-s.180
new file mode 100644
index 0000000..6bfd709
--- /dev/null
+++ b/z180/msgbuf-s.180
@@ -0,0 +1,129 @@
+	page	255

+	.z80

+	

+	global	msg_fifo

+	global	msginit

+	global	msg.out,msg.sout,msg.co

+	

+	extrn	buf.init

+

+	include config.inc

+	include	z180reg.inc

+

+;--------------------------------------------------------------

+

+	dseg

+

+	mkbuf	msg_fifo, 0

+

+

+;--------------------------------------------------------------

+

+	cseg

+

+;

+; Init buffer

+;

+	

+msginit:

+	ld	ix,msg_fifo

+	ld	a,msg_fb_len-1

+	jp	buf.init

+

+

+;--------------------------------------------------------------

+

+msg.sts:

+	push	ix

+	ld	ix,msg_fifo		;

+

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+;--------------------------------------------------------------

+

+msg.out:

+	push	ix

+	ld	ix,msg_fifo		;

+

+	push	bc

+	ld	b,a			;save char

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	c,a

+	ld	a,b

+	out	(PMSG),a

+	ld	(ix+o.in_idx),c

+	

+	pop	bc

+	pop	ix

+	ret

+

+;--------------------------------------------------------------

+;

+; (hl): data

+  

+msg.sout:

+	push	ix

+	ld	ix,msg_fifo		;

+	push	bc

+

+	ld	b,(hl)			;count

+	inc	hl

+obs_1:

+	ld	a,(ix+o.out_idx)	;

+	sub	(ix+o.in_idx)		;

+	dec	a

+	and	(ix+o.mask)

+	cp	b

+	jr	c,obs_1

+

+	ld	c,(hl)			;port address

+	inc	hl

+	ld	a,b

+	otir

+	add	(ix+o.in_idx)

+	and	(ix+o.mask)

+	ld	(ix+o.in_idx),a

+	pop	bc

+	pop	ix

+	ret

+

+;----------------------------------------------------------------------

+

+msg.co:

+	push	af

+	push	hl

+	ld	(buf_char),a

+	ld	hl,buf

+	call	msg.sout

+	pop	hl

+	pop	af

+	ret

+	

+	

+buf:

+	db	buf_end - $ - 2		;output string length

+	db	PMSG			;output port

+	db	0AEh			; message start token

+	db	buf_end - $ - 1		; message length

+	db	1			; command

+	db	1			; subcommand

+buf_char:

+	db	0			; pay load

+buf_end:

+

+;----------------------------------------------------------------------

+

+	end

+

diff --git a/z180/msgfifo.180 b/z180/msgfifo.180
new file mode 100644
index 0000000..cf1ae2a
--- /dev/null
+++ b/z180/msgfifo.180
@@ -0,0 +1,259 @@
+	page	255

+	.z80

+

+	global	msg_rx_fifo,msg_tx_fifo

+

+	global	msginit,msgi.st,msg.in,msgo.st,msg.out

+	global	msg.sout,msg.co

+

+	extrn	buf.init

+

+	include config.inc

+	include	z180reg.inc

+

+;--------------------------------------------------------------

+

+	dseg

+

+	mkbuf	mtx.fifo_id, msg_tx_fifo, msg_tx_fifo_len

+	mkbuf	mrx.fifo_id, msg_rx_fifo, msg_rx_fifo_len

+

+

+

+;--------------------------------------------------------------

+

+	cseg

+

+;

+; Init buffer

+;

+

+msginit:

+	ld	ix,msg_rx_fifo

+	ld	a,msg_rx_fifo.mask

+	call	buf.init

+	ld	ix,msg_tx_fifo

+	ld	a,msg_tx_fifo.mask

+	jp	buf.init

+

+;--------------------------------------------------------------

+

+msgi.st:

+	push	ix

+	ld	ix,msg_rx_fifo		;

+

+buf.empty:

+	ld	a,(ix+o.in_idx)		;

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+;--------------------------------------------------------------

+

+msg.in:

+	push	ix

+	ld	ix,msg_rx_fifo		;

+

+buf.get:

+	ld	a,(ix+o.out_idx)	;

+bg.wait:

+	cp	(ix+o.in_idx)		;

+	jr	z,bg.wait

+

+	push	hl			;

+	push	ix

+	pop	hl

+	add	a,l

+	ld	l,a

+	jr	nc,bg.nc

+	inc	h

+bg.nc:

+	ld	l,(hl)

+

+	ld	a,(ix+o.out_idx)	;

+	inc	a

+	and	(ix+o.mask)

+	ld	(ix+o.out_idx),a

+

+	ld	a,l

+	pop	hl

+	pop	ix

+	ret

+

+;--------------------------------------------------------------

+

+msgo.st:

+	push	ix

+	ld	ix,msg_tx_fifo		;

+

+buf.full:

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+	sub	(ix+o.out_idx)		;

+	pop	ix

+	ret	z

+	or	0ffh

+	ret

+

+;--------------------------------------------------------------

+

+msg.out:

+	push	ix

+	ld	ix,msg_tx_fifo		;

+

+buf.put:

+	push	hl			;

+	push	bc

+	push	ix

+	pop	hl

+	ld	c,(ix+o.in_idx)		;

+	ld	b,0

+	add	hl,bc

+	ld	b,a

+

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	(hl),b

+	ld	(ix+o.in_idx),a

+

+	ld	a,b

+	out0	(AVRINT5),a

+	pop	bc

+	pop	hl

+	pop	ix

+	ret

+

+

+;--------------------------------------------------------------

+;--------------------------------------------------------------

+;--------------------------------------------------------------

+

+if 0

+msg.out:

+	push	ix

+	ld	ix,msg_fifo		;

+

+	push	bc

+	ld	b,a			;save char

+	ld	a,(ix+o.in_idx)		;

+	inc	a

+	and	(ix+o.mask)

+bp.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,bp.wait

+	ld	c,a

+	ld	a,b

+	out	(PMSG),a

+	ld	(ix+o.in_idx),c

+

+	pop	bc

+	pop	ix

+	ret

+endif

+

+;--------------------------------------------------------------

+;

+; (hl): data

+

+msg.sout:

+	push	ix

+	ld	ix,msg_tx_fifo		;

+

+	push	bc

+	push	de

+	ld	b,(hl)			;

+	inc	hl

+	ex	de,hl

+

+ms.ol:

+	push	ix

+	pop	hl

+	ld	c,(ix+o.in_idx)		;

+	ld	a,c

+	add	l

+	ld	l,a

+	jr	nc,ms.on

+	inc	h

+ms.on:

+	ld	a,c			;

+	inc	a

+	and	(ix+o.mask)

+ms.wait:

+	cp	(ix+o.out_idx)		;

+	jr	z,ms.wait

+	ld	c,a

+	ld	a,(de)

+	inc	de

+	ld	(hl),a

+	ld	(ix+o.in_idx),c

+	djnz	ms.ol

+	out0	(AVRINT5),a

+	ex	de,hl

+	pop	de

+	pop	bc

+	pop	ix

+	ret

+

+;--------------------------------------------------------------

+

+if 0

+msg.sout:

+	push	ix

+	ld	ix,msg_fifo		;

+	push	bc

+

+	ld	b,(hl)			;count

+	inc	hl

+obs_1:

+	ld	a,(ix+o.out_idx)	;

+	sub	(ix+o.in_idx)		;

+	dec	a

+	and	(ix+o.mask)

+	cp	b

+	jr	c,obs_1

+

+	ld	c,(hl)			;port address

+	inc	hl

+	ld	a,b

+	otir

+	add	(ix+o.in_idx)

+	and	(ix+o.mask)

+	ld	(ix+o.in_idx),a

+	pop	bc

+	pop	ix

+	ret

+

+;----------------------------------------------------------------------

+endif

+

+msg.co:

+	push	af

+	push	hl

+	ld	(buf_char),a

+	ld	hl,buf

+	call	msg.sout

+	pop	hl

+	pop	af

+	ret

+

+

+buf:

+	db	buf_end - $ - 1		;output string length

+	db	081h			; message start token

+	db	buf_end - $ - 1		; message length

+	db	1			; command

+	db	1			; subcommand

+buf_char:

+	db	0			; pay load

+buf_end:

+

+;----------------------------------------------------------------------

+

+	end

diff --git a/z180/romend.180 b/z180/romend.180
new file mode 100644
index 0000000..2a63342
--- /dev/null
+++ b/z180/romend.180
@@ -0,0 +1,9 @@
+

+	global	romend

+

+	cseg

+

+romend equ	$

+	

+	end

+

diff --git a/z180/z180.lib b/z180/z180.lib
new file mode 100644
index 0000000..ffe0ab7
--- /dev/null
+++ b/z180/z180.lib
@@ -0,0 +1,120 @@
+	.xlist

+;;

+;; Z180 / HD64180 MACRO LIBRARY

+;;

+

+IFNDEF SLP

+

+;;

+;;

+;;	HD64180 instructions:

+;;

+;;	SLP			; Enter SLEEP mode

+;;	MLT	RR		; 8 bit multiply with 16 bit result

+;;	IN0	R,P 		; Input from internal port

+;;	OUT0	P,R 		; Output to internal port

+;;	OTIM			; Block output, increment

+;;	OTIMR			; Block output, increment and repeat

+;;	OTDM			; Block output, decrement

+;;	OTDMR			; Block output, decrement and repeat

+;;	TSTIO	P		; Non destructive AND, I/O port and A

+;;	TST	R		; Non destructive AND, reg and A

+;;	TST	ID		; Non destructive AND, immediate data and A

+;;	TST	(HL)		; Non destructive AND, (HL) and A

+;;

+;;

+

+??BC	EQU	0	; Double-register definitions

+??DE	EQU	1

+??HL	EQU	2

+??SP	EQU	3

+

+??A	EQU	7	; Single-register defintions

+??B	EQU	0

+??C	EQU	1

+??D	EQU	2

+??E	EQU	3

+??H	EQU	4

+??L	EQU	5

+

+SLP	MACRO

+	DEFB	0EDH,76H

+	ENDM

+

+MLT	MACRO	?R

+	DB	0EDH,4CH+(??&?R AND 3) SHL 4

+	ENDM

+

+IN0	MACRO	?R,?P

+	DB	0EDH,(??&?R AND 7) SHL 3, ?P

+	ENDM

+

+OUT0	MACRO	?P,?R

+	DB	0EDH,1+(??&?R AND 7) SHL 3,?P

+	ENDM

+

+OTIM	MACRO

+	DB	0EDH,83H

+	ENDM

+

+OTIMR	MACRO

+	DB	0EDH,93H

+	ENDM

+

+OTDM	MACRO

+	DB	0EDH,8BH

+	ENDM

+

+OTDMR	MACRO

+	DB	0EDH,9BH

+	ENDM

+

+TSTIO	MACRO	?P

+	DB	0EDH,74H,?P

+	ENDM

+

+TSTR	MACRO	?R

+	DB	0EDH,4+(??&?R AND 7) SHL 3

+	ENDM

+

+TSTD	MACRO	?P

+	DB	0EDH,64H,?P

+	ENDM

+

+TSTP	MACRO

+	DB	0EDH,34H

+	ENDM

+

+TST	MACRO	?R

+	  ?D: SET 0

+	  IRPC	?X,?R

+	  ?D: SET ?D+1		; Count # chars in "?R"

+	  ENDM

+	    IF ?D EQ 1		; IF # chars = 1

+	     IRPC ?X,ABCDEHL	; Look up the character

+	       IF ??&?X EQ ??&?R

+	       DB	0EDH,4+(??&?R AND 7) SHL 3

+	       EXITM

+	       ENDIF

+	     ENDM

+	     DB	    0EDh,64h,?R

+	     EXITM

+	    ENDIF

+	IF	(?R = 2) & (?D = 4)

+	   ?D: SET 0

+	   IRPC ?X,?R

+		IFIDN <?X>,<(>

+		    DB 0EDh,34h

+		    EXITM

+		ENDIF

+	   ?D: SET ?D + 1

+	   ENDM

+	ENDIF

+	IF ?D NE 0

+	   DB	0EDH,64H,?R

+	ENDIF

+	ENDM

+

+ENDIF ;/* IFNDEF SLP /

+	.list

+

diff --git a/z180/z180reg.inc b/z180/z180reg.inc
new file mode 100644
index 0000000..a1a90c2
--- /dev/null
+++ b/z180/z180reg.inc
@@ -0,0 +1,197 @@
+	.xlist

+

+;;

+;; HD64180/Z180 Register Definitions

+;;

+

+

+b2m	macro	name,nr

+name	equ	nr

+M_&name	equ	1 shl nr

+	endm

+

+;	ifndef	IOBASE

+IOBASE	equ	0

+;	endif

+

+cntla0	equ	IOBASE+00h	;ASCI Control Register A Channel 0

+cntla1	equ	IOBASE+01h	;ASCI Control Register A Channel 1

+	b2m MPE, 7		;Multi-Processor Mode Enable

+	b2m RE, 6		;Receiver Enable

+	b2m TE, 5		;Transmitter Enable

+	b2m RTS0, 4		;Request to Send Channel 0

+	b2m CKA1D, 4		;

+	b2m MPBR, 3		;Multiprocessor Bit Receive (Read)

+	b2m EFR, 3		;Error Flag Reset (Write)

+	b2m MOD2, 2		;Data Format Mode 1 = 8-Bit data

+	b2m MOD1, 1		;1 = Parity enabled

+	b2m MOD0, 0		;1 = 2 stop bits

+

+cntlb0	equ	IOBASE+02h	;ASCI Control Register B Channel 0

+cntlb1	equ	IOBASE+03h	;ASCI Control Register B Channel 1

+	b2m MPBT,7		;Multiprocessor Bit Transmit

+	b2m MP,6		;Multiprocessor Mode

+	b2m CTS,5		;Clear to Send

+	b2m PS,5		;Prescale

+	b2m PEO,4		;Parity Even Odd

+	b2m DR,3		;Divede Ratio

+	b2m SS2,2		;Source/Speed Select 2,1,0

+	b2m SS1,1		;

+	b2m SS0,0		;

+

+stat0	equ	IOBASE+04h	;ASCI Status Channel 0

+stat1	equ	IOBASE+05h	;ASCI Status Channel 1

+	b2m RDRF,7		;Receive Data Register Full

+	b2m OVRN,6		;Overrun Error

+	b2m PERR,5		;Parity Error   (M80: PE conflicts with JP/CALL cc)

+	b2m FE,4		;Framing Error

+	b2m RIE,3		;Receive Interrupt Enable

+	b2m DCD0,2		;Data Carrier Detect (Ch 0)

+	b2m CTS1E,2		;Clear To Send Enable (Ch 1)

+	b2m TDRE,1		;Transmit Data Register Empty

+	b2m TIE,0		;Transmit Interrupt Enable

+

+tdr0	equ	IOBASE+06h	;ASCI Transmit Data

+tdr1	equ	IOBASE+07h	;ASCI Transmit Data

+rdr0	equ	IOBASE+08h	;ASCI Receive Data

+rdr1	equ	IOBASE+09h	;ASCI Receive Data

+

+cntr	equ	IOBASE+0Ah	;CSI/O Control Register

+trdr	equ	IOBASE+0Bh	;CSI/O Transmit/Receive Data Register

+

+tmdr0l	equ	IOBASE+0Ch	;Timer Data Register Channel 0

+tmdr0h	equ	IOBASE+0Dh	;

+rldr0l	equ	IOBASE+0Eh	;Timer Reload Register Channel 0

+rldr0h	equ	IOBASE+0Fh	;

+tcr	equ	IOBASE+10h	;Timer Control Register

+	b2m TIF1,7		;Timer Interrupt Flag

+	b2m TIF0,6		;

+	b2m TIE1,5		;Timer Interrupt Enable

+	b2m TIE0,4		;

+	b2m TOC1,3		;Timer Output Control

+	b2m TOC0,2		;

+	b2m TDE1,1		;Timer Down Count Enable

+	b2m TDE0,0		;

+

+

+asext0	equ	IOBASE+12h	;ASCI Extension Control Register

+asext1	equ	IOBASE+13h	;ASCI Extension Control Register

+	b2m DCD0DIS,6		;DCD0 Disable

+	b2m CTS0DIS,5		;CTS0 Disable

+	b2m X1,4		;CKA * 1 Clock/Samle Rate Divider

+	b2m BRGMOD,3		;BRG Mode (Baud rate generator)

+	b2m BREAKEN,2		;Break Enable

+	b2m BREAK,1		;Break detected

+	b2m SENDBREAK,0		;Send Break

+

+tmdr1l	equ	IOBASE+14h	;Timer Data Register Channel 1

+tmdr1h	equ	IOBASE+15h	;

+rldr1l	equ	IOBASE+16h	;Timer Reload Register Channel 1

+rldr1h	equ	IOBASE+17h	;

+

+frc	equ	IOBASE+18h	;Free Running Counter

+

+astc0l	equ	IOBASE+1Ah	;ASCI Time Constant Register 0

+astc0h	equ	IOBASE+1Bh	;

+astc1l	equ	IOBASE+1Ch	;ASCI Time Constant Register 1

+astc1h	equ	IOBASE+1Dh	;

+

+cmr	equ	IOBASE+1Eh	;Clock Mutiplier Register

+	b2m X2CM,7		;X2 Clock Multiplier

+	b2m LNC,6		;Low Noise Crystal

+

+ccr	equ	IOBASE+1Fh	;CPU Control Register

+	b2m NCD	7		;No Clock Divide

+

+sar0l	equ	IOBASE+20h	;DMA Src Adr Register Channel 0

+sar0h	equ	IOBASE+21h	;

+sar0b	equ	IOBASE+22h	;

+dar0l	equ	IOBASE+23h	;DMA Dst Adr Register Channel 0

+dar0h	equ	IOBASE+24h	;

+dar0b	equ	IOBASE+25h	;

+bcr0l	equ	IOBASE+26h	;DMA Byte Count Register Channel 0

+bcr0h	equ	IOBASE+27h	;

+

+mar1l	equ	IOBASE+28h	;DMA Memory Address Register Channel 1

+mar1h	equ	IOBASE+29h	;

+mar1b	equ	IOBASE+2Ah	;

+iar1l	equ	IOBASE+2Bh	;DMA I/O Address Register Channel 1

+iar1h	equ	IOBASE+2Ch	;

+iar1b	equ	IOBASE+2Dh	;

+	b2m ALTE,7		;Alternating Chnnels

+	b2m ALTC,6		;Currently selected DMA Channel when Bit7=1

+	b2m REQ1SEL2,2		;

+	b2m REQ1SEL1,1		;

+	b2m REQ1SEL0,0		;

+

+bcr1l	equ	IOBASE+2Eh	;DMA Byte Count Register Channel 1

+bcr1h	equ	IOBASE+2Fh	;

+

+dstat	equ	IOBASE+30h	;DMA Status Register

+	b2m DE1,7		;DMA enable ch 1,0

+	b2m DE0,6		;

+	b2m NDWE1,5		;DMA Enable Bit Write Enable 1,0

+	b2m NDWE0,4		;

+	b2m DIE1,3		;DMA Interrupt Enable 1,0

+	b2m DIE0,2		;

+	b2m DME,0		;DMA Master enable

+

+dmode	equ	IOBASE+31h	;DMA Mode Register

+	b2m DM1,5		;Ch 0 Destination Mode 1,0

+	b2m DM0,4		;

+	b2m SM1,3		;Ch 0 Source Mode 1,0

+	b2m SM0,2		;

+	b2m MMOD,1		;Memory MODE select (0=cycle steel/1=burst)

+

+dcntl	equ	IOBASE+32h	;DMA/WAIT Control

+	b2m MWI1,7		;Memory Wait Insertion

+	b2m MWI0,6		;

+	b2m IWI1,5		;I/O Wait Insertion

+	b2m IWI0,4		;

+	b2m DMS1,3		;DREQi Select (Edge/Level)

+	b2m DMS0,2		;

+	b2m DIMA1,1		;DMA Ch1 I/O Memory Mode Select

+	b2m DIMA0,0

+M_MWI	equ M_MWI1 + M_MWI0

+M_IWI	equ M_IWI1 + M_IWI0

+

+il	equ 	IOBASE+33h	;Interrupt Vector Low Register

+itc	equ	IOBASE+34h	;INT/TRAP Control Register

+	b2m TRAP,7		;Trap

+	b2m UFO,6		;Unidentified Fetch Object

+	b2m ITE2,2		;/INT Enable 2,1,0

+	b2m ITE1,1		;

+	b2m ITE0,0		;

+

+rcr	equ	IOBASE+36h	;Refresh Control Register

+	b2m REFE,7		;Refresh Enable

+	b2m REFW,6		;Refresh Wait State

+	b2m CYC1,1		;Cycle select

+	b2m CYC0,0		;

+

+cbr	equ	IOBASE+38h	;MMU Common Base Register

+bbr	equ	IOBASE+39h	;MMU Bank Base Register

+cbar	equ	IOBASE+3Ah	;MMU Common/Bank Register

+

+omcr	equ	IOBASE+3Eh	;Operation Mode Control Register

+	b2m M1E,7		;M1 Enable

+	b2m M1TE,6		;M1 Temporary Enable

+	b2m IOC,5		;I/O Compatibility

+

+icr	equ	IOBASE+3Fh	;I/O Control Register

+	b2m IOSTP,5		;I/O Stop

+;

+; Interrupt Vectors

+;

+

+IV$INT1	 equ	0		;/INT1         (highest priority)

+IV$INT2	 equ	2		;/INT2

+IV$PRT0	 equ	4		;PRT channel 0

+IV$PRT1	 equ	6		;PRT channel 1

+IV$DMA0	 equ	8		;DMA channel 0

+IV$DMA1	 equ	10		;DMA channel 1

+IV$CSIO	 equ	12		;CSI/O

+IV$ASCI0 equ	14		;ASCI channel 0

+IV$ASCI1 equ	16		;ASCI channel 1 (lowest priority)

+

+	.list