From 41d36f28612cb6c49cf0260236f3b834549883be Mon Sep 17 00:00:00 2001
From: Leo C
Date: Tue, 14 Oct 2014 12:53:48 +0200
Subject: pin command, add user configurable i/o pins

---
 avr/z80-if.c | 103 ++++-------------------------------------------------------
 1 file changed, 6 insertions(+), 97 deletions(-)

(limited to 'avr/z80-if.c')

diff --git a/avr/z80-if.c b/avr/z80-if.c
index dd0dd96..a60a482 100644
--- a/avr/z80-if.c
+++ b/avr/z80-if.c
@@ -64,12 +64,6 @@
 /* Number of array elements */
 #define NELEMS(x)  (sizeof x/sizeof *x)
 
-
-#define CONCAT(x,y) x ## y
-#define EVALUATOR(x,y)  CONCAT(x,y)
-
-#define GPIO_(X)	CONCAT(GPIO, X)
-
 struct bits {
   uint8_t b0:1;
   uint8_t b1:1;
@@ -81,12 +75,14 @@ struct bits {
   uint8_t b7:1;
 } __attribute__((__packed__));
 
+typedef struct bits pbit_t;
+
 #define SBIT(port,pin) ((*(volatile struct bits*)&port).b##pin)
 
 
-#define P_ZCLK		PORTB
-#define ZCLK		7
-#define DDR_ZCLK	DDRB
+//#define P_ZCLK		PORTB
+//#define ZCLK		5
+//#define DDR_ZCLK	DDRB
 #define P_MREQ		PORTD
 #define MREQ		4
 #define DDR_MREQ	DDRD
@@ -130,7 +126,7 @@ struct bits {
 //#define ADB_PORT	PORTE
 
 
-#define Z80_O_ZCLK	SBIT(P_ZCLK, 7)
+//#define Z80_O_ZCLK	SBIT(P_ZCLK, 5)
 #define	Z80_O_MREQ	SBIT(P_MREQ, 4)
 #define Z80_O_RD	SBIT(P_RD, 3)
 #define Z80_O_WR	SBIT(P_WR, 2)
@@ -144,8 +140,6 @@ struct bits {
 #define MASK(n)	((1<<(n))-1)
 #define SMASK(w,s) (MASK(w) << (s))
 
-#define LOWSPEED	50000
-
 
 typedef union {
 	uint32_t l;
@@ -158,89 +152,6 @@ static zstate_t zstate;
 
 /*--------------------------------------------------------------------------*/
 
-static
-uint8_t is_lowspeed()
-{
-	return (TCCR1B & 7) < 2 &&
-		OCR1A > (F_CPU / 2 / LOWSPEED);
-}
-
-static
-void z80_setup_clock(void)
-{
-	/* ZCLK: Output and low */
-	DDR_ZCLK |= _BV(ZCLK);
-	Z80_O_ZCLK = 0;
-
-	DDRB  |= _BV(6);	/* Debug */
-	PORTB |= _BV(6);	/* Debug */
-
-	PRR0 &= ~_BV(PRTIM1);
-
-	/* Timer1: CTC: Toggle OC1C on compare match */
-	OCR1A =  0;
-	OCR1C =  0;
-	TCCR1A = (0b01 << COM1C0) | (0b00 << WGM10);
-	TCCR1B = (0b01 << WGM12)  | (0b001 << CS10);
-}
-
-
-int z80_clock_set(unsigned long freq)
-{
-	unsigned long ocrval = F_CPU  / freq / 2;
-	uint8_t prescale = 0;
-
-	while (ocrval > (1L<<16)) {
-		prescale++;
-		if (prescale < 3)
-			ocrval = ocrval / 8;
-		else
-			ocrval = ocrval /  4;
-	}
-
-	if ((ocrval == 0) || (prescale > 4))
-		return -1;
-
-	ocrval -= 1;
-
-	PINB |= _BV(6);		/* Debug */
-
-	/* Stop Timer */
-	TCCR1B = (0b01 << WGM12)  | (0b000 << CS10);
-	TCNT1 = 0;
-
-	OCR1A =  ocrval;
-	OCR1CL =  ocrval;
-	TCCR1A = (0b01 << COM1C0) | (0b00 << WGM10);
-	TCCR1B = (0b01 << WGM12)  | ((prescale+1) << CS10);
-
-	if (ocrval == 0)
-		ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
-			TCNT1 = 0xFFFF;
-		}
-
-	PINB |= _BV(6);		/* Debug */
-
-	return 0;
-}
-
-uint32_t z80_clock_get(void)
-{
-	uint32_t count = (OCR1A + 1L) * 2;
-	uint8_t pre = (TCCR1B & 7) - 1;
-
-	while (pre) {
-		if (pre > 2)
-			count *= 4;
-		else
-			count *= 8;
-		pre--;
-	}
-
-	return F_CPU/count;
-}
-
-
 
 static void z80_addrbus_set_tristate(void)
 {
@@ -296,8 +207,6 @@ static void z80_reset_pulse(void)
 
 void z80_setup_bus(void)
 {
-	z80_setup_clock();
-
 	/* /ZRESET: Output and low */
 	Z80_O_RST = 0;
 	DDR_RST |= _BV(RST);
-- 
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