From 0c5890bb8c70f34026315c9c5a1878cfd0bbea0d Mon Sep 17 00:00:00 2001
From: Leo C
Date: Wed, 2 Jul 2014 15:24:17 +0200
Subject: New sub dir: avr.

---
 stm32/z180-stamp-stm32.c | 33 ++++++++++++---------------
 stm32/z80-if.c           | 59 ++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 73 insertions(+), 19 deletions(-)

(limited to 'stm32')

diff --git a/stm32/z180-stamp-stm32.c b/stm32/z180-stamp-stm32.c
index 284fc8f..15d732d 100644
--- a/stm32/z180-stamp-stm32.c
+++ b/stm32/z180-stamp-stm32.c
@@ -319,10 +319,10 @@ static void key_timerproc() {
 
 void sys_tick_handler(void)
 {
-	static int tick_10ms = 0;
-	static int count_ms = 0;
+	static int_fast8_t tick_10ms = 0;
+	static int_fast16_t count_ms = 0;
 
-	int i;
+	int_fast8_t i;
 
 	++tick_10ms;
 	if (tick_10ms == 10)
@@ -389,10 +389,10 @@ void tim3_set(int mode)
 
 /*--------------------------------------------------------------------------*/
 
-static uint32_t z80_sram_cmp(uint32_t addr, int length, uint8_t wval, int inc)
+static uint32_t z80_sram_cmp(uint32_t addr, uint32_t length, uint8_t wval, int inc)
 {
 	uint8_t rval;
-	int errors = 0;
+	int_fast8_t errors = 0;
 	
 	DBG_P(1, "SRAM: Check %#.5x byte... ", length);
 	while (length--) {
@@ -510,7 +510,7 @@ struct msg_item {
 
 uint32_t msg_to_addr(uint8_t *msg)
 {
-	uint32_t addr = msg[0] + (msg[1] << 8) + (msg[2] << 16);
+	uint32_t addr = msg[0] | (msg[1] << 8) | ((uint32_t)msg[2] << 16);
 
 	return addr;
 
@@ -543,8 +543,8 @@ void do_msg_char_out(uint8_t subf, int len, uint8_t * msg)
 
 const struct msg_item z80_messages[] =
 {
-	{ 0,
-	  0, 0,
+	{ 0,			/* fct nr. */
+	  0, 0,			/* sub fct nr. from, to */
 	  &do_msg_ini_msgfifo},
 	{ 0,
 	  1, 2,
@@ -564,7 +564,7 @@ const struct msg_item z80_messages[] =
 void do_message(int len, uint8_t *msg)
 {
 	uint8_t fct, sub_fct;
-	int i = 0;
+	int_fast8_t i = 0;
 
 	if (len >= 2) {
 		fct = *msg++;
@@ -608,7 +608,7 @@ void do_message(int len, uint8_t *msg)
 void check_msg_fifo(void)
 {
 	int ch;
-	static int state;
+	static int_fast8_t state;
 	static int msglen,idx;
 	static uint8_t buffer[CTRBUF_LEN];
 
@@ -645,12 +645,11 @@ void check_msg_fifo(void)
 
 void z80_load_mem(void)
 {
-
-DBG_P(1, "Loading z80 memory... \n");
-
 	unsigned sec = 0;
 	uint32_t sec_base = hdrom_start;
 
+	DBG_P(1, "Loading z80 memory... \n");
+
 	while (sec < hdrom_sections) {
 		DBG_P(2, "  From: 0x%.5lX to: 0x%.5lX    (%5li bytes)\n",
 				hdrom_address[sec],
@@ -668,11 +667,7 @@ DBG_P(1, "Loading z80 memory... \n");
 
 int main(void)
 {
-	//uint32_t led_state = LED_BLUE_PIN;
-	//uint32_t rc;
-	//uint8_t startval = 0;
-	//int count;
-	int state = 0;
+	int_fast8_t state = 0;
 	int ch;
 
 	clock_setup();
@@ -704,7 +699,7 @@ int main(void)
 	
 	z80_memset(0, 0x76, 0x80000);
 	//z80_sram_fill(0, 512 * 1024, 0x76, 0);
-	z80_sram_cmp(0, 512 * 1024, 0x76, 0);
+	z80_sram_cmp(0, (uint32_t)512 * 1024, 0x76, 0);
 	
 	z80_load_mem();
 	z80_reset(LOW);
diff --git a/stm32/z80-if.c b/stm32/z80-if.c
index 409c32a..171fea9 100644
--- a/stm32/z80-if.c
+++ b/stm32/z80-if.c
@@ -1,3 +1,62 @@
+/**
+ *
+ * Pin assignments
+ *
+ * | Z180-Sig 	|  STM32-Port	|Buffer	|  Dir	|   Special Function	|
+ * +------------+---------------+-------+-------+-----------------------+
+ * |	A0	| A 	1	|   P	|  O	|			|
+ * |	A1	| A 	2	|   P	|  O	|			|
+ * |	A2	| A 	3	|   P	|  O	|			|
+ * |	A3	| A 	4	|   P	|  O	|			|
+ * |	A4	| A 	5	|   P	|  O	|			|
+ * |	A5	| A 	6	|   P	|  O	|			|
+ * |	A6	| A 	7	|   P	|  O	|			|
+ * |	A7	| A 	8	|   	|  O	|			|
+ * |	A8	| C 	0	|   P	|  O	|			|
+ * |	A9	| C 	1	|   P	|  O	|			|
+ * |	A10	| C 	2	|   P	|  O	|			|
+ * |	A11	| C 	3	|   P	|  O	|			|
+ * |	A12	| C 	4	|   P	|  O	|			|
+ * |	A13	| C 	5	|   P	|  O	|			|
+ * |	A14	| C 	6	|   	|  O	|			|
+ * |	A15	| C 	7	|   	|  O	|			|
+ * |	A16	| C 	10	|   	|  O	|			|
+ * |	A17	| C 	11	|   	|  O	|			|
+ * |	A18	| C 	12	|   	|  O	|			|
+ * |	D0	| B 	8	|   	|  I/O	|			|
+ * |	D1	| B 	9	|   	|  I/O	|			|
+ * |	D2	| B 	10	|   	|  I/O	|			|
+ * |	D3	| B 	11	|   	|  I/O	|			|
+ * |	D4	| B 	12	|   	|  I/O	|			|
+ * |	D5	| B 	13	|   	|  I/O	|			|
+ * |	D6	| B 	14	|   	|  I/O	|			|
+ * |	D7	| B 	15	|   	|  I/O	|			|
+ * |	ME	| C 	13	|   P	|  O	|			|
+ * |	RD	| B 	0	|   P	|  O	|			|
+ * |	WR	| B 	1	|   P	|  O	|			|
+ * |	BUSREQ	| D 	2	|	|  O	|			|
+ * |	IOCS1	| A 	11	|	|  I	|  TIM1_CH4		|
+ * |	BUSACK	| A 	12	|	|  I	|  			|
+ * |	HALT	| A 	12	|	|  I	|  			|
+ * |	NMI	| B 	7	|	|  O	|  			|
+ * |	RST	| B 	6	|	|  O	|  TIM16_CH1N		|
+ * |		|   	  	|	|   	|  			|
+ * |		| A 	9	|	|   	|  af1	 USART1_TX	|
+ * |		| A 	10	|	|   	|  af1	 USART1_RX	|
+ * |		| A 	15	|	| JTDI	|  remap SPI1_NSS'	|
+ * |		| B 	3	|	| JTDO	|  remap SPI1_SCK'	|
+ * |		| B 	4	|	|NJTRST	|  remap SPI1_MISO'	|
+ * |		| B 	5	|	| 	|  remap SPI1_MOSI'	|
+ * |		| C 	14	|	| 	|  af1	 OSC32		|
+ * |		| C 	15	|	| 	|  af1	 OSC32		|
+
+
+AFIO_MAPR2 =
+AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON  (frees
+AFIO_MAPR_SPI1_REMAP
+
+ */
+
 /**
  *
  * Pin assignments
-- 
cgit v1.2.3