page	200

	extrn	ioiniml

	global	as0init
	global	as0ista,as0inp
	global	as0osta,as0out
	global	as1init
	global	as1ista,as1inp
	global	as1osta,as1out

	include config.inc
	include	z180reg.inc


;-----------------------------------------------------
;
;
; TC = (f PHI /(2*baudrate*Clock_mode)) - 2
;
; TC = (f PHI / (32 * baudrate)) - 2
;

	cseg
;
; Init Serial I/O for console input and output (ASCI1)
;
	


as0init:
	ld	hl,initab0
	jp	ioiniml

as1init:
	ld	hl,initab1
	jp	ioiniml

		
	ld	a,M_MPBT 
	out0	(cntlb1),a
	ld	a,M_RE + M_TE + M_MOD2	;Rx/Tx enable 
	out0	(cntla1),a
	ld	a,M_RIE
	out0	(stat1),a	;Enable rx interrupts

	ret			;


initab0:
	db	1,stat0,0		;Disable rx/tx interrupts
					;Enable baud rate generator
	db	1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS
	db	2,astc0l,low 28, high 28
	db	1,cntlb0,M_MPBT		;No MP Mode, X16
	db	1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1
	db	0

initab1:
	db	1,stat1,0		;Disable rx/tx ints, disable CTS1
	db	1,asext1,M_BRGMOD	;Enable baud rate generator
	db	2,astc1l,low 3, high 3
	db	1,cntlb1,M_MPBT		;No MP Mode, X16
	db	1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1
	db	0



as0ista:
	in0	a,(stat0)
	and	M_RDRF
	ret	z
	or	0ffh
	ret
	
as1ista:
	in0	a,(stat1)
	and	M_RDRF
	ret	z
	or	0ffh
	ret
	

as0inp:
	in0	a,(stat0)
	rlca
	jr	nc,as0inp
	in0	a,rdr0
	ret

as1inp:
	in0	a,(stat1)
	rlca
	jr	nc,as1inp
	in0	a,rdr1
	ret



as0osta:
	in0	a,(stat0)
	and	M_TDRE
	ret	z
	or	0ffh
	ret

as1osta:
	in0	a,(stat1)
	and	M_TDRE
	ret	z
	or	0ffh
	ret


as0out:
	in0	a,(stat0)
	and	M_TDRE
	jr	z,as0out
	out0	(tdr0),c
	ld	a,c
	ret

as1out:
	in0	a,(stat1)
	and	M_TDRE
	jr	z,as1out
	out0	(tdr1),c
	ld	a,c
	ret

	end