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Remove unsupported experimental ADC support
[avrcpm.git] / avr / 8080int-orig.asm
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9c15f366
L		 1; Z80 Interpreter.
2; This is part of the Z80-CP/M emulator written by Sprite_tm.
3; The Z80-specific instructions themselves actually aren't
4; implemented yet, making this more of an i8080 emulator.
5
fdcfcd44 6; Copyright (C) 2010 Sprite_tm
9c15f366
L		 7; Copyright (C) 2010 Leo C.
8
9; This file is part of avrcpm.
fdcfcd44 10;
9c15f366
L		 11; avrcpm is free software: you can redistribute it and/or modify it
12; under the terms of the GNU General Public License as published by
fdcfcd44
L		 13; the Free Software Foundation, either version 3 of the License, or
14; (at your option) any later version.
15;
9c15f366 16; avrcpm is distributed in the hope that it will be useful,
fdcfcd44
L		 17; but WITHOUT ANY WARRANTY; without even the implied warranty of
18; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19; GNU General Public License for more details.
20;
21; You should have received a copy of the GNU General Public License
9c15f366 22; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
78700514
L		 23;
24; $Id$
25;
fdcfcd44 26
9c15f366 27 .dseg
66faee4c 28
9c15f366
L		 29z_b: .byte 1
30z_c: .byte 1
31z_d: .byte 1
32z_e: .byte 1
33z_h: .byte 1
34z_l: .byte 1
fdcfcd44 35
9c15f366 36 .cseg
fdcfcd44
L		 37
38;Init z80
9c15f366
L		 39z80_init:
40 ldi z_pcl,low (IPLADDR)
41 ldi z_pch,high(IPLADDR)
fdcfcd44 42
db568140 43 cbi flags,trace
9c15f366
L		 44 printnewline
45 printstring "Ok, CPU is live!"
46 printnewline
fdcfcd44
L		 47
48main:
9c15f366 49.if INS_DEBUG
db568140 50 cbi flags,trace
9c15f366 51 cpi z_pch,DBG_TRACE_BOTTOM
fdcfcd44 52 brlo notraceon
9c15f366 53 cpi z_pch,DBG_TRACE_TOP
fdcfcd44 54 brsh notraceon
db568140 55 sbi flags,trace
fdcfcd44 56notraceon:
9c15f366 57.endif
fdcfcd44 58
fdcfcd44 59.if PRINT_PC
9c15f366 60 cpi z_pch,DBG_TRACE_BOTTOM
fdcfcd44 61 brlo noprintpc
9c15f366 62 cpi z_pch,DBG_TRACE_TOP
fdcfcd44
L		 63 brsh noprintpc
64
9c15f366
L		 65 printnewline
66 printstring "PC="
846ffdc9
L		 67 movw temp,z_pcl
68 rcall printhexw
9c15f366 69 printstring " "
fdcfcd44
L		 70noprintpc:
71.endif
72
73 ; *** Stage 1: Fetch next opcode
9c15f366 74 mem_read_s z_pc
fdcfcd44
L		 75
76
77.if INS_DEBUG
db568140
L		 78 sbis flags,trace
79 rjmp notrace1
9c15f366
L		 80 printnewline
81 printstring "PC="
fdcfcd44 82 push temp
846ffdc9
L		 83 movw temp,z_pcl
84 rcall printhexw
fdcfcd44 85 pop temp
9c15f366 86 printstring ", opcode="
fdcfcd44
L		 87 rcall printhex
88notrace1:
89.endif
8a4df3af 90 adiw z_pcl,1
fdcfcd44
L		 91
92 ; *** Stage 2: Decode it using the ins_table.
fdcfcd44 93 ldi zh,high(inst_table*2)
99ed7199 94 mov zl,temp
fdcfcd44 95 add zl,temp
99ed7199 96 adc zh,_0
fdcfcd44
L		 97 lpm insdecl,Z+
98 lpm insdech,Z
99
100.if INS_DEBUG
db568140
L		 101 sbis flags,trace
102 rjmp notrace2
9c15f366
L		 103 printstring ", decoded="
104 movw temp,insdecl
105 rcall printhexw
fdcfcd44
L		 106notrace2:
107.endif
108
109 ; *** Stage 3: Fetch operand. Use the fetch jumptable for this.
110 mov temp,insdecl
111 andi temp,0x1F
fdcfcd44 112 breq nofetch
99ed7199
L		 113 ldi zl,low(fetchjumps)
114 ldi zh,high(fetchjumps)
fdcfcd44 115 add zl,temp
99ed7199 116 adc zh,_0
fdcfcd44
L		 117 icall
118
119.if INS_DEBUG
db568140
L		 120 sbis flags,trace
121 rjmp notrace3
9c15f366
L		 122 printstring " pre: op="
123 movw temp,opl
124 rcall printhexw
fdcfcd44 125notrace3:
9c15f366 126 rjmp nonofetch
fdcfcd44
L		 127.endif
128
129nofetch:
9c15f366
L		 130.if INS_DEBUG
131 sbis flags,trace
132 rjmp nonofetch
133 printstring " "
134
135nonofetch:
136.endif
fdcfcd44
L		 137 ; *** Stage 4: Execute operation :) Use the op jumptable for this.
138 mov temp,insdech
139 andi temp,0xFC
fdcfcd44 140 breq nooper
99ed7199
L		 141 lsr temp
142 lsr temp
143 ldi zl,low(opjumps)
144 ldi zh,high(opjumps)
fdcfcd44 145 add zl,temp
99ed7199 146 adc zh,_0
fdcfcd44
L		 147 icall
148
149.if INS_DEBUG
db568140
L		 150 sbis flags,trace
151 rjmp notrace4
9c15f366
L		 152 printstring " post: op="
153 movw temp,opl
154 rcall printhexw
fdcfcd44 155notrace4:
9c15f366 156 rjmp nonooper
fdcfcd44
L		 157.endif
158
159nooper:
9c15f366
L		 160.if INS_DEBUG
161 sbis flags,trace
162 rjmp nonooper
163 printstring " "
164
165nonooper:
166.endif
fdcfcd44
L		 167 ; *** Stage 5: Store operand. Use the store jumptable for this.
168 swap insdecl
169 swap insdech
db568140 170 movw temp,insdecl
fdcfcd44 171 andi temp,0x0E
db568140
L		 172 andi temp2,0x30
173 or temp,temp2
fdcfcd44 174 breq nostore
99ed7199
L		 175 lsr temp
176 ldi zl,low(storejumps)
177 ldi zh,high(storejumps)
fdcfcd44 178 add zl,temp
99ed7199 179 adc zh,_0
fdcfcd44
L		 180 icall
181
182.if INS_DEBUG
db568140
L		 183 sbis flags,trace
184 rjmp notrace5
9c15f366 185 printstring " stored "
fdcfcd44
L		 186notrace5:
187.endif
188
189nostore:
fdcfcd44
L		 190 ;All done. Neeeext!
191 rjmp main
192
37617bd8 193; --------------------------------------------------------------
fdcfcd44 194
fdcfcd44
L		 195; ------------ Fetch phase stuff -----------------
196
197.equ FETCH_NOP = (0<<0)
198.equ FETCH_A = (1<<0)
199.equ FETCH_B = (2<<0)
200.equ FETCH_C = (3<<0)
201.equ FETCH_D = (4<<0)
202.equ FETCH_E = (5<<0)
203.equ FETCH_H = (6<<0)
204.equ FETCH_L = (7<<0)
205.equ FETCH_AF = (8<<0)
206.equ FETCH_BC = (9<<0)
207.equ FETCH_DE = (10<<0)
208.equ FETCH_HL = (11<<0)
209.equ FETCH_SP = (12<<0)
210.equ FETCH_MBC = (13<<0)
211.equ FETCH_MDE = (14<<0)
212.equ FETCH_MHL = (15<<0)
213.equ FETCH_MSP = (16<<0)
214.equ FETCH_DIR8 = (17<<0)
215.equ FETCH_DIR16= (18<<0)
216.equ FETCH_RST = (19<<0)
217
218
219;Jump table for fetch routines. Make sure to keep this in sync with the .equs!
220fetchjumps:
99ed7199
L		 221 rjmp do_fetch_nop
222 rjmp do_fetch_a
223 rjmp do_fetch_b
224 rjmp do_fetch_c
225 rjmp do_fetch_d
226 rjmp do_fetch_e
227 rjmp do_fetch_h
228 rjmp do_fetch_l
229 rjmp do_fetch_af
230 rjmp do_fetch_bc
231 rjmp do_fetch_de
232 rjmp do_fetch_hl
233 rjmp do_fetch_sp
234 rjmp do_fetch_mbc
235 rjmp do_fetch_mde
236 rjmp do_fetch_mhl
237 rjmp do_fetch_msp
238 rjmp do_fetch_dir8
239 rjmp do_fetch_dir16
240 rjmp do_fetch_rst
fdcfcd44
L		 241
242do_fetch_nop:
243 ret
244
245do_fetch_a:
246 mov opl,z_a
247 ret
248
249do_fetch_b:
9c15f366 250 lds opl,z_b
fdcfcd44
L		 251 ret
252
253do_fetch_c:
9c15f366 254 lds opl,z_c
fdcfcd44
L		 255 ret
256
257do_fetch_d:
9c15f366 258 lds opl,z_d
fdcfcd44
L		 259 ret
260
261do_fetch_e:
9c15f366 262 lds opl,z_e
fdcfcd44
L		 263 ret
264
265do_fetch_h:
9c15f366 266 lds opl,z_h
fdcfcd44
L		 267 ret
268
269do_fetch_l:
9c15f366 270 lds opl,z_l
fdcfcd44
L		 271 ret
272
273do_fetch_af:
274 mov opl,z_flags
275 mov oph,z_a
fdcfcd44
L		 276 ret
277
278do_fetch_bc:
9c15f366
L		 279 lds opl,z_c
280 lds oph,z_b
fdcfcd44
L		 281 ret
282
283do_fetch_de:
9c15f366
L		 284 lds opl,z_e
285 lds oph,z_d
fdcfcd44
L		 286 ret
287
288do_fetch_hl:
9c15f366
L		 289 lds opl,z_l
290 lds oph,z_h
fdcfcd44
L		 291 ret
292
293do_fetch_sp:
99ed7199 294 movw opl,z_spl
fdcfcd44
L		 295 ret
296
297do_fetch_mbc:
9c15f366
L		 298 lds xh,z_b
299 lds xl,z_c
f1deeee3 300 mem_read_d z_a
fdcfcd44
L		 301 ret
302
303do_fetch_mde:
9c15f366
L		 304 lds xh,z_d
305 lds xl,z_e
f1deeee3 306 mem_read_d z_a
fdcfcd44
L		 307 ret
308
309do_fetch_mhl:
9c15f366
L		 310 lds xh,z_h
311 lds xl,z_l
312 mem_read_d opl
fdcfcd44
L		 313 ret
314
315do_fetch_msp:
9c15f366
L		 316 movw x,z_spl
317 mem_read_d opl
318 adiw x,1
319 mem_read_d oph
fdcfcd44
L		 320 ret
321
322do_fetch_dir8:
9c15f366 323 mem_read_ds opl, z_pc
fdcfcd44 324 adiw z_pcl,1
fdcfcd44
L		 325 ret
326
327do_fetch_dir16:
9c15f366
L		 328 mem_read_ds opl, z_pc
329 adiw z_pcl,1
330 mem_read_ds oph, z_pc
331 adiw z_pcl,1
fdcfcd44
L		 332 ret
333
334do_fetch_rst:
9c15f366
L		 335 movw x,z_pcl
336 sbiw x,1
337 mem_read_d opl
338 andi opl,0x38
fdcfcd44 339 ldi oph,0
fdcfcd44 340 ret
4bd49b80 341
fdcfcd44
L		 342; ------------ Store phase stuff -----------------
343
344.equ STORE_NOP = (0<<5)
345.equ STORE_A = (1<<5)
346.equ STORE_B = (2<<5)
347.equ STORE_C = (3<<5)
348.equ STORE_D = (4<<5)
349.equ STORE_E = (5<<5)
350.equ STORE_H = (6<<5)
351.equ STORE_L = (7<<5)
352.equ STORE_AF = (8<<5)
353.equ STORE_BC = (9<<5)
354.equ STORE_DE = (10<<5)
355.equ STORE_HL = (11<<5)
356.equ STORE_SP = (12<<5)
357.equ STORE_PC = (13<<5)
358.equ STORE_MBC = (14<<5)
359.equ STORE_MDE = (15<<5)
360.equ STORE_MHL = (16<<5)
361.equ STORE_MSP = (17<<5)
362.equ STORE_RET = (18<<5)
363.equ STORE_CALL = (19<<5)
364.equ STORE_AM = (20<<5)
365
366;Jump table for store routines. Make sure to keep this in sync with the .equs!
367storejumps:
99ed7199
L		 368 rjmp do_store_nop
369 rjmp do_store_a
370 rjmp do_store_b
371 rjmp do_store_c
372 rjmp do_store_d
373 rjmp do_store_e
374 rjmp do_store_h
375 rjmp do_store_l
376 rjmp do_store_af
377 rjmp do_store_bc
378 rjmp do_store_de
379 rjmp do_store_hl
380 rjmp do_store_sp
381 rjmp do_store_pc
382 rjmp do_store_mbc
383 rjmp do_store_mde
384 rjmp do_store_mhl
385 rjmp do_store_msp
386 rjmp do_store_ret
387 rjmp do_store_call
388 rjmp do_store_am
fdcfcd44
L		 389
390
391do_store_nop:
392 ret
393
394do_store_a:
395 mov z_a,opl
396 ret
397
398do_store_b:
9c15f366 399 sts z_b,opl
fdcfcd44
L		 400 ret
401
402do_store_c:
9c15f366 403 sts z_c,opl
fdcfcd44
L		 404 ret
405
406do_store_d:
9c15f366 407 sts z_d,opl
fdcfcd44
L		 408 ret
409
410do_store_e:
9c15f366 411 sts z_e,opl
fdcfcd44
L		 412 ret
413
414do_store_h:
9c15f366 415 sts z_h,opl
fdcfcd44
L		 416 ret
417
418do_store_l:
9c15f366 419 sts z_l,opl
fdcfcd44
L		 420 ret
421
422do_store_af:
423 mov z_a,oph
424 mov z_flags,opl
fdcfcd44
L		 425 ret
426
427do_store_bc:
9c15f366
L		 428 sts z_b,oph
429 sts z_c,opl
fdcfcd44
L		 430 ret
431
432do_store_de:
9c15f366
L		 433 sts z_d,oph
434 sts z_e,opl
fdcfcd44
L		 435 ret
436
437do_store_hl:
9c15f366
L		 438 sts z_h,oph
439 sts z_l,opl
fdcfcd44
L		 440 ret
441
442do_store_mbc:
9c15f366
L		 443 lds xh,z_b
444 lds xl,z_c
f1deeee3 445 mem_write_s z_a
fdcfcd44
L		 446 ret
447
448do_store_mde:
9c15f366
L		 449 lds xh,z_d
450 lds xl,z_e
f1deeee3 451 mem_write_s z_a
fdcfcd44
L		 452 ret
453
454do_store_mhl:
9c15f366
L		 455 lds xh,z_h
456 lds xl,z_l
457 mem_write_s opl
fdcfcd44
L		 458 ret
459
460do_store_msp:
9c15f366
L		 461 movw xl,z_spl
462 mem_write_s opl
78700514 463 adiw xl,1
9c15f366 464 mem_write_s oph
fdcfcd44
L		 465 ret
466
467do_store_sp:
99ed7199 468 movw z_spl,opl
fdcfcd44
L		 469 ret
470
471do_store_pc:
99ed7199 472 movw z_pcl,opl
fdcfcd44
L		 473 ret
474
475do_store_ret:
9c15f366
L		 476 movw x,z_spl
477 mem_read_d z_pcl
478 adiw x,1
479 mem_read_d z_pch
480 adiw x,1
481 movw z_spl,x
482
483.if STACK_DBG
484 printnewline
485 printstring "Stack pop "
486 movw temp,z_pcl
487 rcall printhexw
488 printstring ", SP is now "
489 movw temp,z_spl
490 rcall printhexw
491 printstring ". "
492.endif
fdcfcd44
L		 493 ret
494
495do_store_call:
9c15f366
L		 496 movw xl,z_spl
497 sbiw x,1
498 mem_write_s z_pch
499 sbiw x,1
500 mem_write_s z_pcl
501 movw z_spl,xl
502
503.if STACK_DBG
504 printnewline
505 printstring "Stack push "
506 movw temp,z_pcl
507 rcall printhexw
508 printstring ", SP is now "
509 movw temp,z_spl
510 rcall printhexw
511 printstring ". "
512.endif
513 movw z_pcl,opl
fdcfcd44
L		 514 ret
515
9c15f366 516
fdcfcd44 517do_store_am:
9c15f366 518 mem_write_ds op, z_a
fdcfcd44
L		 519 ret
520
521
522; ------------ Operation phase stuff -----------------
523
524
f1deeee3
L		 525.equ OP_NOP = (0<<10)
526.equ OP_INC = (1<<10)
527.equ OP_DEC = (2<<10)
fdcfcd44
L		 528.equ OP_INC16 = (3<<10)
529.equ OP_DEC16 = (4<<10)
f1deeee3
L		 530.equ OP_RLCA = (5<<10)
531.equ OP_RRCA = (6<<10)
532.equ OP_RRA = (7<<10)
533.equ OP_RLA = (8<<10)
fdcfcd44
L		 534.equ OP_ADDA = (9<<10)
535.equ OP_ADCA = (10<<10)
536.equ OP_SUBFA = (11<<10)
537.equ OP_SBCFA = (12<<10)
538.equ OP_ANDA = (13<<10)
f1deeee3 539.equ OP_ORA = (14<<10)
fdcfcd44
L		 540.equ OP_XORA = (15<<10)
541.equ OP_ADDHL = (16<<10)
542.equ OP_STHL = (17<<10) ;store HL in fetched address
543.equ OP_RMEM16 = (18<<10) ;read mem at fetched address
544.equ OP_RMEM8 = (19<<10) ;read mem at fetched address
f1deeee3
L		 545.equ OP_DA = (20<<10)
546.equ OP_SCF = (21<<10)
547.equ OP_CPL = (22<<10)
548.equ OP_CCF = (23<<10)
fdcfcd44
L		 549.equ OP_POP16 = (24<<10)
550.equ OP_PUSH16 = (25<<10)
551.equ OP_IFNZ = (26<<10)
f1deeee3 552.equ OP_IFZ = (27<<10)
fdcfcd44
L		 553.equ OP_IFNC = (28<<10)
554.equ OP_IFC = (29<<10)
555.equ OP_IFPO = (30<<10)
556.equ OP_IFPE = (31<<10)
557.equ OP_IFP = (32<<10)
558.equ OP_IFM = (33<<10)
559.equ OP_OUTA = (34<<10)
560.equ OP_IN = (35<<10)
561.equ OP_EXHL = (36<<10)
562.equ OP_DI = (37<<10)
563.equ OP_EI = (38<<10)
564.equ OP_INV = (39<<10)
1a1d6a78 565.equ OP_CPFA = (40<<10)
d305f8e4
L		 566.equ OP_INCA = (41<<10)
567.equ OP_DECA = (42<<10)
fdcfcd44
L		 568
569opjumps:
99ed7199
L		 570 rjmp do_op_nop
571 rjmp do_op_inc
572 rjmp do_op_dec
573 rjmp do_op_inc16
574 rjmp do_op_dec16
f1deeee3
L		 575 rjmp do_op_rlca
576 rjmp do_op_rrca
577 rjmp do_op_rra
578 rjmp do_op_rla
99ed7199
L		 579 rjmp do_op_adda
580 rjmp do_op_adca
581 rjmp do_op_subfa
582 rjmp do_op_sbcfa
583 rjmp do_op_anda
584 rjmp do_op_ora
585 rjmp do_op_xora
586 rjmp do_op_addhl
587 rjmp do_op_sthl
588 rjmp do_op_rmem16
589 rjmp do_op_rmem8
590 rjmp do_op_da
591 rjmp do_op_scf
592 rjmp do_op_cpl
593 rjmp do_op_ccf
594 rjmp do_op_pop16
595 rjmp do_op_push16
596 rjmp do_op_ifnz
597 rjmp do_op_ifz
598 rjmp do_op_ifnc
599 rjmp do_op_ifc
600 rjmp do_op_ifpo
601 rjmp do_op_ifpe
602 rjmp do_op_ifp
603 rjmp do_op_ifm
604 rjmp do_op_outa
605 rjmp do_op_in
606 rjmp do_op_exhl
607 rjmp do_op_di
608 rjmp do_op_ei
609 rjmp do_op_inv
1a1d6a78 610 rjmp do_op_cpfa
d305f8e4
L		 611 rjmp do_op_inca
612 rjmp do_op_deca
fdcfcd44
L		 613
614
3c3744f1
L		 615;----------------------------------------------------------------
616;| |
617;| Zilog |
618;| |
619;| ZZZZZZZ 88888 000 |
620;| Z 8 8 0 0 |
621;| Z 8 8 0 0 0 |
622;| Z 88888 0 0 0 |
623;| Z 8 8 0 0 0 |
624;| Z 8 8 0 0 |
625;| ZZZZZZZ 88888 000 |
626;| |
627;| Z80 MICROPROCESSOR Instruction Set Summary |
628;| |
629;----------------------------------------------------------------
630;----------------------------------------------------------------
631;|Mnemonic |SZHPNC|Description |Notes |
632;|----------+------+---------------------+----------------------|
633;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
634;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
635;|ADD A,s |***V0*|Add |A=A+s |
636;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
637;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
638;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
37617bd8 639;|AND s |**1P00|Logical AND |A=A&s |
3c3744f1
L		 640;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
641;|CALL cc,nn|------|Conditional Call |If cc CALL |
642;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
643;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
644;|CP s |***V1*|Compare |A-s |
645;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
646;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
647;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
648;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
649;|CPL |--1-1-|Complement |A=~A |
650;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
651;|DEC s |***V1-|Decrement |s=s-1 |
652;|DEC xx |------|Decrement |xx=xx-1 |
653;|DEC ss |------|Decrement |ss=ss-1 |
654;|DI |------|Disable Interrupts | |
655;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
656;|EI |------|Enable Interrupts | |
657;|EX [SP],HL|------|Exchange |[SP]<->HL |
658;|EX [SP],xx|------|Exchange |[SP]<->xx |
659;|EX AF,AF' |------|Exchange |AF<->AF' |
660;|EX DE,HL |------|Exchange |DE<->HL |
661;|EXX |------|Exchange |qq<->qq' (except AF)|
662;|HALT |------|Halt | |
663;|IM n |------|Interrupt Mode | (n=0,1,2)|
664;|IN A,[n] |------|Input |A=[n] |
665;|IN r,[C] |***P0-|Input |r=[C] |
666;|INC r |***V0-|Increment |r=r+1 |
667;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
668;|INC xx |------|Increment |xx=xx+1 |
669;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
670;|INC ss |------|Increment |ss=ss+1 |
671;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
672;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
673;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
674;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
675;|JP [HL] |------|Unconditional Jump |PC=[HL] |
676;|JP [xx] |------|Unconditional Jump |PC=[xx] |
677;|JP nn |------|Unconditional Jump |PC=nn |
678;|JP cc,nn |------|Conditional Jump |If cc JP |
679;|JR e |------|Unconditional Jump |PC=PC+e |
680;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
681;|LD dst,src|------|Load |dst=src |
682;|LD A,i |**0*0-|Load |A=i (i=I,R)|
683;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
684;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
685;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
686;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
687;|NEG |***V1*|Negate |A=-A |
688;|NOP |------|No Operation | |
37617bd8 689;|OR s |**0P00|Logical inclusive OR |A=Avs |
3c3744f1
L		 690;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
691;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
692;|OUT [C],r |------|Output |[C]=r |
693;|OUT [n],A |------|Output |[n]=A |
694;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
695;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
696;|POP xx |------|Pop |xx=[SP]+ |
697;|POP qq |------|Pop |qq=[SP]+ |
698;|PUSH xx |------|Push |-[SP]=xx |
699;|PUSH qq |------|Push |-[SP]=qq |
700;|RES b,m |------|Reset bit |m=m&{~2^b} |
701;|RET |------|Return |PC=[SP]+ |
702;|RET cc |------|Conditional Return |If cc RET |
703;|RETI |------|Return from Interrupt|PC=[SP]+ |
704;|RETN |------|Return from NMI |PC=[SP]+ |
705;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
706;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
707;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
708;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
3c3744f1
L		 709;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
710;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
711;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
712;|RRC m |**0P0*|Rotate Right Circular|m=->m |
713;|RRCA |--0-0*|Rotate Right Circular|A=->A |
714;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
715;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
716;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
717;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
718;|SCF |--0-01|Set Carry Flag |CY=1 |
719;|SET b,m |------|Set bit |m=mv{2^b} |
720;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
721;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
722;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
723;|SUB s |***V1*|Subtract |A=A-s |
37617bd8 724;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
3c3744f1 725;|----------+------+--------------------------------------------|
99ed7199
L		 726;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
727;| S |S |Sign flag (Bit 7) |
728;| Z | Z |Zero flag (Bit 6) |
729;| HC | H |Half Carry flag (Bit 4) |
730;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
731;| N | N |Add/Subtract flag (Bit 1) |
732;| CY | C|Carry flag (Bit 0) |
733;|-----------------+--------------------------------------------|
734;| n |Immediate addressing |
735;| nn |Immediate extended addressing |
736;| e |Relative addressing (PC=PC+2+offset) |
737;| [nn] |Extended addressing |
738;| [xx+d] |Indexed addressing |
739;| r |Register addressing |
740;| [rr] |Register indirect addressing |
741;| |Implied addressing |
742;| b |Bit addressing |
743;| p |Modified page zero addressing (see RST) |
744;|-----------------+--------------------------------------------|
745;|DEFB n(,...) |Define Byte(s) |
746;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
747;|DEFS nn |Define Storage Block |
748;|DEFW nn(,...) |Define Word(s) |
749;|-----------------+--------------------------------------------|
750;| A B C D E |Registers (8-bit) |
751;| AF BC DE HL |Register pairs (16-bit) |
752;| F |Flag register (8-bit) |
753;| I |Interrupt page address register (8-bit) |
754;| IX IY |Index registers (16-bit) |
755;| PC |Program Counter register (16-bit) |
756;| R |Memory Refresh register |
757;| SP |Stack Pointer register (16-bit) |
758;|-----------------+--------------------------------------------|
759;| b |One bit (0 to 7) |
760;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
761;| d |One-byte expression (-128 to +127) |
762;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
763;| e |One-byte expression (-126 to +129) |
764;| m |Any register r, [HL] or [xx+d] |
765;| n |One-byte expression (0 to 255) |
766;| nn |Two-byte expression (0 to 65535) |
767;| pp |Register pair BC, DE, IX or SP |
768;| qq |Register pair AF, BC, DE or HL |
769;| qq' |Alternative register pair AF, BC, DE or HL |
770;| r |Register A, B, C, D, E, H or L |
771;| rr |Register pair BC, DE, IY or SP |
772;| s |Any register r, value n, [HL] or [xx+d] |
773;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
774;| ss |Register pair BC, DE, HL or SP |
775;| xx |Index register IX or IY |
776;|-----------------+--------------------------------------------|
777;| + - * / ^ |Add/subtract/multiply/divide/exponent |
778;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
779;| <- -> |Rotate left/right |
780;| [ ] |Indirect addressing |
781;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
782;| { } |Combination of operands |
783;| # |Also BC=BC-1,DE=DE-1 |
784;| ## |Only lower 4 bits of accumulator A used |
785;----------------------------------------------------------------
fdcfcd44 786
9c15f366
L		 787;How the flags are supposed to work:
788;7 ZFL_S - Sign flag (=MSBit of result)
789;6 ZFL_Z - Zero flag. Is 1 when the result is 0
790;4 ZFL_H - Half-carry (carry from bit 3 to 4)
791;2 ZFL_P - Parity/2-complement Overflow
792;1 ZFL_N - Subtract - set if last op was a subtract
793;0 ZFL_C - Carry
794;
795;I sure hope I got the mapping between flags and instructions correct...
796
797.equ ZFL_S = 7
798.equ ZFL_Z = 6
799.equ ZFL_H = 4
800.equ ZFL_P = 2
801.equ ZFL_N = 1
802.equ ZFL_C = 0
37617bd8 803
78700514
L		 804.equ AVR_T = SREG_T
805.equ AVR_H = SREG_H
806.equ AVR_S = SREG_S
807.equ AVR_V = SREG_V
808.equ AVR_N = SREG_N
809.equ AVR_Z = SREG_Z
810.equ AVR_C = SREG_C
fdcfcd44 811
37617bd8
L		 812;------------------------------------------------;
813; Load table value from flash indexed by source reg.
814;
815; ldpmx dstreg,tablebase,indexreg
816;
817; (6 words, 8 cycles)
818
819.macro ldpmx
99ed7199 820 ldi zh,high(@1*2) ; table must be page aligned
4bd49b80
L		 821 mov zl,@2
822 lpm @0,z
37617bd8 823.endm
9c15f366 824
f1deeee3 825.macro do_z80_flags_V
37617bd8
L		 826#if EM_Z80
827 bmov z_flags, ZFL_P, temp, AVR_V
37617bd8
L		 828#endif
829.endm
830
831.macro do_z80_flags_set_N
832#if EM_Z80
833 ori z_flags, (1<<ZFL_N) ; Negation auf 1
834#endif
835.endm
836
837.macro do_z80_flags_set_HN
838#if EM_Z80
839 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
840#endif
841.endm
842
843.macro do_z80_flags_clear_N
844#if EM_Z80
845 andi z_flags,~(1<<ZFL_N)
846#endif
847.endm
848
f1deeee3
L		 849.macro do_z80_flags_clear_HN
850#if EM_Z80
851 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
852#endif
853.endm
854
4bd49b80 855
f1deeee3
L		 856.macro do_z80_flags_copy_HC
857#if EM_Z80
858 bmov z_flags, ZFL_H, z_flags, ZFL_H
859#endif
860.endm
861
37617bd8
L		 862.macro do_z80_flags_op_rotate
863 ; must not change avr carry flag!
864#if EM_Z80
865 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
866#else
867 andi z_flags, ~( (1<<ZFL_C) )
868#endif
869.endm
870
871.macro do_z80_flags_op_and
872#if EM_Z80
873 ori z_flags,(1<<ZFL_H)
37617bd8
L		 874#endif
875.endm
876
877.macro do_z80_flags_op_or
878#if EM_Z80
f1deeee3 879 ;nothing to do
37617bd8
L		 880#endif
881.endm
882
883
9c15f366 884;----------------------------------------------------------------
f1deeee3 885
9c15f366 886do_op_inv:
f1deeee3
L		 887 sbiw z_pcl,1
888 lcall printregs
889 printstring "Invalid opcode! "
890
9c15f366
L		 891haltinv:
892 rjmp haltinv
4bd49b80 893
fdcfcd44
L		 894do_op_nop:
895 ret
896
9c15f366
L		 897;----------------------------------------------------------------
898;|Mnemonic |SZHPNC|Description |Notes |
899;----------------------------------------------------------------
900;|OUT [n],A |------|Output |[n]=A |
901;
902;
903;Interface with peripherials goes here :)
904do_op_outa: ; out (opl),a
905.if PORT_DEBUG
906 printnewline
907 printstring "Port write: "
908 mov temp,z_a
909 rcall printhex
910 printstring " -> ("
911 mov temp,opl
912 rcall printhex
913 printstring ") "
914.endif
915 mov temp,z_a
916 mov temp2,opl
f1deeee3 917 lcall portWrite
9c15f366
L		 918 ret
919
920;----------------------------------------------------------------
921;|Mnemonic |SZHPNC|Description |Notes |
922;----------------------------------------------------------------
923;|IN A,[n] |------|Input |A=[n] |
924;
925;
926do_op_in: ; in a,(opl)
927.if PORT_DEBUG
928 printnewline
929 printstring "Port read: ("
930 mov temp,opl
931 rcall printhex
932 printstring ") -> "
933.endif
934
935 mov temp2,opl
f1deeee3 936 lcall portRead
9c15f366
L		 937 mov opl,temp
938
939.if PORT_DEBUG
940 rcall printhex
941 printstring " "
942.endif
943 ret
944
3c3744f1
L		 945;----------------------------------------------------------------
946;|Mnemonic |SZHPNC|Description |Notes |
947;----------------------------------------------------------------
948;|INC r |***V0-|Increment |r=r+1 |
949;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
950;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
37617bd8
L		 951;|----------|SZHP C|---------- 8080 ----------------------------|
952;|INC r |**-P0-|Increment |r=r+1 |
953;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
3c3744f1 954;
4bd49b80 955;
fdcfcd44 956do_op_inc:
f1deeee3
L		 957 ldi temp,1
958 add opl,temp
37617bd8 959 in temp, sreg
f1deeee3 960 andi z_flags,(1<<ZFL_C) ; preserve C-flag
37617bd8
L		 961 ldpmx temp2, sz53p_tab, opl
962 or z_flags,temp2 ;
f1deeee3
L		 963 bmov z_flags, ZFL_H, temp, AVR_H
964 do_z80_flags_V
64f220e6
L		 965 ret
966
d305f8e4 967do_op_inca:
f1deeee3
L		 968 ldi temp,1
969 add z_a,temp
d305f8e4 970 in temp, sreg
f1deeee3 971 andi z_flags,(1<<ZFL_C) ; preserve C-flag
d305f8e4
L		 972 ldpmx temp2, sz53p_tab, z_a
973 or z_flags,temp2 ;
f1deeee3
L		 974 bmov z_flags, ZFL_H, temp, AVR_H
975 do_z80_flags_V
d305f8e4
L		 976 ret
977
3c3744f1
L		 978;----------------------------------------------------------------
979;|Mnemonic |SZHPNC|Description |Notes |
980;----------------------------------------------------------------
37617bd8
L		 981;|DEC r |***V1-|Decrement |s=s-1 |
982;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
983;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
984;|----------|SZHP C|---------- 8080 ----------------------------|
985;|DEC r |**-P -|Increment |r=r+1 |
986;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
987;
3c3744f1 988;
fdcfcd44 989do_op_dec:
f1deeee3 990 subi opl,1
64f220e6 991 in temp, sreg
f1deeee3 992 andi z_flags,(1<<ZFL_C) ; preserve C-flag
37617bd8
L		 993 ldpmx temp2, sz53p_tab, opl
994 or z_flags,temp2 ;
f1deeee3
L		 995 bmov z_flags, ZFL_H, temp, AVR_H
996 do_z80_flags_V
37617bd8 997 do_z80_flags_set_N
3c3744f1
L		 998 ret
999
d305f8e4 1000do_op_deca:
f1deeee3
L		 1001 ldi opl,1
1002 sub z_a,opl
d305f8e4 1003 in temp, sreg
f1deeee3 1004 andi z_flags,(1<<ZFL_C) ; preserve C-flag
d305f8e4
L		 1005 ldpmx temp2, sz53p_tab, z_a
1006 or z_flags,temp2 ;
f1deeee3
L		 1007 bmov z_flags, ZFL_H, temp, AVR_H
1008 do_z80_flags_V
d305f8e4
L		 1009 do_z80_flags_set_N
1010 ret
3c3744f1
L		 1011
1012;----------------------------------------------------------------
1013;|Mnemonic |SZHPNC|Description |Notes |
1014;----------------------------------------------------------------
1015;|INC xx |------|Increment |xx=xx+1 |
1016;|INC ss |------|Increment |ss=ss+1 |
1017;
4bd49b80 1018;
fdcfcd44 1019do_op_inc16:
db568140
L		 1020 subi opl,low(-1)
1021 sbci oph,high(-1)
64f220e6
L		 1022 ret
1023
3c3744f1
L		 1024;----------------------------------------------------------------
1025;|Mnemonic |SZHPNC|Description |Notes |
1026;----------------------------------------------------------------
1027;|DEC xx |------|Decrement |xx=xx-1 |
1028;|DEC ss |------|Decrement |ss=ss-1 |
1029;
4bd49b80 1030;
fdcfcd44 1031do_op_dec16:
37617bd8
L		 1032 subi opl, 1
1033 sbci oph, 0
64f220e6
L		 1034 ret
1035
3c3744f1
L		 1036;----------------------------------------------------------------
1037;|Mnemonic |SZHPNC|Description |Notes |
1038;----------------------------------------------------------------
1039;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
37617bd8
L		 1040;|----------|SZHP C|---------- 8080 ----------------------------|
1041;|RLCA |---- *|Rotate Left Circular |A=A<- |
1042;
3c3744f1 1043;
f1deeee3 1044do_op_rlca:
4bd49b80 1045 ;Rotate Left Cyclical. All bits move 1 to the
fdcfcd44 1046 ;left, the msb becomes c and lsb.
37617bd8 1047 do_z80_flags_op_rotate
f1deeee3 1048 lsl z_a
64f220e6 1049 brcc do_op_rlc_noc
f1deeee3
L		 1050 ldi temp,1
1051 or z_a,temp
64f220e6 1052 ori z_flags, (1<<ZFL_C)
fdcfcd44
L		 1053do_op_rlc_noc:
1054 ret
1055
3c3744f1
L		 1056;----------------------------------------------------------------
1057;|Mnemonic |SZHPNC|Description |Notes |
1058;----------------------------------------------------------------
1059;|RRCA |--0-0*|Rotate Right Circular|A=->A |
37617bd8
L		 1060;|----------|SZHP C|---------- 8080 ----------------------------|
1061;|RRCA |---- *|Rotate Right Circular|A=->A |
1062;
3c3744f1 1063;
4bd49b80
L		 1064do_op_rrca:
1065 ;Rotate Right Cyclical. All bits move 1 to the
fdcfcd44 1066 ;right, the lsb becomes c and msb.
37617bd8 1067 do_z80_flags_op_rotate
f1deeee3 1068 lsr z_a
64f220e6 1069 brcc do_op_rrc_noc
f1deeee3
L		 1070 ldi temp,0x80
1071 or z_a,temp
64f220e6 1072 ori z_flags, (1<<ZFL_C)
fdcfcd44
L		 1073do_op_rrc_noc:
1074 ret
1075
3c3744f1
L		 1076;----------------------------------------------------------------
1077;|Mnemonic |SZHPNC|Description |Notes |
1078;----------------------------------------------------------------
1079;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
37617bd8
L		 1080;|----------|SZHP C|---------- 8080 ----------------------------|
1081;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
3c3744f1 1082;
4bd49b80
L		 1083;
1084do_op_rra:
1085 ;Rotate Right. All bits move 1 to the right, the lsb
fdcfcd44 1086 ;becomes c, c becomes msb.
37617bd8 1087 clc ; get z80 carry to avr carry
64f220e6
L		 1088 sbrc z_flags,ZFL_C
1089 sec
37617bd8 1090 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
f1deeee3
L		 1091 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
1092 ror z_a
64f220e6
L		 1093 ret
1094
3c3744f1
L		 1095;----------------------------------------------------------------
1096;|Mnemonic |SZHPNC|Description |Notes |
1097;----------------------------------------------------------------
37617bd8
L		 1098;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
1099;|----------|SZHP C|---------- 8080 ----------------------------|
1100;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
3c3744f1 1101;
4bd49b80 1102;
f1deeee3 1103do_op_rla:
4bd49b80 1104 ;Rotate Left. All bits move 1 to the left, the msb
fdcfcd44
L		 1105 ;becomes c, c becomes lsb.
1106 clc
1107 sbrc z_flags,ZFL_C
1108 sec
37617bd8 1109 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
f1deeee3
L		 1110 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
1111 rol z_a
fdcfcd44
L		 1112 ret
1113
3c3744f1
L		 1114;----------------------------------------------------------------
1115;|Mnemonic |SZHPNC|Description |Notes |
1116;----------------------------------------------------------------
37617bd8
L		 1117;|ADD A,s |***V0*|Add |A=A+s |
1118;|----------|SZHP C|---------- 8080 ----------------------------|
1119;|ADD A,s |***P *|Add |A=A+s |
1120;
3c3744f1 1121;
fdcfcd44 1122do_op_adda:
1a1d6a78 1123 add z_a,opl
fdcfcd44 1124 in temp,sreg
1a1d6a78 1125 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
37617bd8 1126 bmov z_flags,ZFL_C, temp,AVR_C
f1deeee3
L		 1127 bmov z_flags,ZFL_H, temp,AVR_H
1128 do_z80_flags_V
fdcfcd44
L		 1129 ret
1130
3c3744f1
L		 1131;----------------------------------------------------------------
1132;|Mnemonic |SZHPNC|Description |Notes |
1133;----------------------------------------------------------------
37617bd8
L		 1134;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
1135;|----------|SZHP C|---------- 8080 ----------------------------|
1136;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
1137;
3c3744f1 1138;
fdcfcd44
L		 1139do_op_adca:
1140 clc
1141 sbrc z_flags,ZFL_C
1142 sec
1a1d6a78 1143 adc z_a,opl
fdcfcd44 1144 in temp,sreg
1a1d6a78 1145 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
37617bd8 1146 bmov z_flags,ZFL_C, temp,AVR_C
f1deeee3
L		 1147 bmov z_flags,ZFL_H, temp,AVR_H
1148 do_z80_flags_V
fdcfcd44
L		 1149 ret
1150
3c3744f1
L		 1151;----------------------------------------------------------------
1152;|Mnemonic |SZHPNC|Description |Notes |
1153;----------------------------------------------------------------
37617bd8 1154;|SUB s |***V1*|Subtract |A=A-s |
37617bd8
L		 1155;|----------|SZHP C|---------- 8080 ----------------------------|
1156;|SUB s |***P *|Subtract |A=A-s |
37617bd8 1157
3c3744f1 1158;
fdcfcd44 1159do_op_subfa:
1a1d6a78
L		 1160 sub z_a,opl
1161 in temp,sreg
1162 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
1163 bmov z_flags,ZFL_C, temp,AVR_C
f1deeee3
L		 1164 bmov z_flags,ZFL_H, temp,AVR_H
1165 do_z80_flags_V
1a1d6a78
L		 1166 do_z80_flags_set_N
1167 ret
1168
1169;----------------------------------------------------------------
1170;|Mnemonic |SZHPNC|Description |Notes |
1171;----------------------------------------------------------------
1172;|CP s |***V1*|Compare |A-s |
1173;|----------|SZHP C|---------- 8080 ----------------------------|
1174;|CP s |***P *|Compare |A-s |
1175
1176;
1177do_op_cpfa:
f1deeee3
L		 1178 mov temp2,z_a
1179 sub temp2,opl
fdcfcd44 1180 in temp,sreg
f1deeee3 1181 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
37617bd8 1182 bmov z_flags,ZFL_C, temp,AVR_C
f1deeee3
L		 1183 bmov z_flags,ZFL_H, temp,AVR_H
1184 do_z80_flags_V
37617bd8 1185 do_z80_flags_set_N
fdcfcd44
L		 1186 ret
1187
3c3744f1
L		 1188;----------------------------------------------------------------
1189;|Mnemonic |SZHPNC|Description |Notes |
1190;----------------------------------------------------------------
37617bd8
L		 1191;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
1192;|----------|SZHP C|---------- 8080 ----------------------------|
1193;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
1194;
3c3744f1 1195;
fdcfcd44 1196do_op_sbcfa:
fdcfcd44
L		 1197 clc
1198 sbrc z_flags,ZFL_C
1199 sec
1a1d6a78 1200 sbc z_a,opl
fdcfcd44 1201 in temp,sreg
1a1d6a78 1202 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
37617bd8 1203 bmov z_flags,ZFL_C, temp,AVR_C
f1deeee3
L		 1204 bmov z_flags,ZFL_H, temp,AVR_H
1205 do_z80_flags_V
37617bd8 1206 do_z80_flags_set_N
fdcfcd44
L		 1207 ret
1208
3c3744f1
L		 1209;----------------------------------------------------------------
1210;|Mnemonic |SZHPNC|Description |Notes |
1211;----------------------------------------------------------------
37617bd8
L		 1212;|AND s |**1P00|Logical AND |A=A&s |
1213;|----------|SZHP C|---------- 8080 ----------------------------|
1214;|AND s |**-P 0|Logical AND |A=A&s |
3c3744f1 1215;
f1deeee3 1216;
fdcfcd44 1217do_op_anda:
1a1d6a78
L		 1218 and z_a,opl ;
1219 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
37617bd8 1220 do_z80_flags_op_and
fdcfcd44
L		 1221 ret
1222
37617bd8 1223
3c3744f1
L		 1224;----------------------------------------------------------------
1225;|Mnemonic |SZHPNC|Description |Notes |
1226;----------------------------------------------------------------
37617bd8
L		 1227;|OR s |**0P00|Logical inclusive OR |A=Avs |
1228;|----------|SZHP C|---------- 8080 ----------------------------|
1229;|OR s |**-P00|Logical inclusive OR |A=Avs |
3c3744f1 1230;
f1deeee3 1231;
fdcfcd44 1232do_op_ora:
1a1d6a78
L		 1233 or z_a,opl
1234 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
37617bd8 1235 do_z80_flags_op_or
fdcfcd44
L		 1236 ret
1237
3c3744f1
L		 1238;----------------------------------------------------------------
1239;|Mnemonic |SZHPNC|Description |Notes |
1240;----------------------------------------------------------------
37617bd8
L		 1241;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1242;|----------|SZHP C|---------- 8080 ----------------------------|
1243;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
3c3744f1 1244;
f1deeee3 1245;
fdcfcd44 1246do_op_xora:
1a1d6a78
L		 1247 eor z_a,opl
1248 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
37617bd8 1249 do_z80_flags_op_or
fdcfcd44
L		 1250 ret
1251
3c3744f1
L		 1252;----------------------------------------------------------------
1253;|Mnemonic |SZHPNC|Description |Notes |
1254;----------------------------------------------------------------
37617bd8
L		 1255;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1256;|----------|SZHP C|---------- 8080 ----------------------------|
1257;|ADD HL,ss |---- *|Add |HL=HL+ss |
1258;
3c3744f1 1259;
fdcfcd44 1260do_op_addhl:
9c15f366
L		 1261 lds temp,z_l
1262 lds temp2,z_h
1263 add opl,temp
1264 adc oph,temp2
fdcfcd44 1265 in temp,sreg
37617bd8
L		 1266 bmov z_flags,ZFL_H, temp,AVR_H
1267 bmov z_flags,ZFL_C, temp,AVR_C
1268 do_z80_flags_clear_N
fdcfcd44
L		 1269 ret
1270
3c3744f1
L		 1271;----------------------------------------------------------------
1272;|Mnemonic |SZHPNC|Description |Notes |
1273;----------------------------------------------------------------
37617bd8 1274;|LD dst,src|------|Load |dst=src |
3c3744f1 1275;
37617bd8
L		 1276;
1277do_op_sthl: ;store hl to mem loc in opl:h
78700514 1278 movw xl,opl
9c15f366
L		 1279 lds temp,z_l
1280 mem_write
78700514 1281 adiw xl,1
9c15f366
L		 1282 lds temp,z_h
1283 mem_write
fdcfcd44
L		 1284 ret
1285
3c3744f1
L		 1286;----------------------------------------------------------------
1287;|Mnemonic |SZHPNC|Description |Notes |
1288;----------------------------------------------------------------
37617bd8 1289;|LD dst,src|------|Load |dst=src |
3c3744f1 1290;
4bd49b80 1291;
fdcfcd44 1292do_op_rmem16:
78700514 1293 movw xl,opl
9c15f366
L		 1294 mem_read_d opl
1295 adiw x,1
1296 mem_read_d oph
fdcfcd44
L		 1297 ret
1298
3c3744f1
L		 1299;----------------------------------------------------------------
1300;|Mnemonic |SZHPNC|Description |Notes |
1301;----------------------------------------------------------------
37617bd8
L		 1302;|LD dst,src|------|Load |dst=src |
1303;
3c3744f1 1304;
fdcfcd44 1305do_op_rmem8:
9c15f366 1306 mem_read_ds opl, op
fdcfcd44
L		 1307 ret
1308
3c3744f1
L		 1309;----------------------------------------------------------------
1310;|Mnemonic |SZHPNC|Description |Notes |
1311;----------------------------------------------------------------
37617bd8
L		 1312;|DAA |***P-*|Decimal Adjust Acc. | |
1313;|----------|SZHP C|---------- 8080 ----------------------------|
3c3744f1
L		 1314;
1315; Not yet checked
37617bd8
L		 1316
1317; Description (http://www.z80.info/z80syntx.htm#DAA):
1318; This instruction conditionally adjusts the accumulator for BCD addition
1319; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1320; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1321;
f1deeee3
L		 1322; -------------------------------------------------------------------
1323; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1324; | Oper |Before |upper digit |Before |lower digit| added |After |
1325; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1326; |-------+-------+------------+-------+-----------+--------+-------|
37617bd8
L		 1327; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1328; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1329; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1330; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1331; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1332; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1333; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1334; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1335; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
f1deeee3 1336; |-------+-------+------------+-------+-----------+--------+-------|
37617bd8
L		 1337; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1338; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1339; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1340; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
f1deeee3
L		 1341; -------------------------------------------------------------------
1342;
1343; The H flag is affected as follows:
1344;
1345; ---------------------
1346; | N | H | low |H' |
4bd49b80 1347; | | |nibble | |
f1deeee3 1348; |---+---+-------+---|
4bd49b80
L		 1349; | 0 | * | 0-9 | 0 |
1350; | 0 | * | a-f | 1 |
1351; | 1 | 0 | * | 0 |
1352; | 1 | 1 | 6-f | 0 |
1353; | 1 | 1 | 0-5 | 1 |
f1deeee3
L		 1354; ---------------------
1355;
1356; Ohter flags:
37617bd8
L		 1357; N: Unaffected.
1358; P/V: Set if Acc. is even parity after operation, reset otherwise.
1359; H: See instruction.
1360; Z: Set if Acc. is Zero after operation, reset otherwise.
1361; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1362
1363
1364
1365#if 1
f1deeee3 1366
fdcfcd44 1367do_op_da:
f1deeee3
L		 1368
1369#if EM_Z80
4bd49b80 1370 sbrc z_flags,ZFL_N ;if add-op
f1deeee3
L		 1371 rjmp op_da_sub ;then
1372#endif
1373
1374op_da_add:
1375 ldi temp2,0 ; new C and H flag
1376 sbrc z_flags,ZFL_H ; |
1377 rjmp op_da_a01 ; if (H flag ...
1378 mov temp,opl ; |
1379 andi temp,0x0f ; |
1380 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1381 brlo op_da_a10 ; |
1382op_da_a01: ; then
1383 ldi oph,0x06 ; add 6 to lower nibble
4bd49b80
L		 1384 add opl,oph ;
1385 brhc op_da_02 ; if
f1deeee3
L		 1386 ori temp2,(1<<ZFL_H) ; set new H flag
1387op_da_02: ;
1388 brcc op_da_a10 ; if
1389 ori temp2,(1<<ZFL_C) ; set new H flag
1390op_da_a10: ; endif
1391 sbrc z_flags,ZFL_C ; |
1392 rjmp op_da_a12 ; if (C flag ...
1393 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
4bd49b80 1394 brlo op_da_a13 ;
f1deeee3
L		 1395op_da_a12: ;
1396 ldi oph,0x60 ; add 6 to lower nibble
1397 add opl,oph ;
1398 ori temp2,(1<<ZFL_C) ; set new C flag
1399op_da_a13: ;
1400 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1401 or z_flags,temp2 ; merge new C and H flag
fdcfcd44 1402 ret
f1deeee3
L		 1403
1404#if EM_Z80
1405
1406op_da_sub: ;else (sub-op)
1407 rcall do_op_inv ; TODO: !
1408 ret ;endif
1409#endif
1410
37617bd8 1411#else
fdcfcd44 1412
37617bd8 1413do_op_da:
f1deeee3
L		 1414 ldi temp2,0 ;new C and H flag
1415 ldi oph,0 ;oph: what to add
1416
4bd49b80 1417 sbrc z_flags,ZFL_N ; if add-op
f1deeee3
L		 1418 rjmp op_da_sub ;then
1419op_da_add:
1420 mov temp,opl ; |
1421 andi temp,0x0f ; |
1422 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1423 brlo op_da_a10 ; |
1424 ori oph,0x06 ; add 6
1425 ori temp2,(1<<ZFL_H) ; set new H flag
1426
1427 sbrc z_flags,ZFL_C ; |
1428 rjmp op_da_a02 ; if (C flag ...
1429 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1430 brlo op_da_a03 ; |
4bd49b80 1431op_da_a02:
f1deeee3
L		 1432 ori oph,0x60 ; add 0x60
1433 ori temp2,(1<<ZFL_C) ; set new C flag
1434op_da_a03: ; endif
1435 rjmp op_da_ae
1436op_da_a10: ; else (lower nibble is 0x09 or lower)
1437 sbrc z_flags,ZFL_C ; |
1438 rjmp op_da_a12 ; if (C flag ...
1439 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
4bd49b80
L		 1440 brlo op_da_a13 ;
1441op_da_a12:
f1deeee3
L		 1442 ori oph,0x60 ; add 0x60
1443 ori temp2,(1<<ZFL_C) ; set new C flag
1444op_da_a13:
1445 sbrs z_flags,ZFL_H ; if (H flag)
1446 rjmp op_da_ae ; |
1447 ori oph,0x06 ; add 0x06
1448 mov temp,opl ; |
1449 andi temp,0x0f ; |
1450 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1451 brsh op_da_ae ; |
1452 ori temp2,(1<<ZFL_H) ; set new H flag
1453 ; endif
1454 ; endif
1455op_da_ae:
1456 add opl,oph
1457 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1458 or z_flags,temp2 ; merge new C and H flag
37617bd8 1459 ret
4bd49b80 1460
f1deeee3
L		 1461op_da_sub: ;else (sub-op)
1462 rcall do_op_inv ; TODO: !
1463 ret ;endif
37617bd8 1464#endif
fdcfcd44 1465
f1deeee3 1466
3c3744f1
L		 1467;----------------------------------------------------------------
1468;|Mnemonic |SZHPNC|Description |Notes |
1469;----------------------------------------------------------------
37617bd8
L		 1470;|SCF |--0-01|Set Carry Flag |CY=1 |
1471;|----------|SZHP C|---------- 8080 ----------------------------|
1472;
3c3744f1 1473;
fdcfcd44 1474do_op_scf:
f1deeee3 1475 do_z80_flags_clear_HN
37617bd8 1476 ori z_flags,(1<<ZFL_C)
fdcfcd44
L		 1477 ret
1478
3c3744f1
L		 1479;----------------------------------------------------------------
1480;|Mnemonic |SZHPNC|Description |Notes |
1481;----------------------------------------------------------------
f1deeee3 1482;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
37617bd8 1483;|----------|SZHP C|---------- 8080 ----------------------------|
f1deeee3 1484;|CCF |---- 1|Set Carry Flag |CY=1 |
3c3744f1 1485;
fdcfcd44 1486do_op_ccf:
37617bd8 1487 do_z80_flags_clear_N
f1deeee3 1488 do_z80_flags_copy_HC
fdcfcd44
L		 1489 ldi temp,(1<<ZFL_C)
1490 eor z_flags,temp
1491 ret
1492
3c3744f1
L		 1493;----------------------------------------------------------------
1494;|Mnemonic |SZHPNC|Description |Notes |
1495;----------------------------------------------------------------
37617bd8
L		 1496;|CPL |--1-1-|Complement |A=~A |
1497;|----------|SZHP C|---------- 8080 ----------------------------|
1498;|CPL |---- -|Complement |A=~A |
1499;
3c3744f1 1500;
fdcfcd44 1501do_op_cpl:
1a1d6a78 1502 com z_a
37617bd8 1503 do_z80_flags_set_HN
fdcfcd44
L		 1504 ret
1505
37617bd8 1506
3c3744f1
L		 1507;----------------------------------------------------------------
1508;|Mnemonic |SZHPNC|Description |Notes |
1509;----------------------------------------------------------------
37617bd8
L		 1510;|PUSH xx |------|Push |-[SP]=xx |
1511;|PUSH qq |------|Push |-[SP]=qq |
1512;
3c3744f1 1513;
fdcfcd44 1514do_op_push16:
9c15f366
L		 1515 movw xl,z_spl
1516 sbiw x,1
1517 mem_write_s oph
1518 sbiw x,1
1519 mem_write_s opl
1520 movw z_spl,xl
fdcfcd44
L		 1521
1522.if STACK_DBG
9c15f366
L		 1523 printnewline
1524 printstring "Stack push "
1525 movw temp,opl
846ffdc9 1526 rcall printhexw
9c15f366
L		 1527 printstring ", SP is now "
1528 movw temp,z_spl
846ffdc9 1529 rcall printhexw
9c15f366 1530 printstring ". "
fdcfcd44
L		 1531.endif
1532
1533 ret
1534
3c3744f1
L		 1535;----------------------------------------------------------------
1536;|Mnemonic |SZHPNC|Description |Notes |
1537;----------------------------------------------------------------
37617bd8
L		 1538;|POP xx |------|Pop |xx=[SP]+ |
1539;|POP qq |------|Pop |qq=[SP]+ |
1540;
3c3744f1 1541;
fdcfcd44 1542do_op_pop16:
9c15f366
L		 1543 movw x,z_spl
1544 mem_read_d opl
1545 adiw x,1
1546 mem_read_d oph
1547 adiw x,1
1548 movw z_spl,x
fdcfcd44
L		 1549
1550.if STACK_DBG
9c15f366
L		 1551 printnewline
1552 printstring "Stack pop "
846ffdc9
L		 1553 movw temp,opl
1554 rcall printhexw
9c15f366 1555 printstring ", SP is now "
846ffdc9
L		 1556 movw temp,z_spl
1557 rcall printhexw
9c15f366 1558 printstring ". "
fdcfcd44
L		 1559.endif
1560 ret
1561
3c3744f1
L		 1562;----------------------------------------------------------------
1563;|Mnemonic |SZHPNC|Description |Notes |
1564;----------------------------------------------------------------
37617bd8
L		 1565;|EX [SP],HL|------|Exchange |[SP]<->HL |
1566;|EX DE,HL |------|Exchange |DE<->HL |
f1deeee3 1567;-----------------------------Z80--------------------------------
4bd49b80 1568;
fdcfcd44 1569do_op_exhl:
9c15f366
L		 1570 lds temp,z_l
1571 lds temp2,z_h
1572 sts z_l,opl
1573 sts z_h,oph
1574 movw opl,temp
fdcfcd44
L		 1575 ret
1576
3c3744f1
L		 1577;----------------------------------------------------------------
1578;|Mnemonic |SZHPNC|Description |Notes |
1579;----------------------------------------------------------------
1580;
37617bd8 1581; TODO: Implement IFF1, IFF2
fdcfcd44
L		 1582do_op_di:
1583 ret
1584
3c3744f1
L		 1585;----------------------------------------------------------------
1586;|Mnemonic |SZHPNC|Description |Notes |
1587;----------------------------------------------------------------
1588;
37617bd8 1589; TODO: Implement IFF1, IFF2
fdcfcd44
L		 1590do_op_ei:
1591 ret
1592
3c3744f1
L		 1593;----------------------------------------------------------------
1594;|Mnemonic |SZHPNC|Description |Notes |
1595;----------------------------------------------------------------
37617bd8
L		 1596;|CALL cc,nn|------|Conditional Call |If cc CALL |
1597;|JP cc,nn |------|Conditional Jump |If cc JP |
1598;|RET cc |------|Conditional Return |If cc RET |
1599;
3c3744f1 1600;
fdcfcd44 1601do_op_ifnz:
64f220e6
L		 1602 sbrs z_flags, ZFL_Z
1603 ret
db568140
L		 1604 clr insdech
1605 clr insdecl
fdcfcd44
L		 1606 ret
1607
3c3744f1
L		 1608;----------------------------------------------------------------
1609;|Mnemonic |SZHPNC|Description |Notes |
1610;----------------------------------------------------------------
37617bd8
L		 1611;|CALL cc,nn|------|Conditional Call |If cc CALL |
1612;|JP cc,nn |------|Conditional Jump |If cc JP |
1613;|RET cc |------|Conditional Return |If cc RET |
1614;
3c3744f1 1615;
fdcfcd44 1616do_op_ifz:
64f220e6
L		 1617 sbrc z_flags, ZFL_Z
1618 ret
db568140
L		 1619 clr insdech
1620 clr insdecl
fdcfcd44
L		 1621 ret
1622
3c3744f1
L		 1623;----------------------------------------------------------------
1624;|Mnemonic |SZHPNC|Description |Notes |
1625;----------------------------------------------------------------
37617bd8
L		 1626;|CALL cc,nn|------|Conditional Call |If cc CALL |
1627;|JP cc,nn |------|Conditional Jump |If cc JP |
1628;|RET cc |------|Conditional Return |If cc RET |
1629;
3c3744f1 1630;
fdcfcd44 1631do_op_ifnc:
64f220e6 1632 sbrs z_flags, ZFL_C
37617bd8 1633 ret
db568140
L		 1634 clr insdech
1635 clr insdecl
fdcfcd44
L		 1636 ret
1637
3c3744f1
L		 1638;----------------------------------------------------------------
1639;|Mnemonic |SZHPNC|Description |Notes |
1640;----------------------------------------------------------------
37617bd8
L		 1641;|CALL cc,nn|------|Conditional Call |If cc CALL |
1642;|JP cc,nn |------|Conditional Jump |If cc JP |
1643;|RET cc |------|Conditional Return |If cc RET |
1644;
3c3744f1 1645;
fdcfcd44 1646do_op_ifc:
64f220e6
L		 1647 sbrc z_flags, ZFL_C
1648 ret
db568140
L		 1649 clr insdech
1650 clr insdecl
fdcfcd44
L		 1651 ret
1652
3c3744f1
L		 1653;----------------------------------------------------------------
1654;|Mnemonic |SZHPNC|Description |Notes |
1655;----------------------------------------------------------------
37617bd8
L		 1656;|CALL cc,nn|------|Conditional Call |If cc CALL |
1657;|JP cc,nn |------|Conditional Jump |If cc JP |
1658;|RET cc |------|Conditional Return |If cc RET |
1659;
3c3744f1 1660;
fdcfcd44 1661do_op_ifpo:
37617bd8 1662 sbrs z_flags, ZFL_P
64f220e6 1663 ret
db568140
L		 1664 clr insdech
1665 clr insdecl
fdcfcd44
L		 1666 ret
1667
3c3744f1
L		 1668;----------------------------------------------------------------
1669;|Mnemonic |SZHPNC|Description |Notes |
1670;----------------------------------------------------------------
37617bd8
L		 1671;|CALL cc,nn|------|Conditional Call |If cc CALL |
1672;|JP cc,nn |------|Conditional Jump |If cc JP |
1673;|RET cc |------|Conditional Return |If cc RET |
1674;
3c3744f1 1675;
fdcfcd44 1676do_op_ifpe:
37617bd8 1677 sbrc z_flags, ZFL_P
64f220e6 1678 ret
db568140
L		 1679 clr insdech
1680 clr insdecl
fdcfcd44
L		 1681 ret
1682
3c3744f1
L		 1683;----------------------------------------------------------------
1684;|Mnemonic |SZHPNC|Description |Notes |
1685;----------------------------------------------------------------
37617bd8
L		 1686;|CALL cc,nn|------|Conditional Call |If cc CALL |
1687;|JP cc,nn |------|Conditional Jump |If cc JP |
1688;|RET cc |------|Conditional Return |If cc RET |
1689;
3c3744f1 1690;
fdcfcd44 1691do_op_ifp: ;sign positive, aka s=0
64f220e6 1692 sbrs z_flags, ZFL_S
fdcfcd44 1693 ret
db568140
L		 1694 clr insdech
1695 clr insdecl
fdcfcd44
L		 1696 ret
1697
3c3744f1
L		 1698;----------------------------------------------------------------
1699;|Mnemonic |SZHPNC|Description |Notes |
1700;----------------------------------------------------------------
37617bd8
L		 1701;|CALL cc,nn|------|Conditional Call |If cc CALL |
1702;|JP cc,nn |------|Conditional Jump |If cc JP |
1703;|RET cc |------|Conditional Return |If cc RET |
1704;
3c3744f1 1705;
fdcfcd44 1706do_op_ifm: ;sign negative, aka s=1
64f220e6 1707 sbrc z_flags, ZFL_S
fdcfcd44 1708 ret
db568140
L		 1709 clr insdech
1710 clr insdecl
fdcfcd44
L		 1711 ret
1712
4bd49b80 1713
fdcfcd44
L		 1714; ----------------------- Opcode decoding -------------------------
1715
1716; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1717; operations: fetch, do something, store.
4bd49b80
L		 1718; The table is made of 256 words. These 16-bit words consist of
1719; the fetch operation (bit 0-4), the processing operation (bit 10-16) and the store
fdcfcd44 1720; operation (bit 5-9).
99ed7199 1721.org (PC+255) & 0xff00
fdcfcd44 1722inst_table:
99ed7199
L		 1723.dw (FETCH_NOP | OP_NOP | STORE_NOP) ; 00 NOP
1724.dw (FETCH_DIR16| OP_NOP | STORE_BC ) ; 01 nn nn LD BC,nn
f1deeee3 1725.dw (FETCH_NOP | OP_NOP | STORE_MBC) ; 02 LD (BC),A
99ed7199
L		 1726.dw (FETCH_BC | OP_INC16 | STORE_BC ) ; 03 INC BC
1727.dw (FETCH_B | OP_INC | STORE_B ) ; 04 INC B
1728.dw (FETCH_B | OP_DEC | STORE_B ) ; 05 DEC B
1729.dw (FETCH_DIR8 | OP_NOP | STORE_B ) ; 06 nn LD B,n
f1deeee3 1730.dw (FETCH_NOP | OP_RLCA | STORE_NOP) ; 07 RLCA
99ed7199
L		 1731.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 08 EX AF,AF' (Z80)
1732.dw (FETCH_BC | OP_ADDHL | STORE_HL ) ; 09 ADD HL,BC
f1deeee3 1733.dw (FETCH_MBC | OP_NOP | STORE_NOP) ; 0A LD A,(BC)
99ed7199
L		 1734.dw (FETCH_BC | OP_DEC16 | STORE_BC ) ; 0B DEC BC
1735.dw (FETCH_C | OP_INC | STORE_C ) ; 0C INC C
1736.dw (FETCH_C | OP_DEC | STORE_C ) ; 0D DEC C
1737.dw (FETCH_DIR8 | OP_NOP | STORE_C ) ; 0E nn LD C,n
f1deeee3 1738.dw (FETCH_NOP | OP_RRCA | STORE_NOP) ; 0F RRCA
99ed7199 1739.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 10 oo DJNZ o (Z80)
fdcfcd44 1740.dw (FETCH_DIR16| OP_NOP | STORE_DE ) ; 11 nn nn LD DE,nn
f1deeee3 1741.dw (FETCH_NOP | OP_NOP | STORE_MDE) ; 12 LD (DE),A
99ed7199 1742.dw (FETCH_DE | OP_INC16 | STORE_DE ) ; 13 INC DE
fdcfcd44
L		 1743.dw (FETCH_D | OP_INC | STORE_D ) ; 14 INC D
1744.dw (FETCH_D | OP_DEC | STORE_D ) ; 15 DEC D
1745.dw (FETCH_DIR8 | OP_NOP | STORE_D ) ; 16 nn LD D,n
f1deeee3 1746.dw (FETCH_NOP | OP_RLA | STORE_NOP) ; 17 RLA
fdcfcd44
L		 1747.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 18 oo JR o (Z80)
1748.dw (FETCH_DE | OP_ADDHL | STORE_HL ) ; 19 ADD HL,DE
f1deeee3 1749.dw (FETCH_MDE | OP_NOP | STORE_NOP) ; 1A LD A,(DE)
fdcfcd44
L		 1750.dw (FETCH_DE | OP_DEC16 | STORE_DE ) ; 1B DEC DE
1751.dw (FETCH_E | OP_INC | STORE_E ) ; 1C INC E
1752.dw (FETCH_E | OP_DEC | STORE_E ) ; 1D DEC E
1753.dw (FETCH_DIR8 | OP_NOP | STORE_E ) ; 1E nn LD E,n
f1deeee3 1754.dw (FETCH_NOP | OP_RRA | STORE_NOP) ; 1F RRA
fdcfcd44
L		 1755.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 20 oo JR NZ,o (Z80)
1756.dw (FETCH_DIR16| OP_NOP | STORE_HL ) ; 21 nn nn LD HL,nn
1757.dw (FETCH_DIR16| OP_STHL | STORE_NOP) ; 22 nn nn LD (nn),HL
1758.dw (FETCH_HL | OP_INC16 | STORE_HL ) ; 23 INC HL
1759.dw (FETCH_H | OP_INC | STORE_H ) ; 24 INC H
1760.dw (FETCH_H | OP_DEC | STORE_H ) ; 25 DEC H
1761.dw (FETCH_DIR8 | OP_NOP | STORE_H ) ; 26 nn LD H,n
64f220e6 1762.dw (FETCH_A | OP_DA | STORE_A ) ; 27 DAA
fdcfcd44
L		 1763.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 28 oo JR Z,o (Z80)
1764.dw (FETCH_HL | OP_ADDHL | STORE_HL ) ; 29 ADD HL,HL
1765.dw (FETCH_DIR16| OP_RMEM16 | STORE_HL ) ; 2A nn nn LD HL,(nn)
1766.dw (FETCH_HL | OP_DEC16 | STORE_HL ) ; 2B DEC HL
1767.dw (FETCH_L | OP_INC | STORE_L ) ; 2C INC L
1768.dw (FETCH_L | OP_DEC | STORE_L ) ; 2D DEC L
1769.dw (FETCH_DIR8 | OP_NOP | STORE_L ) ; 2E nn LD L,n
1a1d6a78 1770.dw (FETCH_NOP | OP_CPL | STORE_NOP) ; 2F CPL
fdcfcd44
L		 1771.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 30 oo JR NC,o (Z80)
1772.dw (FETCH_DIR16| OP_NOP | STORE_SP ) ; 31 nn nn LD SP,nn
1773.dw (FETCH_DIR16| OP_NOP | STORE_AM ) ; 32 nn nn LD (nn),A
1774.dw (FETCH_SP | OP_INC16 | STORE_SP ) ; 33 INC SP
1775.dw (FETCH_MHL | OP_INC | STORE_MHL) ; 34 INC (HL)
1776.dw (FETCH_MHL | OP_DEC | STORE_MHL) ; 35 DEC (HL)
1777.dw (FETCH_DIR8 | OP_NOP | STORE_MHL) ; 36 nn LD (HL),n
1778.dw (FETCH_NOP | OP_SCF | STORE_NOP) ; 37 SCF
1779.dw (FETCH_NOP | OP_INV | STORE_NOP) ; 38 oo JR C,o (Z80)
1780.dw (FETCH_SP | OP_ADDHL | STORE_HL ) ; 39 ADD HL,SP
1781.dw (FETCH_DIR16| OP_RMEM8 | STORE_A ) ; 3A nn nn LD A,(nn)
1782.dw (FETCH_SP | OP_DEC16 | STORE_SP ) ; 3B DEC SP
d305f8e4
L		 1783.dw (FETCH_NOP | OP_INCA | STORE_NOP) ; 3C INC A
1784.dw (FETCH_NOP | OP_DECA | STORE_NOP) ; 3D DEC A
fdcfcd44
L		 1785.dw (FETCH_DIR8 | OP_NOP | STORE_A ) ; 3E nn LD A,n
1786.dw (FETCH_NOP | OP_CCF | STORE_NOP) ; 3F CCF (Complement Carry Flag, gvd)
1787.dw (FETCH_B | OP_NOP | STORE_B ) ; 40 LD B,r
1788.dw (FETCH_C | OP_NOP | STORE_B ) ; 41 LD B,r
1789.dw (FETCH_D | OP_NOP | STORE_B ) ; 42 LD B,r
1790.dw (FETCH_E | OP_NOP | STORE_B ) ; 43 LD B,r
1791.dw (FETCH_H | OP_NOP | STORE_B ) ; 44 LD B,r
1792.dw (FETCH_L | OP_NOP | STORE_B ) ; 45 LD B,r
1793.dw (FETCH_MHL | OP_NOP | STORE_B ) ; 46 LD B,r
64f220e6 1794.dw (FETCH_A | OP_NOP | STORE_B ) ; 47 LD B,r
fdcfcd44
L		 1795.dw (FETCH_B | OP_NOP | STORE_C ) ; 48 LD C,r
1796.dw (FETCH_C | OP_NOP | STORE_C ) ; 49 LD C,r
1797.dw (FETCH_D | OP_NOP | STORE_C ) ; 4A LD C,r
1798.dw (FETCH_E | OP_NOP | STORE_C ) ; 4B LD C,r
1799.dw (FETCH_H | OP_NOP | STORE_C ) ; 4C LD C,r
1800.dw (FETCH_L | OP_NOP | STORE_C ) ; 4D LD C,r
1801.dw (FETCH_MHL | OP_NOP | STORE_C ) ; 4E LD C,r
64f220e6 1802.dw (FETCH_A | OP_NOP | STORE_C ) ; 4F LD C,r
fdcfcd44
L		 1803.dw (FETCH_B | OP_NOP | STORE_D ) ; 50 LD D,r
1804.dw (FETCH_C | OP_NOP | STORE_D ) ; 51 LD D,r
1805.dw (FETCH_D | OP_NOP | STORE_D ) ; 52 LD D,r
1806.dw (FETCH_E | OP_NOP | STORE_D ) ; 53 LD D,r
1807.dw (FETCH_H | OP_NOP | STORE_D ) ; 54 LD D,r
1808.dw (FETCH_L | OP_NOP | STORE_D ) ; 55 LD D,r
1809.dw (FETCH_MHL | OP_NOP | STORE_D ) ; 56 LD D,r
64f220e6 1810.dw (FETCH_A | OP_NOP | STORE_D ) ; 57 LD D,r
fdcfcd44
L		 1811.dw (FETCH_B | OP_NOP | STORE_E ) ; 58 LD E,r
1812.dw (FETCH_C | OP_NOP | STORE_E ) ; 59 LD E,r
1813.dw (FETCH_D | OP_NOP | STORE_E ) ; 5A LD E,r
1814.dw (FETCH_E | OP_NOP | STORE_E ) ; 5B LD E,r
1815.dw (FETCH_H | OP_NOP | STORE_E ) ; 5C LD E,r
1816.dw (FETCH_L | OP_NOP | STORE_E ) ; 5D LD E,r
1817.dw (FETCH_MHL | OP_NOP | STORE_E ) ; 5E LD E,r
64f220e6 1818.dw (FETCH_A | OP_NOP | STORE_E ) ; 5F LD E,r
fdcfcd44
L		 1819.dw (FETCH_B | OP_NOP | STORE_H ) ; 60 LD H,r
1820.dw (FETCH_C | OP_NOP | STORE_H ) ; 61 LD H,r
1821.dw (FETCH_D | OP_NOP | STORE_H ) ; 62 LD H,r
1822.dw (FETCH_E | OP_NOP | STORE_H ) ; 63 LD H,r
1823.dw (FETCH_H | OP_NOP | STORE_H ) ; 64 LD H,r
1824.dw (FETCH_L | OP_NOP | STORE_H ) ; 65 LD H,r
1825.dw (FETCH_MHL | OP_NOP | STORE_H ) ; 66 LD H,r
64f220e6 1826.dw (FETCH_A | OP_NOP | STORE_H ) ; 67 LD H,r
fdcfcd44
L		 1827.dw (FETCH_B | OP_NOP | STORE_L ) ; 68 LD L,r
1828.dw (FETCH_C | OP_NOP | STORE_L ) ; 69 LD L,r
1829.dw (FETCH_D | OP_NOP | STORE_L ) ; 6A LD L,r
1830.dw (FETCH_E | OP_NOP | STORE_L ) ; 6B LD L,r
1831.dw (FETCH_H | OP_NOP | STORE_L ) ; 6C LD L,r
1832.dw (FETCH_L | OP_NOP | STORE_L ) ; 6D LD L,r
1833.dw (FETCH_MHL | OP_NOP | STORE_L ) ; 6E LD L,r
64f220e6 1834.dw (FETCH_A | OP_NOP | STORE_L ) ; 6F LD L,r
fdcfcd44
L		 1835.dw (FETCH_B | OP_NOP | STORE_MHL) ; 70 LD (HL),r
1836.dw (FETCH_C | OP_NOP | STORE_MHL) ; 71 LD (HL),r
1837.dw (FETCH_D | OP_NOP | STORE_MHL) ; 72 LD (HL),r
1838.dw (FETCH_E | OP_NOP | STORE_MHL) ; 73 LD (HL),r
1839.dw (FETCH_H | OP_NOP | STORE_MHL) ; 74 LD (HL),r
1840.dw (FETCH_L | OP_NOP | STORE_MHL) ; 75 LD (HL),r
1841.dw (FETCH_NOP | OP_NOP | STORE_NOP) ; 76 HALT
64f220e6 1842.dw (FETCH_A | OP_NOP | STORE_MHL) ; 77 LD (HL),r
fdcfcd44
L		 1843.dw (FETCH_B | OP_NOP | STORE_A ) ; 78 LD A,r
1844.dw (FETCH_C | OP_NOP | STORE_A ) ; 79 LD A,r
1845.dw (FETCH_D | OP_NOP | STORE_A ) ; 7A LD A,r
1846.dw (FETCH_E | OP_NOP | STORE_A ) ; 7B LD A,r
1847.dw (FETCH_H | OP_NOP | STORE_A ) ; 7C LD A,r
1848.dw (FETCH_L | OP_NOP | STORE_A ) ; 7D LD A,r
1849.dw (FETCH_MHL | OP_NOP | STORE_A ) ; 7E LD A,r
64f220e6 1850.dw (FETCH_A | OP_NOP | STORE_A ) ; 7F LD A,r
1a1d6a78
L		 1851.dw (FETCH_B | OP_ADDA | STORE_NOP) ; 80 ADD A,r
1852.dw (FETCH_C | OP_ADDA | STORE_NOP) ; 81 ADD A,r
1853.dw (FETCH_D | OP_ADDA | STORE_NOP) ; 82 ADD A,r
1854.dw (FETCH_E | OP_ADDA | STORE_NOP) ; 83 ADD A,r
1855.dw (FETCH_H | OP_ADDA | STORE_NOP) ; 84 ADD A,r
1856.dw (FETCH_L | OP_ADDA | STORE_NOP) ; 85 ADD A,r
1857.dw (FETCH_MHL | OP_ADDA | STORE_NOP) ; 86 ADD A,r
1858.dw (FETCH_A | OP_ADDA | STORE_NOP) ; 87 ADD A,r
1859.dw (FETCH_B | OP_ADCA | STORE_NOP) ; 88 ADC A,r
1860.dw (FETCH_C | OP_ADCA | STORE_NOP) ; 89 ADC A,r
1861.dw (FETCH_D | OP_ADCA | STORE_NOP) ; 8A ADC A,r
1862.dw (FETCH_E | OP_ADCA | STORE_NOP) ; 8B ADC A,r
1863.dw (FETCH_H | OP_ADCA | STORE_NOP) ; 8C ADC A,r
1864.dw (FETCH_L | OP_ADCA | STORE_NOP) ; 8D ADC A,r
1865.dw (FETCH_MHL | OP_ADCA | STORE_NOP) ; 8E ADC A,r
1866.dw (FETCH_A | OP_ADCA | STORE_NOP) ; 8F ADC A,r
1867.dw (FETCH_B | OP_SUBFA | STORE_NOP) ; 90 SUB A,r
1868.dw (FETCH_C | OP_SUBFA | STORE_NOP) ; 91 SUB A,r
1869.dw (FETCH_D | OP_SUBFA | STORE_NOP) ; 92 SUB A,r
1870.dw (FETCH_E | OP_SUBFA | STORE_NOP) ; 93 SUB A,r
1871.dw (FETCH_H | OP_SUBFA | STORE_NOP) ; 94 SUB A,r
1872.dw (FETCH_L | OP_SUBFA | STORE_NOP) ; 95 SUB A,r
1873.dw (FETCH_MHL | OP_SUBFA | STORE_NOP) ; 96 SUB A,r
1874.dw (FETCH_A | OP_SUBFA | STORE_NOP) ; 97 SUB A,r
1875.dw (FETCH_B | OP_SBCFA | STORE_NOP) ; 98 SBC A,r
1876.dw (FETCH_C | OP_SBCFA | STORE_NOP) ; 99 SBC A,r
1877.dw (FETCH_D | OP_SBCFA | STORE_NOP) ; 9A SBC A,r
1878.dw (FETCH_E | OP_SBCFA | STORE_NOP) ; 9B SBC A,r
1879.dw (FETCH_H | OP_SBCFA | STORE_NOP) ; 9C SBC A,r
1880.dw (FETCH_L | OP_SBCFA | STORE_NOP) ; 9D SBC A,r
1881.dw (FETCH_MHL | OP_SBCFA | STORE_NOP) ; 9E SBC A,r
1882.dw (FETCH_A | OP_SBCFA | STORE_NOP) ; 9F SBC A,r
1883.dw (FETCH_B | OP_ANDA | STORE_NOP) ; A0 AND A,r
1884.dw (FETCH_C | OP_ANDA | STORE_NOP) ; A1 AND A,r
1885.dw (FETCH_D | OP_ANDA | STORE_NOP) ; A2 AND A,r
1886.dw (FETCH_E | OP_ANDA | STORE_NOP) ; A3 AND A,r
1887.dw (FETCH_H | OP_ANDA | STORE_NOP) ; A4 AND A,r
1888.dw (FETCH_L | OP_ANDA | STORE_NOP) ; A5 AND A,r
1889.dw (FETCH_MHL | OP_ANDA | STORE_NOP) ; A6 AND A,r
1890.dw (FETCH_A | OP_ANDA | STORE_NOP) ; A7 AND A,r
1891.dw (FETCH_B | OP_XORA | STORE_NOP) ; A8 XOR A,r
1892.dw (FETCH_C | OP_XORA | STORE_NOP) ; A9 XOR A,r
1893.dw (FETCH_D | OP_XORA | STORE_NOP) ; AA XOR A,r
1894.dw (FETCH_E | OP_XORA | STORE_NOP) ; AB XOR A,r
1895.dw (FETCH_H | OP_XORA | STORE_NOP) ; AC XOR A,r
1896.dw (FETCH_L | OP_XORA | STORE_NOP) ; AD XOR A,r
1897.dw (FETCH_MHL | OP_XORA | STORE_NOP) ; AE XOR A,r
1898.dw (FETCH_A | OP_XORA | STORE_NOP) ; AF XOR A,r
1899.dw (FETCH_B | OP_ORA | STORE_NOP) ; B0 OR A,r
1900.dw (FETCH_C | OP_ORA | STORE_NOP) ; B1 OR A,r
1901.dw (FETCH_D | OP_ORA | STORE_NOP) ; B2 OR A,r
1902.dw (FETCH_E | OP_ORA | STORE_NOP) ; B3 OR A,r
1903.dw (FETCH_H | OP_ORA | STORE_NOP) ; B4 OR A,r
1904.dw (FETCH_L | OP_ORA | STORE_NOP) ; B5 OR A,r
1905.dw (FETCH_MHL | OP_ORA | STORE_NOP) ; B6 OR A,r
1906.dw (FETCH_A | OP_ORA | STORE_NOP) ; B7 OR A,r
1907.dw (FETCH_B | OP_CPFA | STORE_NOP) ; B8 CP A,r
1908.dw (FETCH_C | OP_CPFA | STORE_NOP) ; B9 CP A,r
1909.dw (FETCH_D | OP_CPFA | STORE_NOP) ; BA CP A,r
1910.dw (FETCH_E | OP_CPFA | STORE_NOP) ; BB CP A,r
1911.dw (FETCH_H | OP_CPFA | STORE_NOP) ; BC CP A,r
1912.dw (FETCH_L | OP_CPFA | STORE_NOP) ; BD CP A,r
1913.dw (FETCH_MHL | OP_CPFA | STORE_NOP) ; BE CP A,r
1914.dw (FETCH_A | OP_CPFA | STORE_NOP) ; BF CP A,r
fdcfcd44
L		 1915.dw (FETCH_NOP | OP_IFNZ | STORE_RET) ; C0 RET NZ
1916.dw (FETCH_NOP | OP_POP16 | STORE_BC ) ; C1 POP BC
1917.dw (FETCH_DIR16| OP_IFNZ | STORE_PC ) ; C2 nn nn JP NZ,nn
1918.dw (FETCH_DIR16| OP_NOP | STORE_PC ) ; C3 nn nn JP nn
1919.dw (FETCH_DIR16| OP_IFNZ | STORE_CALL) ; C4 nn nn CALL NZ,nn
1920.dw (FETCH_BC | OP_PUSH16 | STORE_NOP) ; C5 PUSH BC
1a1d6a78 1921.dw (FETCH_DIR8 | OP_ADDA | STORE_NOP) ; C6 nn ADD A,n
fdcfcd44
L		 1922.dw (FETCH_RST | OP_NOP | STORE_CALL) ; C7 RST 0
1923.dw (FETCH_NOP | OP_IFZ | STORE_RET) ; C8 RET Z
1924.dw (FETCH_NOP | OP_NOP | STORE_RET) ; C9 RET
1925.dw (FETCH_DIR16| OP_IFZ | STORE_PC ) ; CA nn nn JP Z,nn
1926.dw (FETCH_NOP | OP_INV | STORE_NOP) ; CB (Z80 specific)
1927.dw (FETCH_DIR16| OP_IFZ | STORE_CALL) ; CC nn nn CALL Z,nn
1928.dw (FETCH_DIR16| OP_NOP | STORE_CALL) ; CD nn nn CALL nn
1a1d6a78 1929.dw (FETCH_DIR8 | OP_ADCA | STORE_NOP) ; CE nn ADC A,n
fdcfcd44
L		 1930.dw (FETCH_RST | OP_NOP | STORE_CALL) ; CF RST 8H
1931.dw (FETCH_NOP | OP_IFNC | STORE_RET) ; D0 RET NC
1932.dw (FETCH_NOP | OP_POP16 | STORE_DE ) ; D1 POP DE
1933.dw (FETCH_DIR16| OP_IFNC | STORE_PC ) ; D2 nn nn JP NC,nn
1934.dw (FETCH_DIR8 | OP_OUTA | STORE_NOP) ; D3 nn OUT (n),A
1935.dw (FETCH_DIR16| OP_IFNC | STORE_CALL) ; D4 nn nn CALL NC,nn
1936.dw (FETCH_DE | OP_PUSH16 | STORE_NOP) ; D5 PUSH DE
1a1d6a78 1937.dw (FETCH_DIR8 | OP_SUBFA | STORE_NOP) ; D6 nn SUB n
fdcfcd44
L		 1938.dw (FETCH_RST | OP_NOP | STORE_CALL) ; D7 RST 10H
1939.dw (FETCH_NOP | OP_IFC | STORE_RET) ; D8 RET C
99ed7199 1940.dw (FETCH_NOP | OP_INV | STORE_NOP) ; D9 EXX (Z80)
fdcfcd44
L		 1941.dw (FETCH_DIR16| OP_IFC | STORE_PC ) ; DA nn nn JP C,nn
1942.dw (FETCH_DIR8 | OP_IN | STORE_A ) ; DB nn IN A,(n)
1943.dw (FETCH_DIR16| OP_IFC | STORE_CALL) ; DC nn nn CALL C,nn
1944.dw (FETCH_NOP | OP_INV | STORE_NOP) ; DD (Z80)
1a1d6a78 1945.dw (FETCH_DIR8 | OP_SBCFA | STORE_NOP) ; DE nn SBC A,n
fdcfcd44
L		 1946.dw (FETCH_RST | OP_NOP | STORE_CALL) ; DF RST 18H
1947.dw (FETCH_NOP | OP_IFPO | STORE_RET) ; E0 RET PO
1948.dw (FETCH_NOP | OP_POP16 | STORE_HL ) ; E1 POP HL
1949.dw (FETCH_DIR16| OP_IFPO | STORE_PC ) ; E2 nn nn JP PO,nn
1950.dw (FETCH_MSP | OP_EXHL | STORE_MSP) ; E3 EX (SP),HL
1951.dw (FETCH_DIR16| OP_IFPO | STORE_CALL) ; E4 nn nn CALL PO,nn
1952.dw (FETCH_HL | OP_PUSH16 | STORE_NOP) ; E5 PUSH HL
1a1d6a78 1953.dw (FETCH_DIR8 | OP_ANDA | STORE_NOP) ; E6 nn AND n
fdcfcd44
L		 1954.dw (FETCH_RST | OP_NOP | STORE_CALL) ; E7 RST 20H
1955.dw (FETCH_NOP | OP_IFPE | STORE_RET) ; E8 RET PE
1956.dw (FETCH_HL | OP_NOP | STORE_PC ) ; E9 JP (HL)
1957.dw (FETCH_DIR16| OP_IFPE | STORE_PC ) ; EA nn nn JP PE,nn
1958.dw (FETCH_DE | OP_EXHL | STORE_DE ) ; EB EX DE,HL
1959.dw (FETCH_DIR16| OP_IFPE | STORE_CALL) ; EC nn nn CALL PE,nn
1960.dw (FETCH_NOP | OP_INV | STORE_NOP) ; ED (Z80 specific)
1a1d6a78 1961.dw (FETCH_DIR8 | OP_XORA | STORE_NOP) ; EE nn XOR n
fdcfcd44
L		 1962.dw (FETCH_RST | OP_NOP | STORE_CALL) ; EF RST 28H
1963.dw (FETCH_NOP | OP_IFP | STORE_RET) ; F0 RET P
1964.dw (FETCH_NOP | OP_POP16 | STORE_AF ) ; F1 POP AF
1965.dw (FETCH_DIR16| OP_IFP | STORE_PC ) ; F2 nn nn JP P,nn
1966.dw (FETCH_NOP | OP_DI | STORE_NOP) ; F3 DI
1967.dw (FETCH_DIR16| OP_IFP | STORE_CALL) ; F4 nn nn CALL P,nn
1968.dw (FETCH_AF | OP_PUSH16 | STORE_NOP) ; F5 PUSH AF
1a1d6a78 1969.dw (FETCH_DIR8 | OP_ORA | STORE_NOP) ; F6 nn OR n
fdcfcd44
L		 1970.dw (FETCH_RST | OP_NOP | STORE_CALL) ; F7 RST 30H
1971.dw (FETCH_NOP | OP_IFM | STORE_RET) ; F8 RET M
1972.dw (FETCH_HL | OP_NOP | STORE_SP ) ; F9 LD SP,HL
1973.dw (FETCH_DIR16| OP_IFM | STORE_PC ) ; FA nn nn JP M,nn
1974.dw (FETCH_NOP | OP_EI | STORE_NOP) ; FB EI
1975.dw (FETCH_DIR16| OP_IFM | STORE_CALL) ; FC nn nn CALL M,nn
1976.dw (FETCH_NOP | OP_INV | STORE_NOP) ; FD (Z80 specific)
1a1d6a78 1977.dw (FETCH_DIR8 | OP_CPFA | STORE_NOP) ; FE nn CP n
fdcfcd44 1978.dw (FETCH_RST | OP_NOP | STORE_CALL) ; FF RST 38H
37617bd8 1979
9c15f366
L		 1980;----------------------------------------------------------------
1981; Lookup table, stolen from z80ex, Z80 emulation library.
1982; http://z80ex.sourceforge.net/
1983
4bd49b80 1984; The S, Z, 5 and 3 bits and the parity of the lookup value
9c15f366
L		 1985
1986.org (PC+255) & 0xff00
1987sz53p_tab:
1988 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1989 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1990 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1991 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1992 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1993 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1994 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1995 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1996 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1997 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1998 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1999 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
2000 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
2001 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
2002 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
2003 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
2004 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
2005 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
2006 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
2007 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
2008 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
2009 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
2010 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
2011 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
2012 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
2013 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
2014 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
2015 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
2016 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
2017 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
2018 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
2019 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
9c15f366 2020
4bd49b80 2021; vim:set ts=8 noet nowrap
CP/M on an AVR