]> cloudbase.mooo.com Git - avrcpm.git/blame - cpm/CFGACPM.LIB
* I2C Support added
[avrcpm.git] / cpm / CFGACPM.LIB
CommitLineData
45a10977
L
1; Configuration and common defs for avrcpm BIOS and IPL\r
2\r
3; Copyright (C) 2010 Leo C.\r
4;\r
5; This program is free software: you can redistribute it and/or modify\r
6; it under the terms of the GNU General Public License as published by\r
7; the Free Software Foundation, either version 3 of the License, or\r
8; (at your option) any later version.\r
9;\r
10; This program is distributed in the hope that it will be useful,\r
11; but WITHOUT ANY WARRANTY; without even the implied warranty of\r
12; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the\r
13; GNU General Public License for more details.\r
14;\r
15; You should have received a copy of the GNU General Public License\r
16; along with this program. If not, see <http://www.gnu.org/licenses/>.\r
17;\r
18; $Id:$\r
19;\r
20\r
21msize equ 62 ;size of available RAM in k\r
22\r
23bias equ (msize-20) * 1024 \r
24ccp equ 3400h+bias ;base of cpm ccp\r
25bdos equ ccp+806h ;base of bdos\r
26bios equ ccp+1600h ;base of bios\r
27cdisk equ 0004h ;current disk number (0 ... 15)\r
28iobyte equ 0003h ;intel iobyte\r
29buff equ 0080h ;default buffer address\r
30retry equ 3 ;max retries on disk i/o before error\r
31\r
d8fa6a36
L
32\r
33;copy from avr/virt_ports.asm:\r
34; Port Direction Function\r
35;hex dez\r
36;-------------------------------------------------------------------------\r
37;00 0 in - Con status. \r
38; Returns 0xFF if the UART has a byte, 0 otherwise.\r
39;01 1 in/out - Console input, aka UDR. / Console Output\r
40;02 2 out - Console Output (deprecated)\r
41;03 3 in - "UART" status: bit 0 = rx, bit 1 = tx\r
42;04 4 in - "UART" data register, no wait\r
43;\r
44;------------------------ Virtual I2C interface --------------------------\r
45;05 5 out - Control Port: 1 = Start read operation\r
46; 2 = Start write operation \r
47;05 5 in - Status of last Transfer: 0 = ok, else fail\r
48;06 6 in/out - Number of bytes to transfer, including Slave address\r
49;07,08 7,8 in/out - Read/Write address low/high\r
50;\r
51;------------------------ Disk I/O ---------------------------------------\r
52;0D,0E 13,14 in/out - Set address of Bios Controll Block\r
53;0F 15 in/out - Disk select\r
54;10,11 16,17 in/out - Track select\r
55;12,13 18,19 in/out - Sector select\r
56;14,15 20,21 in/out - Write addr\r
57; \r
58;16 22 out - Trigger disk i/o operations\r
59; Bit 7 = 1: Read sector\r
60; Bit 6 = 1: Write sector\r
61; Bit 5 = 1: BIOS WBOOT\r
62; Bit 4 = 1: BIOS Home\r
63; Only one of bits 4..7 may be set.\r
64; If Write function (bit 6=1):\r
65; Bits 0..2: 0 - write to allocated\r
66; 1 - write to directory\r
67; 2 - write unallocated\r
68; 3 - write to directory \r
69;\r
70;16 22 in - Result of last read/write operation.\r
71; 0x00 = ok, 0xff = error (--> Bad Sector)\r
72;\r
73;\r
74;\r
75;------------------------ Wall Clock and Timers --------------------------\r
76;40 64-71 in/out - Timer/Clock control. \r
77;41-46\r
78;\r
79;47-4D clock - BCD format: ss, mm, hh, DD, MM, YYl, YYh\r
80;\r
81;------------------------ Ports ------------------------------------------\r
82;80-87 in/out - Port-Expander PCF8574 (max. 8 Chips)\r
83;88-8F in/out - Port-Expander PCF8574A (not implemented yet!)\r
84\r
85\r
45a10977
L
86READ_FUNC equ 7\r
87WRITE_FUNC equ 6\r
88BOOT_FUNC equ 5\r
89HOME_FUNC equ 4\r
90\r
d8fa6a36
L
91TIMERCTL equ 040h\r
92TIMER_MSECS equ TIMERCTL+1\r
93TIMER_SECS equ TIMER_MSECS+2\r
94starttimercmd equ 1\r
95quitTimerCmd equ 2\r
96printTimerCmd equ 15\r
97uptimeCmd equ 16\r
98\r
99CLOCKPORT equ TIMERCTL+7\r
100\r
101DEBUGPORT equ 04FH\r
102StartTraceCmd equ 1\r
103StopTraceCmd equ 0\r
104\r
105\r
106\r
107\r
45a10977 108\r