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Commit | Line | Data |
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64219415 FZ |
1 | ; Virtual Ports for the BIOS Interaction |
2 | ; | |
98979541 | 3 | ; Copyright (C) 2010-2013 Leo C. |
64219415 FZ |
4 | ; |
5 | ; This file is part of avrcpm. | |
6 | ; | |
7 | ; avrcpm is free software: you can redistribute it and/or modify it | |
8 | ; under the terms of the GNU General Public License as published by | |
9 | ; the Free Software Foundation, either version 3 of the License, or | |
10 | ; (at your option) any later version. | |
11 | ; | |
12 | ; avrcpm is distributed in the hope that it will be useful, | |
13 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | ; GNU General Public License for more details. | |
16 | ; | |
17 | ; You should have received a copy of the GNU General Public License | |
18 | ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>. | |
19 | ; | |
20 | ; $Id$ | |
29ce189c L |
21 | ; |
22 | ||
23 | ||
24 | ; | |
25 | ; Port Direction Function | |
26 | ;hex dez | |
27 | ;------------------------------------------------------------------------- | |
e8384f88 | 28 | ;00 0 in - Con status. (deprecated) |
29ce189c L |
29 | ; Returns 0xFF if the UART has a byte, 0 otherwise. |
30 | ;01 1 in/out - Console input, aka UDR. / Console Output | |
31 | ;02 2 out - Console Output (deprecated) | |
e8384f88 L |
32 | ;03 3 in - "UART" status: bit 0 = rx (UARTRXRDY) |
33 | ; bit 1 = tx (UARTTXRDY) | |
34 | ;03 3 out - "UART" control (tbd) | |
35 | ;04 4 in/out - "UART" data register, no wait | |
29ce189c | 36 | ; |
d8fa6a36 L |
37 | ;------------------------ Virtual I2C interface -------------------------- |
38 | ;05 5 out - Control Port: 1 = Start read operation | |
39 | ; 2 = Start write operation | |
40 | ;05 5 in - Status of last Transfer: 0 = ok, else fail | |
41 | ;06 6 in/out - Number of bytes to transfer, including Slave address | |
42 | ;07,08 7,8 in/out - Read/Write address low/high | |
43 | ; | |
44 | ;------------------------ Disk I/O --------------------------------------- | |
29ce189c L |
45 | ;0D,0E 13,14 in/out - Set address of Bios Controll Block |
46 | ;0F 15 in/out - Disk select | |
47 | ;10,11 16,17 in/out - Track select | |
48 | ;12,13 18,19 in/out - Sector select | |
49 | ;14,15 20,21 in/out - Write addr | |
50 | ; | |
51 | ;16 22 out - Trigger disk i/o operations | |
52 | ; Bit 7 = 1: Read sector | |
53 | ; Bit 6 = 1: Write sector | |
54 | ; Bit 5 = 1: BIOS WBOOT | |
55 | ; Bit 4 = 1: BIOS Home | |
56 | ; Only one of bits 4..7 may be set. | |
57 | ; If Write function (bit 6=1): | |
58 | ; Bits 0..2: 0 - write to allocated | |
59 | ; 1 - write to directory | |
60 | ; 2 - write unallocated | |
61 | ; 3 - write to directory | |
62 | ; | |
63 | ;16 22 in - Result of last read/write operation. | |
64 | ; 0x00 = ok, 0xff = error (--> Bad Sector) | |
65 | ; | |
d8fa6a36 | 66 | ; |
98979541 L |
67 | ;------------------------ ADC Interface ---------------------------------- |
68 | ;17-19 23,25 in - ADC Channels 6,7 and 8 (Temp-Sensor) | |
69 | ; ADC 6,7 only Devices in 32 pin Case (TQFP/MLF) | |
70 | ; 8 Bit only | |
71 | ; Fixed ADC clock (FCPU/128, 156KHz at 20MHz CPU) | |
72 | ; Vref = VCC | |
73 | ;20,21 in - ADC: Measure VCC | |
d8fa6a36 L |
74 | ; |
75 | ;------------------------ Wall Clock and Timers -------------------------- | |
5482d75f | 76 | ;40 64-71 in/out - Timer/Clock control. |
fb050095 L |
77 | ;41-46 |
78 | ; | |
d8fa6a36 L |
79 | ;47-4D clock - BCD format: ss, mm, hh, DD, MM, YYl, YYh |
80 | ; | |
98979541 L |
81 | ;4F debug - start/stop trace, print stack, ... |
82 | ; | |
d8fa6a36 L |
83 | ;------------------------ Ports ------------------------------------------ |
84 | ;80-87 in/out - Port-Expander PCF8574 (max. 8 Chips) | |
85 | ;88-8F in/out - Port-Expander PCF8574A (not implemented yet!) | |
29ce189c L |
86 | |
87 | ||
64219415 | 88 | ; ---------------------------------------------- Start of Code Segment |
98979541 | 89 | |
29ce189c L |
90 | .cseg |
91 | vport_tbl: | |
e8384f88 | 92 | .db 00,1 ;Port 0, length, 1 deprecated |
29ce189c L |
93 | .dw conStatus ; in |
94 | .dw dbgOut ; out | |
e8384f88 L |
95 | |
96 | .db UARTDR,1 ;Port UARTDR, length 1 | |
97 | .dw uartgetc ; in | |
98 | .dw uartputc ; out | |
99 | ||
100 | ; .db 02,1 ;Port 2 (old console output) | |
101 | ; .dw uartgetc ; filler | |
102 | ; .dw uartputc ; deprecated | |
103 | ||
104 | .db UARTCSR,1 | |
29ce189c L |
105 | .dw uartstat |
106 | .dw vport_out_dummy | |
e8384f88 | 107 | |
29ce189c L |
108 | .db 04,1 |
109 | .dw uartin | |
110 | .dw uartout | |
111 | ||
fb050095 | 112 | .db 13,9 ; Port 13-21, (length 9) |
5482d75f L |
113 | .dw dsk_param_get |
114 | .dw dsk_param_set | |
29ce189c L |
115 | .db 22,1 |
116 | .dw dskErrorRet | |
117 | .dw dskDoIt | |
118 | ||
119 | .db TIMERPORT,7 | |
fb050095 L |
120 | .dw utimeget |
121 | .dw utimeput | |
122 | ||
d8fa6a36 | 123 | .db CLOCKPORT,7 ;Clock format (bcd): ss, mm, hh, DD, MM, YYl, YYh |
29ce189c L |
124 | .dw clockget |
125 | .dw clockput | |
80e1fa71 L |
126 | |
127 | .db DEBUGPORT,1 | |
128 | .dw dbg_stat | |
129 | .dw dbg_ctrl | |
d8fa6a36 | 130 | |
825ecc9d | 131 | #if I2C_SUPPORT |
d8fa6a36 L |
132 | .db I2CCTRL,1 |
133 | .dw vi2c_stat_get | |
134 | .dw vi2c_ctrl | |
135 | ||
136 | .db I2CBLEN,3 ; | |
137 | .dw vi2c_param_get | |
138 | .dw vi2c_param_set | |
139 | ||
140 | .db PORT,8 | |
141 | .dw pcf8574_in | |
142 | .dw pcf8574_out | |
143 | #endif | |
98979541 L |
144 | #if ADC_SUPPORT |
145 | .db ADC80,3 ;2 Channels ADC80 ADC81 + Temp Sensor | |
146 | .dw adc_read8 | |
147 | .dw vport_out_dummy | |
d8fa6a36 | 148 | |
98979541 L |
149 | .db 0x20,2 ; |
150 | .dw adc_readvcc | |
151 | .dw vport_out_dummy | |
152 | #endif | |
29ce189c L |
153 | .db 0,0 ; Stop mark |
154 | ||
155 | ;--------------------------------------------------------------------- | |
156 | ||
157 | ;Called with port in temp2 and value in temp. | |
158 | portWrite: | |
159 | set | |
160 | rjmp vprw_start | |
161 | ||
162 | ;Called with port in temp2. Should return value in temp. | |
163 | portRead: | |
164 | clt | |
165 | ||
166 | vprw_start: | |
e7a0f403 L |
167 | push yh |
168 | push yl | |
29ce189c L |
169 | .if PORT_DEBUG > 1 |
170 | tst temp2 | |
171 | brne dvp_1 ;don't debug console status | |
172 | brts dvp_1 | |
173 | rjmp conStatus | |
174 | dvp_1: | |
175 | printnewline | |
176 | brts dvp_11 | |
177 | printstring "Port In: " | |
178 | rjmp dvp_12 | |
179 | dvp_11: | |
180 | printstring "Port Out: " | |
181 | dvp_12: | |
182 | push temp | |
183 | mov temp,temp2 | |
184 | rcall printhex | |
185 | pop temp | |
186 | .endif | |
187 | ldiw z,vport_tbl*2 | |
188 | ||
189 | vprw_loop: | |
190 | lpm _tmp0,z+ | |
825ecc9d L |
191 | lpm _tmp1,z+ ;length |
192 | cp _tmp1,_0 | |
29ce189c L |
193 | breq vprw_exit ;no more ports |
194 | ||
195 | mov temp3,temp2 | |
196 | sub temp3,_tmp0 ;base port | |
197 | brcs vprw_next ;port # too high | |
825ecc9d | 198 | cp temp3,_tmp1 ;may be in range |
29ce189c L |
199 | brcs vprw_found ; |
200 | vprw_next: ;port # not in range, test next block. | |
201 | adiw z,4 | |
202 | rjmp vprw_loop | |
203 | vprw_found: | |
d8fa6a36 L |
204 | brtc PC+2 ;read or write? |
205 | adiw z,2 ;skip read function pointer | |
29ce189c | 206 | lpm _tmp0,z+ |
825ecc9d L |
207 | lpm zh,z |
208 | mov zl,_tmp0 | |
29ce189c L |
209 | |
210 | .if PORT_DEBUG > 1 | |
211 | push temp2 | |
212 | push temp | |
213 | printstring ", exec: " | |
214 | movw temp,z | |
215 | rcall printhexw | |
216 | printstring ", rel port: " | |
217 | mov temp,temp3 | |
218 | rcall printhex | |
219 | pop temp | |
220 | pop temp2 | |
221 | printstring ", val: " | |
222 | brts dvp_2 | |
223 | icall | |
224 | rcall printhex | |
225 | printstring " " | |
e7a0f403 L |
226 | pop yl |
227 | pop yh | |
29ce189c L |
228 | ret |
229 | dvp_2: | |
230 | rcall printhex | |
231 | printstring " " | |
e7a0f403 L |
232 | ; relative port # in temp3 |
233 | icall | |
234 | pop yl | |
235 | pop yh | |
236 | ret | |
29ce189c | 237 | .else |
e7a0f403 L |
238 | icall |
239 | pop yl | |
240 | pop yh | |
241 | ret | |
29ce189c L |
242 | .endif |
243 | ||
244 | vprw_exit: | |
245 | ; trap for nonexistent port? | |
246 | .if PORT_DEBUG > 1 | |
247 | printstring ", not found!" | |
248 | .endif | |
29ce189c | 249 | ldi temp,0xff |
e7a0f403 L |
250 | pop yl |
251 | pop yh | |
29ce189c | 252 | ret |
825ecc9d L |
253 | |
254 | vport_out_dummy: | |
255 | ret | |
29ce189c | 256 | |
e8384f88 L |
257 | ;--------------------------------------------------------------------- |
258 | ||
64219415 FZ |
259 | uartstat: |
260 | clr temp | |
261 | lds temp2,rxcount | |
262 | cpse temp2,_0 | |
e8384f88 | 263 | sbr temp,UARTRXRDY |
64219415 FZ |
264 | lds temp2,txcount |
265 | cpi temp2,TXBUFSIZE | |
266 | breq uartst_1 | |
e8384f88 | 267 | sbr temp,UARTTXRDY |
64219415 FZ |
268 | uartst_1: |
269 | ret | |
270 | ||
29ce189c L |
271 | uartin: |
272 | clr temp | |
273 | lds temp2,rxcount | |
274 | cpse temp2,_0 | |
08716d4f | 275 | ljmp uartgetc |
29ce189c L |
276 | ret |
277 | ||
64219415 FZ |
278 | uartout: |
279 | lds temp2,txcount | |
280 | cpi temp2,TXBUFSIZE | |
281 | breq uartout_1 | |
08716d4f | 282 | ljmp uartputc |
64219415 FZ |
283 | uartout_1: |
284 | ret | |
285 | ||
29ce189c | 286 | |
64219415 FZ |
287 | conStatus: |
288 | lds temp,rxcount | |
289 | cpse temp,_0 | |
290 | ldi temp,0xff | |
291 | ret | |
292 | ||
64219415 FZ |
293 | |
294 | dbgOut: | |
295 | printnewline | |
296 | printstring "Debug: " | |
08716d4f | 297 | lcall printhex |
64219415 FZ |
298 | ret |
299 | ||
80e1fa71 L |
300 | dbg_stat: |
301 | ldi temp,0 | |
302 | ret | |
303 | ||
304 | dbg_ctrl: | |
305 | bmov intstat,i_trace, temp,0 | |
98979541 L |
306 | .if SRAM_FILL |
307 | sbrc temp,1 | |
308 | lcall stackusage_print | |
309 | .endif | |
80e1fa71 L |
310 | ret |
311 | ||
312 | ||
313 | ||
64219415 | 314 | ;--------------------------------------------------------------------- |
29ce189c L |
315 | ; vim:set ts=8 noet nowrap |
316 |