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1; 8080 Interpreter.
2; This is part of the Z80-CP/M emulator written by Sprite_tm.
3;
4
5; Copyright (C) 2010 Sprite_tm
6; Copyright (C) 2010 Leo C.
7; Copyright (C) 2010 Horst S.
8
9; This file is part of avrcpm.
10;
11; avrcpm is free software: you can redistribute it and/or modify it
12; under the terms of the GNU General Public License as published by
13; the Free Software Foundation, either version 3 of the License, or
14; (at your option) any later version.
15;
16; avrcpm is distributed in the hope that it will be useful,
17; but WITHOUT ANY WARRANTY; without even the implied warranty of
18; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19; GNU General Public License for more details.
20;
21; You should have received a copy of the GNU General Public License
22; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
23;
24; $Id$
25;
26
27 .dseg
28
29z_b: .byte 1
30z_c: .byte 1
31z_d: .byte 1
32z_e: .byte 1
33z_h: .byte 1
34z_l: .byte 1
35
36
37 .cseg
38
39;Init z80
40z80_init:
41 ldi z_pcl,low (IPLADDR)
42 ldi z_pch,high(IPLADDR)
43
44 cbi flags,trace
45 printnewline
46 printstring "Ok, CPU is live!"
47 printnewline
48
49main:
50.if INS_DEBUG
51 cbi flags,trace
52 cpi z_pch,DBG_TRACE_BOTTOM
53 brlo notraceon
54 cpi z_pch,DBG_TRACE_TOP
55 brsh notraceon
56 sbi flags,trace
57notraceon:
58.endif
59
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60.if PRINT_PC
61 cpi z_pch,DBG_TRACE_BOTTOM
62 brlo noprintpc
63 cpi z_pch,DBG_TRACE_TOP
64 brsh noprintpc
65
66 printnewline
67 printstring "PC="
68 movw temp,z_pcl
69 rcall printhexw
70 printstring " "
71noprintpc:
72.endif
73
74.if INS_DEBUG
75 sbic flags,trace
76 rcall printregs
77.endif
9c15f366 78
f24b3c79 79 ;hier kommt die Interruptbehandlung rein
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80
81 mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
82 adiw z_pcl,1 ;++z_pc
83 ldi zh,high(opcjmp) ;
84 icall
85 rjmp main ;
86
87
f24b3c79 88 .listmac
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89
90;--------------------------------------------------
91; Generate a table entry for one instruction
92;
93; instr fetch, op, store
94;
95.macro instr
96 .ifndef opcjmp_table_pos_
97 .set todo_table_pos_ = PC
98 ; Place the opcode jump table on the next available location.
99 .equ opcjmp = (PC+255) & 0xff00
100 .set opcjmp_table_pos_ = opcjmp
101 .endif
102
103 .if todo_table_pos_ < opcjmp + 256 + 128
104 .if todo_table_pos_ + 3 >= opcjmp
105 .set todo_table_pos_ = opcjmp + 256 + 128
106 .endif
107 .endif
9c15f366 108
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109 .set fetch_ = (@0 != do_fetch_nop) ; must call or jump to fetch phase
110 .set op_ = (do_@1 != do_op_nop) ; must call or jump to op phase
111 .set store_ = (@2 != do_store_nop) ; must jump to store phase
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112 .set cnt_ = fetch_ + op_ + store_
113
114 .set do_@0_@1_@2 = todo_table_pos_ ; make a label
115
116 .org opcjmp_table_pos_
117 .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
118
119 .if cnt_ == 0 ; nothing to do (nop)
120 ret ; go back to main
121 .endif
122
123 .if cnt_ == 1 ; jump direct to action
124 .if fetch_ ;
125 rjmp @0 ;
126 .endif
127 .if op_
128 rjmp do_@1 ; do op and return to main
129 .endif
130 .if store_ ;
131 rjmp @2 ;
132 .endif
133 .endif
134
135 ; two or tree actions
136 .if cnt_ >= 2 ; jump direct to action
137 rjmp do_@0_@1_@2 ; generate a jump to action table
138
139 .org do_@0_@1_@2
140
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141 .if fetch_ ; must fetch
142 .if op_ || store_
143 rcall @0 ; fetch and come back here
144 .else ;
145 rjmp @0 ; fetch and return to main
146 .endif
147 .endif
148 .if op_ ; must exec op
149 .if store_
150 rcall do_@1 ; do op and come back here
151 .else
152 rjmp do_@1 ; do op and return to main
153 .endif
154 .endif
155 .if store_ ; must store
156 rjmp @2 ; store is allways last
157 .endif
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158
159 .set todo_table_pos_ = PC
160
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161 .endif
162
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163.endm
164
165
166; ------------ Fetch phase stuff -----------------
167
168;.org (PC+255) & 0xff00
169fetch_ops:
170do_fetch_nop:
171 ret
172
173do_fetch_a:
174 mov opl,z_a
175 ret
176
177do_fetch_b:
178 lds opl,z_b
179 ret
180
181do_fetch_c:
182 lds opl,z_c
183 ret
184
185do_fetch_d:
186 lds opl,z_d
187 ret
188
189do_fetch_e:
190 lds opl,z_e
191 ret
192
193do_fetch_h:
194 lds opl,z_h
195 ret
196
197do_fetch_l:
198 lds opl,z_l
199 ret
200
201do_fetch_af:
202 mov opl,z_flags
203 mov oph,z_a
204 ret
205
206do_fetch_bc:
207 lds opl,z_c
208 lds oph,z_b
209 ret
210
211do_fetch_de:
212 lds opl,z_e
213 lds oph,z_d
214 ret
215
216do_fetch_hl:
217 lds opl,z_l
218 lds oph,z_h
219 ret
220
221do_fetch_sp:
222 movw opl,z_spl
223 ret
224
225do_fetch_mbc:
226 lds xh,z_b
227 lds xl,z_c
f24b3c79 228 mem_read_d z_a
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229 ret
230
231do_fetch_mde:
232 lds xh,z_d
233 lds xl,z_e
f24b3c79 234 mem_read_d z_a
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235 ret
236
237do_fetch_mhl:
238 lds xh,z_h
239 lds xl,z_l
240 mem_read_d opl
241 ret
242
243do_fetch_msp:
244 movw x,z_spl
245 mem_read_d opl
246 adiw x,1
247 mem_read_d oph
248 ret
249
250do_fetch_dir8:
251 mem_read_ds opl, z_pc
252 adiw z_pcl,1
253 ret
254
255do_fetch_dir16:
256 mem_read_ds opl, z_pc
257 adiw z_pcl,1
258 mem_read_ds oph, z_pc
259 adiw z_pcl,1
260 ret
261
262do_fetch_rst:
263 movw x,z_pcl
264 sbiw x,1
265 mem_read_d opl
266 andi opl,0x38
267 ldi oph,0
268 ret
269
270; ------------ Store phase stuff -----------------
271
272;.org (PC+255) & 0xff00
273store_ops:
274do_store_nop:
275 ret
276
277do_store_a:
278 mov z_a,opl
279 ret
280
281do_store_b:
282 sts z_b,opl
283 ret
284
285do_store_c:
286 sts z_c,opl
287 ret
288
289do_store_d:
290 sts z_d,opl
291 ret
292
293do_store_e:
294 sts z_e,opl
295 ret
296
297do_store_h:
298 sts z_h,opl
299 ret
300
301do_store_l:
302 sts z_l,opl
303 ret
304
305do_store_af:
306 mov z_a,oph
307 mov z_flags,opl
308 ret
309
310do_store_bc:
311 sts z_b,oph
312 sts z_c,opl
313 ret
314
315do_store_de:
316 sts z_d,oph
317 sts z_e,opl
318 ret
319
320do_store_hl:
321 sts z_h,oph
322 sts z_l,opl
323 ret
324
325do_store_mbc:
326 lds xh,z_b
327 lds xl,z_c
f24b3c79 328 mem_write_s z_a
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329 ret
330
331do_store_mde:
332 lds xh,z_d
333 lds xl,z_e
f24b3c79 334 mem_write_s z_a
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335 ret
336
337do_store_mhl:
338 lds xh,z_h
339 lds xl,z_l
340 mem_write_s opl
341 ret
342
343do_store_msp:
344 movw xl,z_spl
345 mem_write_s opl
346 adiw xl,1
347 mem_write_s oph
348 ret
349
350do_store_sp:
351 movw z_spl,opl
352 ret
353
354do_store_pc:
355 movw z_pcl,opl
356 ret
357
358do_store_ret:
359 movw x,z_spl
360 mem_read_d z_pcl
361 adiw x,1
362 mem_read_d z_pch
363 adiw x,1
364 movw z_spl,x
365
366.if STACK_DBG
367 printnewline
368 printstring "Stack pop "
369 movw temp,z_pcl
370 rcall printhexw
371 printstring ", SP is now "
372 movw temp,z_spl
373 rcall printhexw
374 printstring ". "
375.endif
376 ret
377
378do_store_call:
379 movw xl,z_spl
380 sbiw x,1
381 mem_write_s z_pch
382 sbiw x,1
383 mem_write_s z_pcl
384 movw z_spl,xl
385
386.if STACK_DBG
387 printnewline
388 printstring "Stack push "
389 movw temp,z_pcl
390 rcall printhexw
391 printstring ", SP is now "
392 movw temp,z_spl
393 rcall printhexw
394 printstring ". "
395.endif
396 movw z_pcl,opl
397 ret
398
399
400do_store_am:
401 mem_write_ds op, z_a
402 ret
403
404
405
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406; ------------ Operation phase stuff -----------------
407
408;----------------------------------------------------------------
409;| |
410;| Zilog |
411;| |
412;| ZZZZZZZ 88888 000 |
413;| Z 8 8 0 0 |
414;| Z 8 8 0 0 0 |
415;| Z 88888 0 0 0 |
416;| Z 8 8 0 0 0 |
417;| Z 8 8 0 0 |
418;| ZZZZZZZ 88888 000 |
419;| |
420;| Z80 MICROPROCESSOR Instruction Set Summary |
421;| |
422;----------------------------------------------------------------
423;----------------------------------------------------------------
424;|Mnemonic |SZHPNC|Description |Notes |
425;|----------+------+---------------------+----------------------|
426;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
427;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
428;|ADD A,s |***V0*|Add |A=A+s |
429;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
430;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
431;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
432;|AND s |**1P00|Logical AND |A=A&s |
433;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
434;|CALL cc,nn|------|Conditional Call |If cc CALL |
435;|CALL nn |------|Unconditional Call |-[SP]=PC,PC=nn |
436;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
437;|CP s |***V1*|Compare |A-s |
438;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
439;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
440;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
441;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
442;|CPL |--1-1-|Complement |A=~A |
443;|DAA |***P-*|Decimal Adjust Acc. |A=BCD format |
444;|DEC s |***V1-|Decrement |s=s-1 |
445;|DEC xx |------|Decrement |xx=xx-1 |
446;|DEC ss |------|Decrement |ss=ss-1 |
447;|DI |------|Disable Interrupts | |
448;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
449;|EI |------|Enable Interrupts | |
450;|EX [SP],HL|------|Exchange |[SP]<->HL |
451;|EX [SP],xx|------|Exchange |[SP]<->xx |
452;|EX AF,AF' |------|Exchange |AF<->AF' |
453;|EX DE,HL |------|Exchange |DE<->HL |
454;|EXX |------|Exchange |qq<->qq' (except AF)|
455;|HALT |------|Halt | |
456;|IM n |------|Interrupt Mode | (n=0,1,2)|
457;|IN A,[n] |------|Input |A=[n] |
458;|IN r,[C] |***P0-|Input |r=[C] |
459;|INC r |***V0-|Increment |r=r+1 |
460;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
461;|INC xx |------|Increment |xx=xx+1 |
462;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
463;|INC ss |------|Increment |ss=ss+1 |
464;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
465;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
466;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
467;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
468;|JP [HL] |------|Unconditional Jump |PC=[HL] |
469;|JP [xx] |------|Unconditional Jump |PC=[xx] |
470;|JP nn |------|Unconditional Jump |PC=nn |
471;|JP cc,nn |------|Conditional Jump |If cc JP |
472;|JR e |------|Unconditional Jump |PC=PC+e |
473;|JR cc,e |------|Conditional Jump |If cc JR(cc=C,NC,NZ,Z)|
474;|LD dst,src|------|Load |dst=src |
475;|LD A,i |**0*0-|Load |A=i (i=I,R)|
476;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
477;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
478;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
479;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
480;|NEG |***V1*|Negate |A=-A |
481;|NOP |------|No Operation | |
482;|OR s |**0P00|Logical inclusive OR |A=Avs |
483;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
484;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
485;|OUT [C],r |------|Output |[C]=r |
486;|OUT [n],A |------|Output |[n]=A |
487;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
488;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
489;|POP xx |------|Pop |xx=[SP]+ |
490;|POP qq |------|Pop |qq=[SP]+ |
491;|PUSH xx |------|Push |-[SP]=xx |
492;|PUSH qq |------|Push |-[SP]=qq |
493;|RES b,m |------|Reset bit |m=m&{~2^b} |
494;|RET |------|Return |PC=[SP]+ |
495;|RET cc |------|Conditional Return |If cc RET |
496;|RETI |------|Return from Interrupt|PC=[SP]+ |
497;|RETN |------|Return from NMI |PC=[SP]+ |
498;|RL m |**0P0*|Rotate Left |m={CY,m}<- |
499;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
500;|RLC m |**0P0*|Rotate Left Circular |m=m<- |
501;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
502;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
503;|RR m |**0P0*|Rotate Right |m=->{CY,m} |
504;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
505;|RRC m |**0P0*|Rotate Right Circular|m=->m |
506;|RRCA |--0-0*|Rotate Right Circular|A=->A |
507;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
508;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
509;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
510;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
511;|SCF |--0-01|Set Carry Flag |CY=1 |
512;|SET b,m |------|Set bit |m=mv{2^b} |
513;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
514;|SRA m |**0P0*|Shift Right Arith. |m=m/2 |
515;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} |
516;|SUB s |***V1*|Subtract |A=A-s |
517;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
518;|----------+------+--------------------------------------------|
519;| F |-*01? |Flag unaffected/affected/reset/set/unknown |
520;| S |S |Sign flag (Bit 7) |
521;| Z | Z |Zero flag (Bit 6) |
522;| HC | H |Half Carry flag (Bit 4) |
523;| P/V | P |Parity/Overflow flag (Bit 2, V=overflow) |
524;| N | N |Add/Subtract flag (Bit 1) |
525;| CY | C|Carry flag (Bit 0) |
526;|-----------------+--------------------------------------------|
527;| n |Immediate addressing |
528;| nn |Immediate extended addressing |
529;| e |Relative addressing (PC=PC+2+offset) |
530;| [nn] |Extended addressing |
531;| [xx+d] |Indexed addressing |
532;| r |Register addressing |
533;| [rr] |Register indirect addressing |
534;| |Implied addressing |
535;| b |Bit addressing |
536;| p |Modified page zero addressing (see RST) |
537;|-----------------+--------------------------------------------|
538;|DEFB n(,...) |Define Byte(s) |
539;|DEFB 'str'(,...) |Define Byte ASCII string(s) |
540;|DEFS nn |Define Storage Block |
541;|DEFW nn(,...) |Define Word(s) |
542;|-----------------+--------------------------------------------|
543;| A B C D E |Registers (8-bit) |
544;| AF BC DE HL |Register pairs (16-bit) |
545;| F |Flag register (8-bit) |
546;| I |Interrupt page address register (8-bit) |
547;| IX IY |Index registers (16-bit) |
548;| PC |Program Counter register (16-bit) |
549;| R |Memory Refresh register |
550;| SP |Stack Pointer register (16-bit) |
551;|-----------------+--------------------------------------------|
552;| b |One bit (0 to 7) |
553;| cc |Condition (C,M,NC,NZ,P,PE,PO,Z) |
554;| d |One-byte expression (-128 to +127) |
555;| dst |Destination s, ss, [BC], [DE], [HL], [nn] |
556;| e |One-byte expression (-126 to +129) |
557;| m |Any register r, [HL] or [xx+d] |
558;| n |One-byte expression (0 to 255) |
559;| nn |Two-byte expression (0 to 65535) |
560;| pp |Register pair BC, DE, IX or SP |
561;| qq |Register pair AF, BC, DE or HL |
562;| qq' |Alternative register pair AF, BC, DE or HL |
563;| r |Register A, B, C, D, E, H or L |
564;| rr |Register pair BC, DE, IY or SP |
565;| s |Any register r, value n, [HL] or [xx+d] |
566;| src |Source s, ss, [BC], [DE], [HL], nn, [nn] |
567;| ss |Register pair BC, DE, HL or SP |
568;| xx |Index register IX or IY |
569;|-----------------+--------------------------------------------|
570;| + - * / ^ |Add/subtract/multiply/divide/exponent |
571;| & ~ v x |Logical AND/NOT/inclusive OR/exclusive OR |
572;| <- -> |Rotate left/right |
573;| [ ] |Indirect addressing |
574;| [ ]+ -[ ] |Indirect addressing auto-increment/decrement|
575;| { } |Combination of operands |
576;| # |Also BC=BC-1,DE=DE-1 |
577;| ## |Only lower 4 bits of accumulator A used |
578;----------------------------------------------------------------
579
580;How the flags are supposed to work:
581;7 ZFL_S - Sign flag (=MSBit of result)
582;6 ZFL_Z - Zero flag. Is 1 when the result is 0
583;4 ZFL_H - Half-carry (carry from bit 3 to 4)
584;2 ZFL_P - Parity/2-complement Overflow
585;1 ZFL_N - Subtract - set if last op was a subtract
586;0 ZFL_C - Carry
587;
588;I sure hope I got the mapping between flags and instructions correct...
589
590.equ ZFL_S = 7
591.equ ZFL_Z = 6
592.equ ZFL_H = 4
593.equ ZFL_P = 2
594.equ ZFL_N = 1
595.equ ZFL_C = 0
596
597
598.equ AVR_T = SREG_T
599.equ AVR_H = SREG_H
600.equ AVR_S = SREG_S
601.equ AVR_V = SREG_V
602.equ AVR_N = SREG_N
603.equ AVR_Z = SREG_Z
604.equ AVR_C = SREG_C
605
606;------------------------------------------------;
607; Load table value from flash indexed by source reg.
608;
609; ldpmx dstreg,tablebase,indexreg
610;
611; (6 words, 8 cycles)
612
613.macro ldpmx
614 ldi zh,high(@1*2) ; table must be page aligned
615 mov zl,@2
616 lpm @0,z
617.endm
618
f24b3c79 619.macro do_z80_flags_V
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620#if EM_Z80
621 bmov z_flags, ZFL_P, temp, AVR_V
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622#endif
623.endm
624
625.macro do_z80_flags_set_N
626#if EM_Z80
627 ori z_flags, (1<<ZFL_N) ; Negation auf 1
628#endif
629.endm
630
631.macro do_z80_flags_set_HN
632#if EM_Z80
633 ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
634#endif
635.endm
636
637.macro do_z80_flags_clear_N
638#if EM_Z80
639 andi z_flags,~(1<<ZFL_N)
640#endif
641.endm
642
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643.macro do_z80_flags_clear_HN
644#if EM_Z80
645 andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
646#endif
647.endm
648
649
650.macro do_z80_flags_copy_HC
651#if EM_Z80
652 bmov z_flags, ZFL_H, z_flags, ZFL_H
653#endif
654.endm
655
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656.macro do_z80_flags_op_rotate
657 ; must not change avr carry flag!
658#if EM_Z80
659 andi z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
660#else
661 andi z_flags, ~( (1<<ZFL_C) )
662#endif
663.endm
664
665.macro do_z80_flags_op_and
666#if EM_Z80
667 ori z_flags,(1<<ZFL_H)
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668#endif
669.endm
670
671.macro do_z80_flags_op_or
672#if EM_Z80
f24b3c79 673 ;nothing to do
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674#endif
675.endm
676
677
678;----------------------------------------------------------------
679
680do_op_inv:
681 sbiw z_pcl,1
b741422e 682 lcall printregs
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683 printstring "Invalid opcode! "
684
685haltinv:
686 rjmp haltinv
687
688do_op_nop:
689 ret
690
691;----------------------------------------------------------------
692;|Mnemonic |SZHPNC|Description |Notes |
693;----------------------------------------------------------------
694;|OUT [n],A |------|Output |[n]=A |
695;
696;
697;Interface with peripherials goes here :)
698do_op_outa: ; out (opl),a
699.if PORT_DEBUG
700 printnewline
701 printstring "Port write: "
702 mov temp,z_a
703 rcall printhex
704 printstring " -> ("
705 mov temp,opl
706 rcall printhex
707 printstring ") "
708.endif
709 mov temp,z_a
710 mov temp2,opl
eb85ce65 711 lcall portWrite
9c15f366
L
712 ret
713
714;----------------------------------------------------------------
715;|Mnemonic |SZHPNC|Description |Notes |
716;----------------------------------------------------------------
717;|IN A,[n] |------|Input |A=[n] |
718;
719;
720do_op_in: ; in a,(opl)
721.if PORT_DEBUG
722 printnewline
723 printstring "Port read: ("
724 mov temp,opl
725 rcall printhex
726 printstring ") -> "
727.endif
728
729 mov temp2,opl
a5b2e36e 730 lcall portRead
9c15f366
L
731 mov opl,temp
732
733.if PORT_DEBUG
734 rcall printhex
735 printstring " "
736.endif
737 ret
738
739;----------------------------------------------------------------
740;|Mnemonic |SZHPNC|Description |Notes |
741;----------------------------------------------------------------
742;|INC r |***V0-|Increment |r=r+1 |
743;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
744;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
745;|----------|SZHP C|---------- 8080 ----------------------------|
746;|INC r |**-P0-|Increment |r=r+1 |
747;|INC [HL] |**-P0-|Increment |[HL]=[HL]+1 |
748;
749;
750do_op_inc:
f24b3c79
L
751 ldi temp,1
752 add opl,temp
9c15f366 753 in temp, sreg
f24b3c79 754 andi z_flags,(1<<ZFL_C) ; preserve C-flag
9c15f366 755 ldpmx temp2, sz53p_tab, opl
f24b3c79
L
756 or z_flags,temp2 ;
757 bmov z_flags, ZFL_H, temp, AVR_H
758 do_z80_flags_V
9c15f366
L
759 ret
760
761do_op_inca:
f24b3c79
L
762 ldi temp,1
763 add z_a,temp
9c15f366 764 in temp, sreg
f24b3c79 765 andi z_flags,(1<<ZFL_C) ; preserve C-flag
9c15f366 766 ldpmx temp2, sz53p_tab, z_a
f24b3c79
L
767 or z_flags,temp2 ;
768 bmov z_flags, ZFL_H, temp, AVR_H
769 do_z80_flags_V
9c15f366
L
770 ret
771
772;----------------------------------------------------------------
773;|Mnemonic |SZHPNC|Description |Notes |
774;----------------------------------------------------------------
775;|DEC r |***V1-|Decrement |s=s-1 |
776;|INC [HL] |***V0-|Increment |[HL]=[HL]+1 |
777;|INC [xx+d]|***V0-|Increment |[xx+d]=[xx+d]+1 |
778;|----------|SZHP C|---------- 8080 ----------------------------|
779;|DEC r |**-P -|Increment |r=r+1 |
780;|DEC [HL] |**-P -|Increment |[HL]=[HL]+1 |
781;
782;
783do_op_dec:
f24b3c79 784 subi opl,1
9c15f366 785 in temp, sreg
f24b3c79 786 andi z_flags,(1<<ZFL_C) ; preserve C-flag
9c15f366
L
787 ldpmx temp2, sz53p_tab, opl
788 or z_flags,temp2 ;
f24b3c79
L
789 bmov z_flags, ZFL_H, temp, AVR_H
790 do_z80_flags_V
9c15f366
L
791 do_z80_flags_set_N
792 ret
793
794do_op_deca:
f24b3c79
L
795 ldi opl,1
796 sub z_a,opl
9c15f366 797 in temp, sreg
f24b3c79 798 andi z_flags,(1<<ZFL_C) ; preserve C-flag
9c15f366
L
799 ldpmx temp2, sz53p_tab, z_a
800 or z_flags,temp2 ;
f24b3c79
L
801 bmov z_flags, ZFL_H, temp, AVR_H
802 do_z80_flags_V
9c15f366
L
803 do_z80_flags_set_N
804 ret
805
806;----------------------------------------------------------------
807;|Mnemonic |SZHPNC|Description |Notes |
808;----------------------------------------------------------------
809;|INC xx |------|Increment |xx=xx+1 |
810;|INC ss |------|Increment |ss=ss+1 |
811;
812;
813do_op_inc16:
814 subi opl,low(-1)
815 sbci oph,high(-1)
816 ret
817
818;----------------------------------------------------------------
819;|Mnemonic |SZHPNC|Description |Notes |
820;----------------------------------------------------------------
821;|DEC xx |------|Decrement |xx=xx-1 |
822;|DEC ss |------|Decrement |ss=ss-1 |
823;
824;
825do_op_dec16:
826 subi opl, 1
827 sbci oph, 0
828 ret
829
830;----------------------------------------------------------------
831;|Mnemonic |SZHPNC|Description |Notes |
832;----------------------------------------------------------------
833;|RLCA |--0-0*|Rotate Left Circular |A=A<- |
834;|----------|SZHP C|---------- 8080 ----------------------------|
835;|RLCA |---- *|Rotate Left Circular |A=A<- |
836;
837;
f24b3c79 838do_op_rlca:
9c15f366
L
839 ;Rotate Left Cyclical. All bits move 1 to the
840 ;left, the msb becomes c and lsb.
841 do_z80_flags_op_rotate
f24b3c79
L
842 lsl z_a
843 brcc do_op_rlc_noc
844 ldi temp,1
845 or z_a,temp
846 ori z_flags, (1<<ZFL_C)
9c15f366
L
847do_op_rlc_noc:
848 ret
849
850;----------------------------------------------------------------
851;|Mnemonic |SZHPNC|Description |Notes |
852;----------------------------------------------------------------
853;|RRCA |--0-0*|Rotate Right Circular|A=->A |
854;|----------|SZHP C|---------- 8080 ----------------------------|
855;|RRCA |---- *|Rotate Right Circular|A=->A |
856;
857;
f24b3c79 858do_op_rrca:
9c15f366
L
859 ;Rotate Right Cyclical. All bits move 1 to the
860 ;right, the lsb becomes c and msb.
861 do_z80_flags_op_rotate
f24b3c79
L
862 lsr z_a
863 brcc do_op_rrc_noc
864 ldi temp,0x80
865 or z_a,temp
866 ori z_flags, (1<<ZFL_C)
9c15f366
L
867do_op_rrc_noc:
868 ret
869
870;----------------------------------------------------------------
871;|Mnemonic |SZHPNC|Description |Notes |
872;----------------------------------------------------------------
873;|RRA |--0-0*|Rotate Right Acc. |A=->{CY,A} |
874;|----------|SZHP C|---------- 8080 ----------------------------|
875;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
876;
877;
f24b3c79 878do_op_rra:
9c15f366
L
879 ;Rotate Right. All bits move 1 to the right, the lsb
880 ;becomes c, c becomes msb.
881 clc ; get z80 carry to avr carry
882 sbrc z_flags,ZFL_C
883 sec
884 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
f24b3c79
L
885 bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
886 ror z_a
9c15f366
L
887 ret
888
889;----------------------------------------------------------------
890;|Mnemonic |SZHPNC|Description |Notes |
891;----------------------------------------------------------------
892;|RLA |--0-0*|Rotate Left Acc. |A={CY,A}<- |
893;|----------|SZHP C|---------- 8080 ----------------------------|
894;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
895;
896;
f24b3c79 897do_op_rla:
9c15f366
L
898 ;Rotate Left. All bits move 1 to the left, the msb
899 ;becomes c, c becomes lsb.
900 clc
901 sbrc z_flags,ZFL_C
902 sec
903 do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
f24b3c79
L
904 bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
905 rol z_a
9c15f366
L
906 ret
907
908;----------------------------------------------------------------
909;|Mnemonic |SZHPNC|Description |Notes |
910;----------------------------------------------------------------
911;|ADD A,s |***V0*|Add |A=A+s |
912;|----------|SZHP C|---------- 8080 ----------------------------|
913;|ADD A,s |***P *|Add |A=A+s |
914;
915;
916do_op_adda:
917 add z_a,opl
918 in temp,sreg
919 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
920 bmov z_flags,ZFL_C, temp,AVR_C
f24b3c79
L
921 bmov z_flags,ZFL_H, temp,AVR_H
922 do_z80_flags_V
9c15f366
L
923 ret
924
925;----------------------------------------------------------------
926;|Mnemonic |SZHPNC|Description |Notes |
927;----------------------------------------------------------------
928;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
929;|----------|SZHP C|---------- 8080 ----------------------------|
930;|ADC A,s |***P *|Add with Carry |A=A+s+CY |
931;
932;
933do_op_adca:
934 clc
935 sbrc z_flags,ZFL_C
936 sec
937 adc z_a,opl
938 in temp,sreg
939 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
940 bmov z_flags,ZFL_C, temp,AVR_C
f24b3c79
L
941 bmov z_flags,ZFL_H, temp,AVR_H
942 do_z80_flags_V
9c15f366
L
943 ret
944
945;----------------------------------------------------------------
946;|Mnemonic |SZHPNC|Description |Notes |
947;----------------------------------------------------------------
948;|SUB s |***V1*|Subtract |A=A-s |
949;|----------|SZHP C|---------- 8080 ----------------------------|
950;|SUB s |***P *|Subtract |A=A-s |
951
952;
953do_op_subfa:
954 sub z_a,opl
955 in temp,sreg
956 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
957 bmov z_flags,ZFL_C, temp,AVR_C
f24b3c79
L
958 bmov z_flags,ZFL_H, temp,AVR_H
959 do_z80_flags_V
9c15f366
L
960 do_z80_flags_set_N
961 ret
962
963;----------------------------------------------------------------
964;|Mnemonic |SZHPNC|Description |Notes |
965;----------------------------------------------------------------
966;|CP s |***V1*|Compare |A-s |
967;|----------|SZHP C|---------- 8080 ----------------------------|
968;|CP s |***P *|Compare |A-s |
969
970;
971do_op_cpfa:
f24b3c79
L
972 mov temp2,z_a
973 sub temp2,opl
9c15f366 974 in temp,sreg
f24b3c79 975 ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
9c15f366 976 bmov z_flags,ZFL_C, temp,AVR_C
f24b3c79
L
977 bmov z_flags,ZFL_H, temp,AVR_H
978 do_z80_flags_V
9c15f366
L
979 do_z80_flags_set_N
980 ret
981
982;----------------------------------------------------------------
983;|Mnemonic |SZHPNC|Description |Notes |
984;----------------------------------------------------------------
985;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
986;|----------|SZHP C|---------- 8080 ----------------------------|
987;|SBC A,s |***P *|Subtract with Carry |A=A-s-CY |
988;
989;
990do_op_sbcfa:
991 clc
992 sbrc z_flags,ZFL_C
993 sec
994 sbc z_a,opl
995 in temp,sreg
996 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
997 bmov z_flags,ZFL_C, temp,AVR_C
f24b3c79
L
998 bmov z_flags,ZFL_H, temp,AVR_H
999 do_z80_flags_V
9c15f366
L
1000 do_z80_flags_set_N
1001 ret
1002
1003;----------------------------------------------------------------
1004;|Mnemonic |SZHPNC|Description |Notes |
1005;----------------------------------------------------------------
1006;|AND s |**1P00|Logical AND |A=A&s |
1007;|----------|SZHP C|---------- 8080 ----------------------------|
1008;|AND s |**-P 0|Logical AND |A=A&s |
1009;
f24b3c79 1010;
9c15f366
L
1011do_op_anda:
1012 and z_a,opl ;
1013 ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
1014 do_z80_flags_op_and
1015 ret
1016
1017
1018;----------------------------------------------------------------
1019;|Mnemonic |SZHPNC|Description |Notes |
1020;----------------------------------------------------------------
1021;|OR s |**0P00|Logical inclusive OR |A=Avs |
1022;|----------|SZHP C|---------- 8080 ----------------------------|
1023;|OR s |**-P00|Logical inclusive OR |A=Avs |
1024;
f24b3c79 1025;
9c15f366
L
1026do_op_ora:
1027 or z_a,opl
1028 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1029 do_z80_flags_op_or
1030 ret
1031
1032;----------------------------------------------------------------
1033;|Mnemonic |SZHPNC|Description |Notes |
1034;----------------------------------------------------------------
1035;|XOR s |**0P00|Logical Exclusive OR |A=Axs |
1036;|----------|SZHP C|---------- 8080 ----------------------------|
1037;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
1038;
f24b3c79 1039;
9c15f366
L
1040do_op_xora:
1041 eor z_a,opl
1042 ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
1043 do_z80_flags_op_or
1044 ret
1045
1046;----------------------------------------------------------------
1047;|Mnemonic |SZHPNC|Description |Notes |
1048;----------------------------------------------------------------
1049;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
1050;|----------|SZHP C|---------- 8080 ----------------------------|
1051;|ADD HL,ss |---- *|Add |HL=HL+ss |
1052;
1053;
1054do_op_addhl:
1055 lds temp,z_l
1056 lds temp2,z_h
1057 add opl,temp
1058 adc oph,temp2
1059 in temp,sreg
1060 bmov z_flags,ZFL_H, temp,AVR_H
1061 bmov z_flags,ZFL_C, temp,AVR_C
1062 do_z80_flags_clear_N
1063 ret
1064
1065;----------------------------------------------------------------
1066;|Mnemonic |SZHPNC|Description |Notes |
1067;----------------------------------------------------------------
1068;|LD dst,src|------|Load |dst=src |
1069;
1070;
1071do_op_sthl: ;store hl to mem loc in opl:h
1072 movw xl,opl
1073 lds temp,z_l
1074 mem_write
1075 adiw xl,1
1076 lds temp,z_h
1077 mem_write
1078 ret
1079
1080;----------------------------------------------------------------
1081;|Mnemonic |SZHPNC|Description |Notes |
1082;----------------------------------------------------------------
1083;|LD dst,src|------|Load |dst=src |
1084;
1085;
1086do_op_rmem16:
1087 movw xl,opl
1088 mem_read_d opl
1089 adiw x,1
1090 mem_read_d oph
1091 ret
1092
1093;----------------------------------------------------------------
1094;|Mnemonic |SZHPNC|Description |Notes |
1095;----------------------------------------------------------------
1096;|LD dst,src|------|Load |dst=src |
1097;
1098;
1099do_op_rmem8:
1100 mem_read_ds opl, op
1101 ret
1102
1103;----------------------------------------------------------------
1104;|Mnemonic |SZHPNC|Description |Notes |
1105;----------------------------------------------------------------
1106;|DAA |***P-*|Decimal Adjust Acc. | |
1107;|----------|SZHP C|---------- 8080 ----------------------------|
1108;
1109; Not yet checked
1110
1111; Description (http://www.z80.info/z80syntx.htm#DAA):
1112; This instruction conditionally adjusts the accumulator for BCD addition
1113; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
1114; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
1115;
f24b3c79
L
1116; -------------------------------------------------------------------
1117; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
1118; | Oper |Before |upper digit |Before |lower digit| added |After |
1119; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
1120; |-------+-------+------------+-------+-----------+--------+-------|
1121; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1122; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
1123; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
1124; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
1125; | | 0 | 9-F | 0 | A-F | 66 | 1 |
1126; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
1127; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
1128; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
1129; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
1130; |-------+-------+------------+-------+-----------+--------+-------|
1131; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
1132; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
1133; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
1134; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
1135; -------------------------------------------------------------------
1136;
1137; The H flag is affected as follows:
1138;
1139; ---------------------
1140; | N | H | low |H' |
1141; | | |nibble | |
1142; |---+---+-------+---|
1143; | 0 | * | 0-9 | 0 |
1144; | 0 | * | a-f | 1 |
1145; | 1 | 0 | * | 0 |
1146; | 1 | 1 | 6-f | 0 |
1147; | 1 | 1 | 0-5 | 1 |
1148; ---------------------
1149;
1150; Ohter flags:
9c15f366
L
1151; N: Unaffected.
1152; P/V: Set if Acc. is even parity after operation, reset otherwise.
9c15f366
L
1153; Z: Set if Acc. is Zero after operation, reset otherwise.
1154; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
1155
9c15f366 1156#if 1
f24b3c79 1157
9c15f366 1158do_op_da:
f24b3c79
L
1159
1160#if EM_Z80
1161 sbrc z_flags,ZFL_N ;if add-op
1162 rjmp op_da_sub ;then
1163#endif
1164
1165op_da_add:
1166 ldi temp2,0 ; new C and H flag
1167 sbrc z_flags,ZFL_H ; |
1168 rjmp op_da_a01 ; if (H flag ...
1169 mov temp,opl ; |
1170 andi temp,0x0f ; |
1171 cpi temp,0x0a ; or (lower nibble >= 0x0A))
1172 brlo op_da_a10 ; |
1173op_da_a01: ; then
1174 ldi oph,0x06 ; add 6 to lower nibble
1175 add opl,oph ;
1176 brhc op_da_02 ; if
1177 ori temp2,(1<<ZFL_H) ; set new H flag
1178op_da_02: ;
1179 brcc op_da_a10 ; if
1180 ori temp2,(1<<ZFL_C) ; set new H flag
1181op_da_a10: ; endif
1182 sbrc z_flags,ZFL_C ; |
1183 rjmp op_da_a12 ; if (C flag ...
1184 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1185 brlo op_da_a13 ;
1186op_da_a12: ;
1187 ldi oph,0x60 ; add 6 to lower nibble
1188 add opl,oph ;
1189 ori temp2,(1<<ZFL_C) ; set new C flag
1190op_da_a13: ;
1191 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1192 or z_flags,temp2 ; merge new C and H flag
9c15f366 1193 ret
f24b3c79
L
1194
1195#if EM_Z80
1196
1197op_da_sub: ;else (sub-op)
1198 rcall do_op_inv ; TODO: !
1199 ret ;endif
1200#endif
1201
9c15f366
L
1202#else
1203
1204do_op_da:
f24b3c79
L
1205 ldi temp2,0 ;new C and H flag
1206 ldi oph,0 ;oph: what to add
1207
1208 sbrc z_flags,ZFL_N ;if add-op
1209 rjmp op_da_sub ;then
1210op_da_add:
1211 mov temp,opl ; |
1212 andi temp,0x0f ; |
1213 cpi temp,0x0a ; if (lower nibble >= 0x0A)
1214 brlo op_da_a10 ; |
1215 ori oph,0x06 ; add 6
1216 ori temp2,(1<<ZFL_H) ; set new H flag
1217
1218 sbrc z_flags,ZFL_C ; |
1219 rjmp op_da_a02 ; if (C flag ...
1220 cpi opl,0x90 ; |... or upper nibble >= 0x90)
1221 brlo op_da_a03 ; |
1222op_da_a02:
1223 ori oph,0x60 ; add 0x60
1224 ori temp2,(1<<ZFL_C) ; set new C flag
1225op_da_a03: ; endif
1226 rjmp op_da_ae
1227op_da_a10: ; else (lower nibble is 0x09 or lower)
1228 sbrc z_flags,ZFL_C ; |
1229 rjmp op_da_a12 ; if (C flag ...
1230 cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
1231 brlo op_da_a13 ;
1232op_da_a12:
1233 ori oph,0x60 ; add 0x60
1234 ori temp2,(1<<ZFL_C) ; set new C flag
1235op_da_a13:
1236 sbrs z_flags,ZFL_H ; if (H flag)
1237 rjmp op_da_ae ; |
1238 ori oph,0x06 ; add 0x06
1239 mov temp,opl ; |
1240 andi temp,0x0f ; |
1241 cpi temp,0x06 ; if (lower nibble >= 0x0A)
1242 brsh op_da_ae ; |
1243 ori temp2,(1<<ZFL_H) ; set new H flag
1244 ; endif
1245 ; endif
1246op_da_ae:
1247 add opl,oph
1248 ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
1249 or z_flags,temp2 ; merge new C and H flag
9c15f366 1250 ret
f24b3c79
L
1251
1252op_da_sub: ;else (sub-op)
1253 rcall do_op_inv ; TODO: !
1254 ret ;endif
9c15f366
L
1255#endif
1256
f24b3c79 1257
9c15f366
L
1258;----------------------------------------------------------------
1259;|Mnemonic |SZHPNC|Description |Notes |
1260;----------------------------------------------------------------
1261;|SCF |--0-01|Set Carry Flag |CY=1 |
1262;|----------|SZHP C|---------- 8080 ----------------------------|
1263;
1264;
1265do_op_scf:
f24b3c79 1266 do_z80_flags_clear_HN
9c15f366
L
1267 ori z_flags,(1<<ZFL_C)
1268 ret
1269
1270;----------------------------------------------------------------
1271;|Mnemonic |SZHPNC|Description |Notes |
1272;----------------------------------------------------------------
f24b3c79 1273;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
9c15f366 1274;|----------|SZHP C|---------- 8080 ----------------------------|
f24b3c79 1275;|CCF |---- 1|Set Carry Flag |CY=1 |
9c15f366 1276;
9c15f366
L
1277do_op_ccf:
1278 do_z80_flags_clear_N
f24b3c79 1279 do_z80_flags_copy_HC
9c15f366
L
1280 ldi temp,(1<<ZFL_C)
1281 eor z_flags,temp
1282 ret
1283
1284;----------------------------------------------------------------
1285;|Mnemonic |SZHPNC|Description |Notes |
1286;----------------------------------------------------------------
1287;|CPL |--1-1-|Complement |A=~A |
1288;|----------|SZHP C|---------- 8080 ----------------------------|
1289;|CPL |---- -|Complement |A=~A |
1290;
1291;
1292do_op_cpl:
1293 com z_a
1294 do_z80_flags_set_HN
1295 ret
1296
1297
1298;----------------------------------------------------------------
1299;|Mnemonic |SZHPNC|Description |Notes |
1300;----------------------------------------------------------------
1301;|PUSH xx |------|Push |-[SP]=xx |
1302;|PUSH qq |------|Push |-[SP]=qq |
1303;
1304;
1305do_op_push16:
1306 movw xl,z_spl
1307 sbiw x,1
1308 mem_write_s oph
1309 sbiw x,1
1310 mem_write_s opl
1311 movw z_spl,xl
1312
1313.if STACK_DBG
1314 printnewline
1315 printstring "Stack push "
1316 movw temp,opl
1317 rcall printhexw
1318 printstring ", SP is now "
1319 movw temp,z_spl
1320 rcall printhexw
1321 printstring ". "
1322.endif
1323
1324 ret
1325
1326;----------------------------------------------------------------
1327;|Mnemonic |SZHPNC|Description |Notes |
1328;----------------------------------------------------------------
1329;|POP xx |------|Pop |xx=[SP]+ |
1330;|POP qq |------|Pop |qq=[SP]+ |
1331;
1332;
1333do_op_pop16:
1334 movw x,z_spl
1335 mem_read_d opl
1336 adiw x,1
1337 mem_read_d oph
1338 adiw x,1
1339 movw z_spl,x
1340
1341.if STACK_DBG
1342 printnewline
1343 printstring "Stack pop "
1344 movw temp,opl
1345 rcall printhexw
1346 printstring ", SP is now "
1347 movw temp,z_spl
1348 rcall printhexw
1349 printstring ". "
1350.endif
1351 ret
1352
1353;----------------------------------------------------------------
1354;|Mnemonic |SZHPNC|Description |Notes |
1355;----------------------------------------------------------------
1356;|EX [SP],HL|------|Exchange |[SP]<->HL |
1357;|EX DE,HL |------|Exchange |DE<->HL |
1358;-----------------------------Z80--------------------------------
1359;
1360do_op_exhl:
1361 lds temp,z_l
1362 lds temp2,z_h
1363 sts z_l,opl
1364 sts z_h,oph
1365 movw opl,temp
1366 ret
1367
1368;----------------------------------------------------------------
1369;|Mnemonic |SZHPNC|Description |Notes |
1370;----------------------------------------------------------------
1371;
1372; TODO: Implement IFF1, IFF2
1373do_op_di:
1374 ret
1375
1376;----------------------------------------------------------------
1377;|Mnemonic |SZHPNC|Description |Notes |
1378;----------------------------------------------------------------
1379;
1380; TODO: Implement IFF1, IFF2
1381do_op_ei:
1382 ret
1383
1384;----------------------------------------------------------------
1385;|Mnemonic |SZHPNC|Description |Notes |
1386;----------------------------------------------------------------
1387;|CALL cc,nn|------|Conditional Call |If cc CALL |
1388;|JP cc,nn |------|Conditional Jump |If cc JP |
1389;|RET cc |------|Conditional Return |If cc RET |
1390;
1391;
1392do_op_ifnz:
1393 sbrs z_flags, ZFL_Z
1394 ret
1395 pop temp ; nix tun
1396 pop temp ; direkt zuruech zu main
1397 ret
1398
1399;----------------------------------------------------------------
1400;|Mnemonic |SZHPNC|Description |Notes |
1401;----------------------------------------------------------------
1402;|CALL cc,nn|------|Conditional Call |If cc CALL |
1403;|JP cc,nn |------|Conditional Jump |If cc JP |
1404;|RET cc |------|Conditional Return |If cc RET |
1405;
1406;
1407do_op_ifz:
1408 sbrc z_flags, ZFL_Z
1409 ret
1410 pop temp ; nix tun
1411 pop temp ; direkt zuruech zu main
1412 ret
1413
1414;----------------------------------------------------------------
1415;|Mnemonic |SZHPNC|Description |Notes |
1416;----------------------------------------------------------------
1417;|CALL cc,nn|------|Conditional Call |If cc CALL |
1418;|JP cc,nn |------|Conditional Jump |If cc JP |
1419;|RET cc |------|Conditional Return |If cc RET |
1420;
1421;
1422do_op_ifnc:
1423 sbrs z_flags, ZFL_C
1424 ret
1425 pop temp ; nix tun
1426 pop temp ; direkt zuruech zu main
1427 ret
1428
1429;----------------------------------------------------------------
1430;|Mnemonic |SZHPNC|Description |Notes |
1431;----------------------------------------------------------------
1432;|CALL cc,nn|------|Conditional Call |If cc CALL |
1433;|JP cc,nn |------|Conditional Jump |If cc JP |
1434;|RET cc |------|Conditional Return |If cc RET |
1435;
1436;
1437do_op_ifc:
1438 sbrc z_flags, ZFL_C
1439 ret
1440 pop temp ; nix tun
1441 pop temp ; direkt zuruech zu main
1442 ret
1443
1444;----------------------------------------------------------------
1445;|Mnemonic |SZHPNC|Description |Notes |
1446;----------------------------------------------------------------
1447;|CALL cc,nn|------|Conditional Call |If cc CALL |
1448;|JP cc,nn |------|Conditional Jump |If cc JP |
1449;|RET cc |------|Conditional Return |If cc RET |
1450;
1451;
1452do_op_ifpo:
1453 sbrs z_flags, ZFL_P
1454 ret
1455 pop temp ; nix tun
1456 pop temp ; direkt zuruech zu main
1457 ret
1458
1459;----------------------------------------------------------------
1460;|Mnemonic |SZHPNC|Description |Notes |
1461;----------------------------------------------------------------
1462;|CALL cc,nn|------|Conditional Call |If cc CALL |
1463;|JP cc,nn |------|Conditional Jump |If cc JP |
1464;|RET cc |------|Conditional Return |If cc RET |
1465;
1466;
1467do_op_ifpe:
1468 sbrc z_flags, ZFL_P
1469 ret
1470 pop temp ; nix tun
1471 pop temp ; direkt zuruech zu main
1472 ret
1473
1474;----------------------------------------------------------------
1475;|Mnemonic |SZHPNC|Description |Notes |
1476;----------------------------------------------------------------
1477;|CALL cc,nn|------|Conditional Call |If cc CALL |
1478;|JP cc,nn |------|Conditional Jump |If cc JP |
1479;|RET cc |------|Conditional Return |If cc RET |
1480;
1481;
1482do_op_ifp: ;sign positive, aka s=0
1483 sbrs z_flags, ZFL_S
1484 ret
1485 pop temp ; nix tun
1486 pop temp ; direkt zuruech zu main
1487 ret
1488
1489;----------------------------------------------------------------
1490;|Mnemonic |SZHPNC|Description |Notes |
1491;----------------------------------------------------------------
1492;|CALL cc,nn|------|Conditional Call |If cc CALL |
1493;|JP cc,nn |------|Conditional Jump |If cc JP |
1494;|RET cc |------|Conditional Return |If cc RET |
1495;
1496;
1497do_op_ifm: ;sign negative, aka s=1
1498 sbrc z_flags, ZFL_S
1499 ret
1500 pop temp ; nix tun
1501 pop temp ; direkt zuruech zu main
1502 ret
1503
1504
1505; ----------------------- Opcode decoding -------------------------
1506
1507; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three
1508; operations: fetch, do something, store.
1509; The table is made of 256 words.
1510
1511; .org (PC+255) & 0xff00
1512
1513;todo_table:
1514;opcjmp:
1515instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
1516instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
f24b3c79 1517instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
9c15f366
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1518instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
1519instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
1520instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
1521instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
f24b3c79 1522instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
9c15f366
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1523instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
1524instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
f24b3c79 1525instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
9c15f366
L
1526instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
1527instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
1528instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
1529instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
f24b3c79 1530instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
9c15f366
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1531instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
1532instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
f24b3c79 1533instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
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1534instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
1535instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
1536instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
1537instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
f24b3c79 1538instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
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1539instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
1540instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
f24b3c79 1541instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
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1542instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
1543instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
1544instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
1545instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
f24b3c79 1546instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
9c15f366
L
1547instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
1548instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
1549instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
1550instr do_fetch_HL, op_INC16, do_store_HL ;23 ;INC HL
1551instr do_fetch_H, op_INC, do_store_H ;24 ;INC H
1552instr do_fetch_H, op_DEC, do_store_H ;25 ;DEC H
1553instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
1554instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
1555instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
1556instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
1557instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
1558instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
1559instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
1560instr do_fetch_L, op_DEC, do_store_L ;2D ;DEC L
1561instr do_fetch_DIR8, op_nop, do_store_L ;2E nn ;LD L,n
1562instr do_fetch_nop, op_CPL, do_store_nop ;2F ;CPL
1563instr do_fetch_nop, op_INV, do_store_nop ;30 oo ;JR NC,o
1564instr do_fetch_DIR16, op_nop, do_store_SP ;31 nn nn ;LD SP,nn
1565instr do_fetch_DIR16, op_nop, do_store_AM ;32 nn nn ;LD (nn),A
1566instr do_fetch_SP, op_INC16, do_store_SP ;33 ;INC SP
1567instr do_fetch_MHL, op_INC, do_store_MHL ;34 ;INC (HL)
1568instr do_fetch_MHL, op_DEC, do_store_MHL ;35 ;DEC (HL)
1569instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
1570instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
1571instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
1572instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
1573instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
1574instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
1575instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
1576instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
1577instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
1578instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
f24b3c79 1579instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
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1580instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
1581instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
1582instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
1583instr do_fetch_H, op_nop, do_store_B ;44 ;LD B,H
1584instr do_fetch_L, op_nop, do_store_B ;45 ;LD B,L
1585instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
1586instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
1587instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
f24b3c79 1588instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
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L
1589instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
1590instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
1591instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
1592instr do_fetch_L, op_nop, do_store_C ;4D ;LD C,L
1593instr do_fetch_MHL, op_nop, do_store_C ;4E ;LD C,(HL)
1594instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
1595instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
1596instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
f24b3c79 1597instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
9c15f366
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1598instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
1599instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
1600instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
1601instr do_fetch_MHL, op_nop, do_store_D ;56 ;LD D,(HL)
1602instr do_fetch_A, op_nop, do_store_D ;57 ;LD D,A
1603instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
1604instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
1605instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
f24b3c79 1606instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
9c15f366
L
1607instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
1608instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
1609instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
1610instr do_fetch_A, op_nop, do_store_E ;5F ;LD E,A
1611instr do_fetch_B, op_nop, do_store_H ;60 ;LD H,B
1612instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
1613instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
1614instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
f24b3c79 1615instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
9c15f366
L
1616instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
1617instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
1618instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
1619instr do_fetch_B, op_nop, do_store_L ;68 ;LD L,B
1620instr do_fetch_C, op_nop, do_store_L ;69 ;LD L,C
1621instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
1622instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
1623instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
f24b3c79 1624instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
9c15f366
L
1625instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
1626instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
1627instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
1628instr do_fetch_C, op_nop, do_store_MHL ;71 ;LD (HL),C
1629instr do_fetch_D, op_nop, do_store_MHL ;72 ;LD (HL),D
1630instr do_fetch_E, op_nop, do_store_MHL ;73 ;LD (HL),E
1631instr do_fetch_H, op_nop, do_store_MHL ;74 ;LD (HL),H
1632instr do_fetch_L, op_nop, do_store_MHL ;75 ;LD (HL),L
1633instr do_fetch_nop, op_INV, do_store_nop ;76 ;HALT
1634instr do_fetch_A, op_nop, do_store_MHL ;77 ;LD (HL),A
f24b3c79 1635instr do_fetch_b, op_nop, do_store_A ;78 ;LD A,B
9c15f366
L
1636instr do_fetch_C, op_nop, do_store_A ;79 ;LD A,C
1637instr do_fetch_D, op_nop, do_store_A ;7A ;LD A,D
1638instr do_fetch_E, op_nop, do_store_A ;7B ;LD A,E
1639instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
1640instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
1641instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
f24b3c79 1642instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
9c15f366
L
1643instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
1644instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
1645instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
1646instr do_fetch_E, op_ADDA, do_store_nop ;83 ;ADD A,E
1647instr do_fetch_H, op_ADDA, do_store_nop ;84 ;ADD A,H
1648instr do_fetch_L, op_ADDA, do_store_nop ;85 ;ADD A,L
1649instr do_fetch_MHL, op_ADDA, do_store_nop ;86 ;ADD A,(HL)
1650instr do_fetch_A, op_ADDA, do_store_nop ;87 ;ADD A,A
1651instr do_fetch_B, op_ADCA, do_store_nop ;88 ;ADC A,B
1652instr do_fetch_C, op_ADCA, do_store_nop ;89 ;ADC A,C
1653instr do_fetch_D, op_ADCA, do_store_nop ;8A ;ADC A,D
1654instr do_fetch_E, op_ADCA, do_store_nop ;8B ;ADC A,E
1655instr do_fetch_H, op_ADCA, do_store_nop ;8C ;ADC A,H
1656instr do_fetch_L, op_ADCA, do_store_nop ;8D ;ADC A,L
1657instr do_fetch_MHL, op_ADCA, do_store_nop ;8E ;ADC A,(HL)
1658instr do_fetch_A, op_ADCA, do_store_nop ;8F ;ADC A,A
1659instr do_fetch_B, op_SUBFA, do_store_nop ;90 ;SUB A,B
1660instr do_fetch_C, op_SUBFA, do_store_nop ;91 ;SUB A,C
1661instr do_fetch_D, op_SUBFA, do_store_nop ;92 ;SUB A,D
1662instr do_fetch_E, op_SUBFA, do_store_nop ;93 ;SUB A,E
1663instr do_fetch_H, op_SUBFA, do_store_nop ;94 ;SUB A,H
1664instr do_fetch_L, op_SUBFA, do_store_nop ;95 ;SUB A,L
1665instr do_fetch_MHL, op_SUBFA, do_store_nop ;96 ;SUB A,(HL)
1666instr do_fetch_A, op_SUBFA, do_store_nop ;97 ;SUB A,A
1667instr do_fetch_B, op_SBCFA, do_store_nop ;98 ;SBC A,B
1668instr do_fetch_C, op_SBCFA, do_store_nop ;99 ;SBC A,C
1669instr do_fetch_D, op_SBCFA, do_store_nop ;9A ;SBC A,D
1670instr do_fetch_E, op_SBCFA, do_store_nop ;9B ;SBC A,E
1671instr do_fetch_H, op_SBCFA, do_store_nop ;9C ;SBC A,H
1672instr do_fetch_L, op_SBCFA, do_store_nop ;9D ;SBC A,L
1673instr do_fetch_MHL, op_SBCFA, do_store_nop ;9E ;SBC A,(HL)
1674instr do_fetch_A, op_SBCFA, do_store_nop ;9F ;SBC A,A
1675instr do_fetch_B, op_ANDA, do_store_nop ;A0 ;AND A,B
1676instr do_fetch_C, op_ANDA, do_store_nop ;A1 ;AND A,C
1677instr do_fetch_D, op_ANDA, do_store_nop ;A2 ;AND A,D
1678instr do_fetch_E, op_ANDA, do_store_nop ;A3 ;AND A,E
1679instr do_fetch_H, op_ANDA, do_store_nop ;A4 ;AND A,H
1680instr do_fetch_L, op_ANDA, do_store_nop ;A5 ;AND A,L
1681instr do_fetch_MHL, op_ANDA, do_store_nop ;A6 ;AND A,(HL)
1682instr do_fetch_A, op_ANDA, do_store_nop ;A7 ;AND A,A
1683instr do_fetch_B, op_XORA, do_store_nop ;A8 ;XOR A,B
1684instr do_fetch_C, op_XORA, do_store_nop ;A9 ;XOR A,C
1685instr do_fetch_D, op_XORA, do_store_nop ;AA ;XOR A,D
1686instr do_fetch_E, op_XORA, do_store_nop ;AB ;XOR A,E
1687instr do_fetch_H, op_XORA, do_store_nop ;AC ;XOR A,H
1688instr do_fetch_L, op_XORA, do_store_nop ;AD ;XOR A,L
1689instr do_fetch_MHL, op_XORA, do_store_nop ;AE ;XOR A,(HL)
1690instr do_fetch_A, op_XORA, do_store_nop ;AF ;XOR A,A
1691instr do_fetch_B, op_ORA, do_store_nop ;B0 ;OR A,B
1692instr do_fetch_C, op_ORA, do_store_nop ;B1 ;OR A,C
1693instr do_fetch_D, op_ORA, do_store_nop ;B2 ;OR A,D
1694instr do_fetch_E, op_ORA, do_store_nop ;B3 ;OR A,E
1695instr do_fetch_H, op_ORA, do_store_nop ;B4 ;OR A,H
1696instr do_fetch_L, op_ORA, do_store_nop ;B5 ;OR A,L
1697instr do_fetch_MHL, op_ORA, do_store_nop ;B6 ;OR A,(HL)
1698instr do_fetch_A, op_ORA, do_store_nop ;B7 ;OR A,A
1699instr do_fetch_B, op_CPFA, do_store_nop ;B8 ;CP A,B
1700instr do_fetch_C, op_CPFA, do_store_nop ;B9 ;CP A,C
1701instr do_fetch_D, op_CPFA, do_store_nop ;BA ;CP A,D
1702instr do_fetch_E, op_CPFA, do_store_nop ;BB ;CP A,E
1703instr do_fetch_H, op_CPFA, do_store_nop ;BC ;CP A,H
1704instr do_fetch_L, op_CPFA, do_store_nop ;BD ;CP A,L
1705instr do_fetch_MHL, op_CPFA, do_store_nop ;BE ;CP A,(HL)
1706instr do_fetch_A, op_CPFA, do_store_nop ;BF ;CP A,A
1707instr do_fetch_nop, op_IFNZ, do_store_RET ;C0 ;RET NZ
1708instr do_fetch_nop, op_POP16, do_store_BC ;C1 ;POP BC
1709instr do_fetch_DIR16, op_IFNZ, do_store_PC ;C2 nn nn ;JP NZ,nn
1710instr do_fetch_DIR16, op_nop, do_store_PC ;C3 nn nn ;JP nn
1711instr do_fetch_DIR16, op_IFNZ, do_store_CALL ;C4 nn nn ;CALL NZ,nn
1712instr do_fetch_BC, op_PUSH16, do_store_nop ;C5 ;PUSH BC
1713instr do_fetch_DIR8, op_ADDA, do_store_nop ;C6 nn ;ADD A,n
1714instr do_fetch_RST, op_nop, do_store_CALL ;C7 ;RST 0
1715instr do_fetch_nop, op_IFZ, do_store_RET ;C8 ;RET Z
1716instr do_fetch_nop, op_nop, do_store_RET ;C9 ;RET
1717instr do_fetch_DIR16, op_IFZ, do_store_PC ;CA nn nn ;JP Z,nn
1718instr do_fetch_nop, op_INV, do_store_nop ;CB ;(Z80 specific)
1719instr do_fetch_DIR16, op_IFZ, do_store_CALL ;CC nn nn ;CALL Z,nn
1720instr do_fetch_DIR16, op_nop, do_store_CALL ;CD nn nn ;CALL nn
1721instr do_fetch_DIR8, op_ADCA, do_store_nop ;CE nn ;ADC A,n
1722instr do_fetch_RST, op_nop, do_store_CALL ;CF ;RST 8H
1723instr do_fetch_nop, op_IFNC, do_store_RET ;D0 ;RET NC
1724instr do_fetch_nop, op_POP16, do_store_DE ;D1 ;POP DE
1725instr do_fetch_DIR16, op_IFNC, do_store_PC ;D2 nn nn ;JP NC,nn
1726instr do_fetch_DIR8, op_OUTA, do_store_nop ;D3 nn ;OUT (n),A
1727instr do_fetch_DIR16, op_IFNC, do_store_CALL ;D4 nn nn ;CALL NC,nn
1728instr do_fetch_DE, op_PUSH16, do_store_nop ;D5 ;PUSH DE
1729instr do_fetch_DIR8, op_SUBFA, do_store_nop ;D6 nn ;SUB n
1730instr do_fetch_RST, op_nop, do_store_CALL ;D7 ;RST 10H
1731instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
1732instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
1733instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
1734instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
1735instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
1736instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
1737instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
1738instr do_fetch_RST, op_nop, do_store_CALL ;DF ;RST 18H
1739instr do_fetch_nop, op_IFPO, do_store_RET ;E0 ;RET PO
1740instr do_fetch_nop, op_POP16, do_store_HL ;E1 ;POP HL
1741instr do_fetch_DIR16, op_IFPO, do_store_PC ;E2 nn nn ;JP PO,nn
1742instr do_fetch_MSP, op_EXHL, do_store_MSP ;E3 ;EX (SP),HL
1743instr do_fetch_DIR16, op_IFPO, do_store_CALL ;E4 nn nn ;CALL PO,nn
1744instr do_fetch_HL, op_PUSH16, do_store_nop ;E5 ;PUSH HL
1745instr do_fetch_DIR8, op_ANDA, do_store_nop ;E6 nn ;AND n
1746instr do_fetch_RST, op_nop, do_store_CALL ;E7 ;RST 20H
1747instr do_fetch_nop, op_IFPE, do_store_RET ;E8 ;RET PE
1748instr do_fetch_HL, op_nop, do_store_PC ;E9 ;JP HL
1749instr do_fetch_DIR16, op_IFPE, do_store_PC ;EA nn nn ;JP PE,nn
1750instr do_fetch_DE, op_EXHL, do_store_DE ;EB ;EX DE,HL
1751instr do_fetch_DIR16, op_IFPE, do_store_CALL ;EC nn nn ;CALL PE,nn
1752instr do_fetch_nop, op_INV, do_store_nop ;ED ;(Z80 specific)
1753instr do_fetch_DIR8, op_XORA, do_store_nop ;EE nn ;XOR n
1754instr do_fetch_RST, op_nop, do_store_CALL ;EF ;RST 28H
1755instr do_fetch_nop, op_IFP, do_store_RET ;F0 ;RET P
1756instr do_fetch_nop, op_POP16, do_store_AF ;F1 ;POP AF
1757instr do_fetch_DIR16, op_IFP, do_store_PC ;F2 nn nn ;JP P,nn
1758instr do_fetch_nop, op_DI, do_store_nop ;F3 ;DI
1759instr do_fetch_DIR16, op_IFP, do_store_CALL ;F4 nn nn ;CALL P,nn
1760instr do_fetch_AF, op_PUSH16, do_store_nop ;F5 ;PUSH AF
1761instr do_fetch_DIR8, op_ORA, do_store_nop ;F6 nn ;OR n
1762instr do_fetch_RST, op_nop, do_store_CALL ;F7 ;RST 30H
1763instr do_fetch_nop, op_IFM, do_store_RET ;F8 ;RET M
1764instr do_fetch_HL, op_nop, do_store_SP ;F9 ;LD SP,HL
1765instr do_fetch_DIR16, op_IFM, do_store_PC ;FA nn nn ;JP M,nn
1766instr do_fetch_nop, op_EI, do_store_nop ;FB ;EI
1767instr do_fetch_DIR16, op_IFM, do_store_CALL ;FC nn nn ;CALL M,nn
1768instr do_fetch_nop, op_INV, do_store_nop ;FD ;(Z80 specific)
1769instr do_fetch_DIR8, op_CPFA, do_store_nop ;FE nn ;CP n
1770instr do_fetch_RST, op_nop, do_store_CALL ;FF ;RST 38H
1771
1772
1773;----------------------------------------------------------------
1774; Lookup table, stolen from z80ex, Z80 emulation library.
1775; http://z80ex.sourceforge.net/
1776
1777; The S, Z, 5 and 3 bits and the parity of the lookup value
1778
1779; .org (PC+255) & 0xff00
1780 .org opcjmp + 256
1781sz53p_tab:
1782 .db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1783 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1784 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1785 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1786 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1787 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1788 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1789 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1790 .db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
1791 .db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
1792 .db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
1793 .db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
1794 .db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
1795 .db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
1796 .db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
1797 .db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
1798 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1799 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1800 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1801 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1802 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1803 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1804 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1805 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1806 .db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
1807 .db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
1808 .db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
1809 .db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
1810 .db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
1811 .db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
1812 .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
1813 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
1814
1815; vim:set ts=8 noet nowrap
1816