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Commit | Line | Data |
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1 | ; DRAM interface for *one* 256K x 4 bit DRAM chip. | |
2 | ; This is part of the Z80-CP/M emulator written by Sprite_tm. | |
3 | ||
4 | ; Copyright (C) 2010 Sprite_tm | |
5 | ; Copyright (C) 2010 Leo C. | |
6 | ||
7 | ; This file is part of avrcpm. | |
8 | ; | |
9 | ; avrcpm is free software: you can redistribute it and/or modify it | |
10 | ; under the terms of the GNU General Public License as published by | |
11 | ; the Free Software Foundation, either version 3 of the License, or | |
12 | ; (at your option) any later version. | |
13 | ; | |
14 | ; avrcpm is distributed in the hope that it will be useful, | |
15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | ; GNU General Public License for more details. | |
18 | ; | |
19 | ; You should have received a copy of the GNU General Public License | |
20 | ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>. | |
21 | ; | |
22 | ; $Id$ | |
23 | ; | |
24 | ||
25 | ||
26 | ; -------------------- DRAM macros--------------- | |
27 | ||
28 | ; add wait states | |
29 | ; dram_wait number_of_cycles | |
30 | ||
31 | .macro dram_wait | |
32 | .if @0 > 1 | |
33 | rjmp PC+1 | |
34 | dram_wait @0 - 2 | |
35 | .elif @0 > 0 | |
36 | nop | |
37 | dram_wait @0 - 1 | |
38 | .endif | |
39 | .endm | |
40 | ||
41 | ; ------------------------------------------------ | |
42 | ||
43 | ; DRAM_SETADDR val, low_and_mask, low_or_mask, high_and_mask, high_or_mask | |
44 | ||
45 | .macro DRAM_SETADDR | |
46 | mov temp,@0 | |
47 | .if low(@1) != 0xff | |
48 | andi temp,@1 | |
49 | .endif | |
50 | .if low(@2) != 0 | |
51 | ori temp, @2 | |
52 | .endif | |
53 | out P_AL,temp | |
54 | ||
55 | mov temp,@0 | |
56 | .if low(@3) != 0xff | |
57 | andi temp,@3 | |
58 | .endif | |
59 | ori temp, @4 | (1<<mmc_cs) | |
60 | out P_AH,temp | |
61 | .endm | |
62 | ||
63 | ||
64 | ;---------------------------------------------- | |
65 | ; Read byte from DRAM | |
66 | ; temp = destreg, xh = memaddrh, xl = memaddrl | |
67 | ||
68 | .macro mem_read | |
69 | rcall dram_read | |
70 | .endm | |
71 | ||
72 | ;---------------------------------------------- | |
73 | ; Read byte from DRAM | |
74 | ; mem_read memaddr | |
75 | ; temp = destreg | |
76 | ||
77 | .macro mem_read_s | |
78 | movw xl,@0l | |
79 | rcall dram_read | |
80 | .endm | |
81 | ||
82 | ;---------------------------------------------- | |
83 | ; Read byte from DRAM | |
84 | ; mem_read destreg | |
85 | ; xh = memaddrh, xl = memaddrl | |
86 | ||
87 | .macro mem_read_d | |
88 | lcall dram_read | |
89 | mov @0,temp | |
90 | .endm | |
91 | ||
92 | ;---------------------------------------------- | |
93 | ; Read byte from DRAM | |
94 | ; mem_read destreg, memaddr | |
95 | ||
96 | .macro mem_read_ds | |
97 | movw xl,@1l | |
98 | lcall dram_read | |
99 | mov @0,temp | |
100 | .endm | |
101 | ||
102 | ;---------------------------------------------- | |
103 | ; Write byte to DRAM | |
104 | ; xh = memaddrh, xl = memaddrl, temp = srcreg | |
105 | ||
106 | .macro mem_write | |
107 | lcall dram_write | |
108 | .endm | |
109 | ||
110 | ;---------------------------------------------- | |
111 | ; Write byte to DRAM | |
112 | ; temp = srcreg | |
113 | ; mem_write memaddr | |
114 | ||
115 | .macro mem_write_d | |
116 | movw x,@0l | |
117 | rcall dram_write | |
118 | .endm | |
119 | ||
120 | ;---------------------------------------------- | |
121 | ; Write byte to DRAM | |
122 | ; xh = memaddrh, xl = memaddrl | |
123 | ; mem_write sourcereg | |
124 | ||
125 | .macro mem_write_s | |
126 | mov temp,@0 | |
127 | lcall dram_write | |
128 | .endm | |
129 | ||
130 | ;---------------------------------------------- | |
131 | ; Write byte to DRAM | |
132 | ; mem_write memaddr, sourcereg | |
133 | ||
134 | .macro mem_write_ds | |
135 | movw x,@0l | |
136 | mov temp,@1 | |
137 | lcall dram_write | |
138 | .endm | |
139 | ||
140 |