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1 | ; DRAM interface for 2 RAM chips. Supports up to 4 Mbyte of DRAM. | |
2 | ; This is part of the Z80-CP/M emulator written by Sprite_tm. | |
3 | ||
4 | ; Copyright (C) 2010 Leo C. | |
5 | ||
6 | ; This file is part of avrcpm. | |
7 | ; | |
8 | ; avrcpm is free software: you can redistribute it and/or modify it | |
9 | ; under the terms of the GNU General Public License as published by | |
10 | ; the Free Software Foundation, either version 3 of the License, or | |
11 | ; (at your option) any later version. | |
12 | ; | |
13 | ; avrcpm is distributed in the hope that it will be useful, | |
14 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | ; GNU General Public License for more details. | |
17 | ; | |
18 | ; You should have received a copy of the GNU General Public License | |
19 | ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>. | |
20 | ; | |
21 | ; $Id$ | |
22 | ; | |
23 | ||
24 | ||
25 | ; -------------------- DRAM macros--------------- | |
26 | ||
27 | ; add wait states | |
28 | ; dram_wait number_of_cycles | |
29 | ||
30 | .macro dram_wait | |
31 | .if @0 > 1 | |
32 | rjmp PC+1 | |
33 | dram_wait @0 - 2 | |
34 | .elif @0 > 0 | |
35 | nop | |
36 | dram_wait @0 - 1 | |
37 | .endif | |
38 | .endm | |
39 | ||
40 | ;---------------------------------------------- | |
41 | ; Read byte from DRAM | |
42 | ; mem_read_ds destreg, memaddr | |
43 | ||
44 | .macro mem_read_ds | |
45 | cli ;1 | |
46 | out PORTD,@1h ;1 | |
47 | out PORTC,_RAS0 ;1 | |
48 | out PORTD,@1l ;1 | |
49 | out PORTC,_CAS0 ;1 | |
50 | out DDRD,_0 ;1 | |
51 | out PORTC,_OE ;1 | |
52 | rjmp PC+1 ;2 | |
53 | dram_wait DRAM_WAITSTATES ; | |
54 | in @0,PIND ;1 | |
55 | out PORTC,_255 ;1 | |
56 | sei ;1 | |
57 | out DDRD,_255 ;1 = 14 + DRAM_WAITSTATES | |
58 | .endm | |
59 | ||
60 | ;---------------------------------------------- | |
61 | ; Read byte from DRAM | |
62 | ; mem_read_d destreg | |
63 | ; x = memaddr | |
64 | ||
65 | .macro mem_read_d | |
66 | mem_read_ds @0, x | |
67 | .endm | |
68 | ||
69 | ;---------------------------------------------- | |
70 | ; Read byte from DRAM | |
71 | ; mem_read_s memaddr | |
72 | ; temp = destreg | |
73 | ||
74 | .macro mem_read_s | |
75 | mem_read_ds temp, @0 | |
76 | .endm | |
77 | ||
78 | ;---------------------------------------------- | |
79 | ; Read byte from DRAM | |
80 | ; mem_read | |
81 | ; temp = destreg, x = memaddr | |
82 | ||
83 | .macro mem_read | |
84 | mem_read_ds temp, x | |
85 | .endm | |
86 | ||
87 | ;---------------------------------------------- | |
88 | ; Write byte to DRAM | |
89 | ; mem_write_ds memaddr, sourcereg | |
90 | ||
91 | .macro mem_write_ds | |
92 | cli ;1 | |
93 | out PORTD,@0h ;1 | |
94 | out PORTC,_RAS0 ;1 | |
95 | out PORTD,@0l ;1 | |
96 | out PORTC,_CAS0 ;1 | |
97 | out PORTD,@1 ;1 | |
98 | out PORTC,_WE ;1 | |
99 | sei ;1 | |
100 | out PORTC,_255 ;1 = 9 | |
101 | .endm | |
102 | ||
103 | ;---------------------------------------------- | |
104 | ; Write byte to DRAM | |
105 | ; mem_write_d memaddr | |
106 | ; temp = srcreg | |
107 | ||
108 | .macro mem_write_d | |
109 | mem_write_ds @0, temp | |
110 | .endm | |
111 | ||
112 | ;---------------------------------------------- | |
113 | ; Write byte to DRAM | |
114 | ; mem_write_s sourcereg | |
115 | ; xh = memaddrh, xl = memaddrl | |
116 | ||
117 | .macro mem_write_s | |
118 | mem_write_ds x, @0 | |
119 | .endm | |
120 | ||
121 | ;---------------------------------------------- | |
122 | ; Write byte to DRAM | |
123 | ; mem_write | |
124 | ; xh = memaddrh, xl = memaddrl, temp = srcreg | |
125 | ||
126 | .macro mem_write | |
127 | mem_write_ds x, temp | |
128 | .endm | |
129 | ||
130 |