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Commit | Line | Data |
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1 | ; DRAM interface for *one* 256K x 4 bit DRAM chip. | |
2 | ; This is part of the Z80-CP/M emulator written by Sprite_tm. | |
3 | ||
4 | ; Copyright (C) 2010 Sprite_tm | |
5 | ; Copyright (C) 2010 Leo C. | |
6 | ||
7 | ; This file is part of avrcpm. | |
8 | ; | |
9 | ; avrcpm is free software: you can redistribute it and/or modify it | |
10 | ; under the terms of the GNU General Public License as published by | |
11 | ; the Free Software Foundation, either version 3 of the License, or | |
12 | ; (at your option) any later version. | |
13 | ; | |
14 | ; avrcpm is distributed in the hope that it will be useful, | |
15 | ; but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | ; GNU General Public License for more details. | |
18 | ; | |
19 | ; You should have received a copy of the GNU General Public License | |
20 | ; along with avrcpm. If not, see <http://www.gnu.org/licenses/>. | |
21 | ; | |
22 | ; $Id$ | |
23 | ; | |
24 | ||
25 | ||
26 | ;---------------------------------------------- | |
27 | ||
28 | ; Loads the byte on address xh:xl into temp. | |
29 | ; Uses temp2. Must not alter xh:xl | |
30 | ||
31 | .cseg | |
32 | dram_read: | |
33 | ; cli | |
34 | DRAM_SETADDR xh, ~0,(1<<ram_ras), ~(1<<ram_a8), (1<<ram_oe) | |
35 | cbi P_RAS,ram_ras | |
36 | DRAM_SETADDR xl, ~(1<<ram_ras),0, ~((1<<ram_oe)), (1<<ram_a8) | |
37 | cbi P_CAS,ram_cas | |
38 | cbi P_A8,ram_a8 | |
39 | dram_wait DRAM_WAITSTATES ; | |
40 | in temp,P_DQ-2 ; PIN | |
41 | out P_CAS,_255 | |
42 | ||
43 | cbi P_CAS,ram_cas | |
44 | andi temp,0x0f | |
45 | swap temp | |
46 | dram_wait DRAM_WAITSTATES ; | |
47 | in temp2,P_DQ-2 ; PIN | |
48 | andi temp2,0x0f | |
49 | or temp,temp2 | |
50 | ||
51 | out P_OE, _255 | |
52 | out P_CAS,_255 | |
53 | out P_RAS,_255 | |
54 | ; sei | |
55 | ret | |
56 | ||
57 | ||
58 | ;Writes the byte in temp to xh:xl | |
59 | ; Uses temp2. Must not alter xh:xl | |
60 | ||
61 | dram_write: | |
62 | ; cli | |
63 | ldi temp2,RAM_DQ_MASK | (1<<ram_w) | (1<<ram_cas) | |
64 | out DDRC,temp2 | |
65 | ||
66 | mov temp2,temp | |
67 | andi temp,RAM_DQ_MASK & ~(1<<ram_w) | |
68 | ori temp,(1<<ram_cas) | |
69 | out PORTC,temp | |
70 | DRAM_SETADDR xh, ~0,(1<<ram_ras), ~(1<<ram_a8),(1<<ram_oe) | |
71 | cbi P_RAS,ram_ras | |
72 | DRAM_SETADDR xl, ~(1<<ram_ras),0, ~((1<<ram_a8)),(1<<ram_oe) | |
73 | cbi PORTC,ram_cas | |
74 | sbi PORTC,ram_cas | |
75 | ||
76 | sbi PORTD,ram_a8 | |
77 | swap temp2 | |
78 | ||
79 | andi temp2,RAM_DQ_MASK & ~(1<<ram_w) | |
80 | ori temp2,(1<<ram_cas) | |
81 | out PORTC,temp2 | |
82 | cbr temp2,(1<<ram_cas) | |
83 | out PORTC,temp2 | |
84 | ldi temp,~RAM_DQ_MASK | (1<<ram_w) | (1<<ram_cas) | |
85 | out PORTC,_255 | |
86 | out DDRC,temp | |
87 | out P_RAS,_255 | |
88 | ; sei | |
89 | ret | |
90 | ||
91 | ; vim:set ts=8 noet nowrap | |
92 |