]> cloudbase.mooo.com Git - avrcpm.git/blame_incremental - avr/virt_ports.asm
SVN --> GIT
[avrcpm.git] / avr / virt_ports.asm
... / ...
CommitLineData
1; Virtual Ports for the BIOS Interaction
2;
3; Copyright (C) 2010-2013 Leo C.
4;
5; This file is part of avrcpm.
6;
7; avrcpm is free software: you can redistribute it and/or modify it
8; under the terms of the GNU General Public License as published by
9; the Free Software Foundation, either version 3 of the License, or
10; (at your option) any later version.
11;
12; avrcpm is distributed in the hope that it will be useful,
13; but WITHOUT ANY WARRANTY; without even the implied warranty of
14; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15; GNU General Public License for more details.
16;
17; You should have received a copy of the GNU General Public License
18; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
19;
20; $Id: virt_ports.asm 242 2015-12-11 16:05:52Z rapid $
21;
22
23
24;
25; Port Direction Function
26;hex dez
27;-------------------------------------------------------------------------
28;00 0 in - Con status. (deprecated)
29; Returns 0xFF if the UART has a byte, 0 otherwise.
30;01 1 in/out - Console input, aka UDR. / Console Output
31;02 2 out - Console Output (deprecated)
32;03 3 in - "UART" status: bit 0 = rx (UARTRXRDY)
33; bit 1 = tx (UARTTXRDY)
34;03 3 out - "UART" control (tbd)
35;04 4 in/out - "UART" data register, no wait
36;
37;------------------------ Virtual I2C interface --------------------------
38;05 5 out - Control Port: 1 = Start read operation
39; 2 = Start write operation
40; 3 = Write 1 byte subaddress, then read
41;05 5 in - Status of last Transfer
42;06 6 in/out - Number of bytes to transfer, including Slave address
43;07,08 7,8 in/out - Read/Write address low/high
44;
45;------------------------ Debugging --------------------------------------
46;09 out - MEM dump: Number of bytes to print
47;0A,0B in/out - MEM dump: Start address
48;
49;------------------------ Version Information ----------------------------
50;0C out - 1 = Read VMAJOR
51; 2 = Read VMINOR
52; 4 = Read Version String
53;
54;------------------------ Disk I/O ---------------------------------------
55;0D,0E 13,14 in/out - Set address of Bios Controll Block
56;0F 15 in/out - Disk select
57;10,11 16,17 in/out - Track select
58;12,13 18,19 in/out - Sector select
59;14,15 20,21 in/out - Write addr
60;
61;16 22 out - Trigger disk i/o operations
62; Bit 7 = 1: Read sector
63; Bit 6 = 1: Write sector
64; Bit 5 = 1: BIOS WBOOT
65; Bit 4 = 1: BIOS Home
66; Only one of bits 4..7 may be set.
67; If Write function (bit 6=1):
68; Bits 0..2: 0 - write to allocated
69; 1 - write to directory
70; 2 - write unallocated
71; 3 - write to directory
72;
73;16 22 in - Result of last read/write operation.
74; 0x00 = ok, 0xff = error (--> Bad Sector)
75;
76;
77;------------------------ Wall Clock and Timers --------------------------
78;40 64-71 in/out - Timer/Clock control.
79;41-46
80;
81;47-4D in/out - clock in BCD format: ss, mm, hh, DD, MM, YYl, YYh
82;
83;------------------------ Debugging --------------------------------------
84;4F out - Debug: start/stop trace, print stack, ...
85;
86;------------------------ ISC16IS740 UART --------------------------------
87;50 RHR in Receive Holding
88;50 THR out Transmit Holding
89;51 IER in/out Interrupt Enable
90;52 IIR in Interrupt Identification
91;52 FCR out FIFO Control
92;53 LCR in/out Line Control
93;54 MCR in/out Modem Control
94;55 LSR in Line Status
95;56 MSR in Modem Status
96;57 SPR in/out Scratchpad
97;56 TCR in/out Transmission Control
98;57 TLR in/out Trigger Level
99;58 TXLVL in Transmit FIFO Level
100;59 RXLVL in Receive FIFO Level
101;5F EFCR in/out Extra Features
102;50 DLL in/out divisor latch LSB
103;51 DLH in/out divisor latch MSB
104;52 EFR in/out Enhanced Feature
105;54 XON1 in/out Xon1 word
106;55 XON2 in/out Xon2 word
107;56 XOFF1 in/out Xoff1 word
108;57 XOFF2 in/out Xoff2 word
109;
110;------------------------ Ports ------------------------------------------
111;80-87 in/out - Port-Expander PCF8574 (max. 8 Chips)
112;88-8F in/out - Port-Expander PCF8574A (not implemented yet!)
113
114
115; ---------------------------------------------- Start of Code Segment
116
117 .cseg
118vport_tbl:
119 .db 00,1 ;Port 0, length, 1 deprecated
120 .dw conStatus ; in
121 .dw dbgOut ; out
122
123 .db UARTDR,1 ;Port UARTDR, length 1
124 .dw uartgetc ; in
125 .dw uartputc ; out
126
127; .db 02,1 ;Port 2 (old console output)
128; .dw uartgetc ; filler
129; .dw uartputc ; deprecated
130
131 .db UARTCSR,1
132 .dw uartstat
133 .dw vport_out_dummy
134
135 .db 04,1
136 .dw uartin
137 .dw uartout
138
139 .db 13,9 ; Port 13-21, (length 9)
140 .dw dsk_param_get
141 .dw dsk_param_set
142 .db 22,1
143 .dw dskErrorRet
144 .dw dskDoIt
145
146 .db TIMERPORT,7
147 .dw utimeget
148 .dw utimeput
149
150 .db CLOCKPORT,7 ;Clock format (bcd): ss, mm, hh, DD, MM, YYl, YYh
151 .dw clockget
152 .dw clockput
153
154#if I2C_SUPPORT
155 .db I2CCTRL,1
156 .dw vi2c_stat_get
157 .dw vi2c_ctrl
158
159 .db I2CBLEN,3 ;
160 .dw vi2c_param_get
161 .dw vi2c_param_set
162
163#if I2C_UART_SUPPORT
164 .db I2C_UART,16
165 .dw SC16IS740_in
166 .dw SC16IS740_out
167#endif
168
169 .db PORT,8
170 .dw pcf8574_in
171 .dw pcf8574_out
172#endif
173 .db DEBUGPORT,1
174 .dw dbg_stat
175 .dw dbg_ctrl
176
177.if MEMDUMP_DEBUG
178 .db MEMDUMPPORT,3
179 .dw dbg_dump_rd
180 .dw dbg_dump
181.endif
182 .db 0x0C,1
183 .dw version_get
184 .dw version_ctrl
185
186 .db 0,0 ; Stop mark
187
188;---------------------------------------------------------------------
189
190;Called with port in temp2 and value in temp.
191portWrite:
192 set
193 rjmp vprw_start
194
195;Called with port in temp2. Should return value in temp.
196portRead:
197 clt
198
199vprw_start:
200 push yh
201 push yl
202.if PORT_DEBUG > 1
203 tst temp2
204 brne dvp_1 ;don't debug console status
205 brts dvp_1
206 rjmp conStatus
207dvp_1:
208 printnewline
209 brts dvp_11
210 printstring "Port In: "
211 rjmp dvp_12
212dvp_11:
213 printstring "Port Out: "
214dvp_12:
215 push temp
216 mov temp,temp2
217 rcall printhex
218 pop temp
219.endif
220 ldiw z,vport_tbl*2
221
222vprw_loop:
223 lpm _tmp0,z+
224 lpm _tmp1,z+ ;length
225 cp _tmp1,_0
226 breq vprw_exit ;no more ports
227
228 mov temp3,temp2
229 sub temp3,_tmp0 ;base port
230 brcs vprw_next ;port # too high
231 cp temp3,_tmp1 ;may be in range
232 brcs vprw_found ;
233vprw_next: ;port # not in range, test next block.
234 adiw z,4
235 rjmp vprw_loop
236vprw_found:
237 brtc PC+2 ;read or write?
238 adiw z,2 ;skip read function pointer
239 lpm _tmp0,z+
240 lpm zh,z
241 mov zl,_tmp0
242
243.if PORT_DEBUG > 1
244 push temp2
245 push temp
246 printstring ", exec: "
247 movw temp,z
248 rcall printhexw
249 printstring ", rel port: "
250 mov temp,temp3
251 rcall printhex
252 pop temp
253 pop temp2
254 printstring ", val: "
255 brts dvp_2
256 icall
257 rcall printhex
258 printstring " "
259 pop yl
260 pop yh
261 ret
262dvp_2:
263 rcall printhex
264 printstring " "
265 ; relative port # in temp3
266 icall
267 pop yl
268 pop yh
269 ret
270.else
271 icall
272 pop yl
273 pop yh
274 ret
275.endif
276
277vprw_exit:
278 ; trap for nonexistent port?
279.if PORT_DEBUG > 1
280 printstring ", not found!"
281.endif
282 ldi temp,0xff
283 pop yl
284 pop yh
285 ret
286
287vport_out_dummy:
288 ret
289
290;---------------------------------------------------------------------
291
292uartstat:
293 clr temp
294 lds temp2,rxcount
295 cpse temp2,_0
296 sbr temp,UARTRXRDY
297 lds temp2,txcount
298 cpi temp2,TXBUFSIZE
299 breq uartst_1
300 sbr temp,UARTTXRDY
301uartst_1:
302 ret
303
304uartin:
305 clr temp
306 lds temp2,rxcount
307 cpse temp2,_0
308 ljmp uartgetc
309 ret
310
311uartout:
312 lds temp2,txcount
313 cpi temp2,TXBUFSIZE
314 breq uartout_1
315 ljmp uartputc
316uartout_1:
317 ret
318
319
320conStatus:
321 lds temp,rxcount
322 cpse temp,_0
323 ldi temp,0xff
324 ret
325
326
327;---------------------------------------------------------------------
328
329dbgOut:
330 printnewline
331 printstring "Debug: "
332 lcall printhex
333 ret
334
335dbg_stat:
336 ldi temp,0
337 ret
338
339dbg_ctrl:
340 bmov intstat,i_trace, temp,0
341.if SRAM_FILL
342 sbrc temp,1
343 lcall stackusage_print
344.endif
345 ret
346
347;---------------------------------------------------------------------
348
349.if MEMDUMP_DEBUG
350
351 .dseg
352
353dbg_dump_addr:
354 .byte 2
355
356
357 .cseg
358
359dbg_dump_rd:
360 cpse temp3,_0
361 rjmp dbg_dump_rdad
362 ldi temp,0
363 ret
364
365dbg_dump_rdad:
366 dec temp3
367 brne dbg_dump_rdad1
368 lds temp,dbg_dump_addr+0
369 ret
370dbg_dump_rdad1:
371 lds temp,dbg_dump_addr+1
372 ret
373
374
375dbg_dump:
376 cpse temp3,_0
377 rjmp dbg_dump_store
378
379 mov temp3,temp
380 ldsw z,dbg_dump_addr
381
382 tst temp3
383 breq dbg_dumpl_1
384dbg_dumpl:
385 cpi temp3,16
386 brlo dbg_dump_u16
387dbg_dumpl_1:
388 lcall dbg_hexdump_line
389 subi temp3,16
390 adiw z,16
391 rjmp dbg_dumpl
392
393dbg_dump_u16:
394 tst temp3
395 breq dbg_dump_e
396 mov temp2,temp3
397 lcall dbg_hexdump
398dbg_dump_e:
399 ret
400
401dbg_dump_store:
402 dec temp3
403 brne dbg_dump_st1
404 sts dbg_dump_addr+0,temp
405 ret
406dbg_dump_st1:
407 sts dbg_dump_addr+1,temp
408 ret
409
410.endif
411
412;---------------------------------------------------------------------
413
414 .dseg
415vers_cmd:
416 .byte 1
417vers_pstr:
418 .byte 2
419
420 .cseg
421version_ctrl:
422 sts vers_cmd,temp
423 cpi temp,4
424 brne vc_e
425
426 ldiw z,version_string*2
427 stsw vers_pstr,z
428vc_e:
429 ret
430
431version_get:
432 lds temp2,vers_cmd
433 ldi temp,0
434 cpi temp2,0
435 breq vc_g_e
436 ldi temp,VMAJOR
437 cpi temp2,1
438 breq vc_g_e
439 ldi temp,VMINOR
440 cpi temp2,2
441 breq vc_g_e
442 ldi temp,0xFF
443 cpi temp2,4
444 brne vc_g_e
445
446 ldsw z,vers_pstr
447 lpm temp,z+
448 tst temp
449 breq vc_g_e
450 stsw vers_pstr,z
451
452vc_g_e:
453 ret
454
455
456;---------------------------------------------------------------------
457; vim:set ts=8 noet nowrap