; Configuration, hardware definition, ... ; ; Copyright (C) 2010 Sprite_tm ; Copyright (C) 2010,2012,2013 Leo C. ; ; This file is part of avrcpm. ; ; avrcpm is free software: you can redistribute it and/or modify it ; under the terms of the GNU General Public License as published by ; the Free Software Foundation, either version 3 of the License, or ; (at your option) any later version. ; ; avrcpm is distributed in the hope that it will be useful, ; but WITHOUT ANY WARRANTY; without even the implied warranty of ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ; GNU General Public License for more details. ; ; You should have received a copy of the GNU General Public License ; along with avrcpm. If not, see . ; ; $Id$ #define VMAJOR 3 /* Version number */ #define VMINOR 2 ;----------------------------------------------------------------------- ; ; Hardware and feature configuration ; ; Supported MCUs are: atmega328P atmega168 atmega88 atmega8 ; Z80 emulation currently needs atmega328P, so this is the default. ;#define atmega328p ; MCU frequency in Hz. ;#define F_CPU 20000000 ; Set this to 0, if you have a (one) DRAM chip whith 4 Bit data bus. ;#define DRAM_8BIT 1 ; Baudrate of serial port (console). ;#define BAUD 115200 ; I2C_SUPPORT defaults to 1 on 8-bit-ram systems and must be 0 on 4-bit-ram systems. ; Set this do 0, if you don't have I2C peripherals and want to save some flash ; or use the I2C pins for other purposes. ;#define I2C_SUPPORT ; Emulate Z80 cpu if 1, 8080 otherwise. ; ;#define EM_Z80 1 ; Uncomment and set RAMDISKCOUNT to 1-4 if you want to test the experimental and ; unsupported ramdisk feature . Number depends on actual ram size (256kx4 - 4Mx8) ; and bios dpb/dph definitions. ;#define RAMDISKCNT 0 ; Uncomment and set to 0, if you need to save flash (ie. ATmega88). ;#define FAT16_SUPPORT 1 ; Uncomment and set to 0, if you don't want to use CP/M partitions. ; (Saves some bytes.) ;#define CPMDSK_SUPPORT 1 ; Uncomment and set to 0, if you need to save flash. ;#define MMCBOOTLOADER 1 ; Uncomment to disable ADC support ;#define ADC_SUPPORT 0 ;----------------------------------------------------------------------- ;Debugging aids .equ BOOTWAIT = 1 .equ MEMTEST = 1 .equ MEMFILL = 1 /* Fill DRAM */ .equ SRAM_FILL = 1 /* Fill unused SRAM */ .equ MMC_DEBUG = 0 /* Increase for more debugging */ .equ MMC_DEBUG_RDW = 0 .equ DSKSEL_DEBUG = 0 .equ DISK_DEBUG = 0 /* 1 = BOOT/HOME debug, 2 = +R/W debug */ .equ HOSTRW_DEBUG = 0 .equ FAT16_DEBUG = 0 .equ FAT16_DBG_FAT = 0 .equ HEAP_DEBUG = 0 .equ PORT_DEBUG = 0 .equ INS_DEBUG = 0 .equ STACK_DBG = 0 .equ PRINT_PC = 0 .equ TIMER_DEBUG = 0 ;----------------------------------------------------------------------- ; Z80/8080 Virtual Ports #define UARTDR 1 /* UART Data Register */ #define UARTCSR 3 /* UART Control/Status Register */ #define UARTRXRDY 0x01 /* RxReady Status Bit Mask */ #define UARTTXRDY 0x02 /* TxReady Status Bit Mask */ #define READ_FUNC 7 #define WRITE_FUNC 6 #define BOOT_FUNC 5 #define HOME_FUNC 4 #define TIMERPORT 0x40 /* Base z80 port address for clock access */ #define TIMER_CTL TIMERPORT #define TIMER_MSECS TIMERPORT+1 #define TIMER_SECS TIMER_MSECS+2 #define CLOCKPORT TIMERPORT+7 /* Real time clock BCD (ss,mm,hh,DD,MM,YYYY) */ #define starttimercmd 1 #define quitTimerCmd 2 #define printTimerCmd 15 #define uptimeCmd 16 #define DEBUGPORT 0x4F #define startTraceCmd 0x01 /* 'OUT (DEBUGPORT),startTraceCmd' starts tracing */ #define stopTraceCmd 0x00 #define PrintStackCmd 0x02 ; Virtual I2C Interface #define I2CSTAT 0x05 #define I2CCTRL 0x05 #define I2CBLEN 0x06 #define I2CADR 0x07 #define I2CADRL 0x07 #define I2CADRH 0x08 ; Simple ADC Interface #define ADC80 0x17 /* Read Value from ADC6 Pin, 8 bit */ #define ADC81 0x18 /* Read Value from ADC7 Pin, 8 bit */ #define ADCTEMP 0x19 /* Read Value from Temp Sensor, 8 bit */ #define ADCBGL 0x20 /* Read 1.1V Bandgap, 10 bit */ #define ADCBGH 0x21 /* Read 1.1V Bandgap, 10 bit */ ; Port-Expander PCF8574 #define PORT 0x80 #define PORT0 0x80 #define PORT1 0x81 #define PORT2 0x82 #define PORT3 0x83 #define PORT4 0x84 #define PORT5 0x85 #define PORT6 0x86 #define PORT7 0x87 ;----------------------------------------------------------------------- ; #define IPLADDR 0x2000 /* Bootloader load address */ #define DRAM_WAITSTATES 1 /* Number of additional clock cycles for dram read access */ #define REFR_RATE 64000 /* dram refresh rate in cycles/s. */ /* Most drams need 1/15.6µs. */ #define RXBUFSIZE 128 /* USART recieve buffer size. Must be power of 2 */ #define TXBUFSIZE 32 /* USART transmit buffer size. Must be power of 2 */ #define I2C_CLOCK 100000 /* 100kHz */ #define I2C_BUFSIZE 17 /* largest message size including address byte (SLA) */ #define MMC_SPI2X 1 /* 0 = SPI CLK/4, 1 = SPI CLK/2 */ #define MEMFILL_VAL 0x76 /* Fill ram with HALT opcode. */ #define DBG_TRACE_BOTTOM 0x01 /* Page boundaries for INS_DEBUG and PRINT_PC */ #define DBG_TRACE_TOP 0xdc /* Trace is off, below bottom page and above top page. */ #define SRAMFILL_VAL 0x5A /* Fill unused SRAM */ ; define PARTID 0x52 /* Partition table id */ /* http://www.win.tue.nl/~aeb/partitions/partition_types-1.html */ ; Partition Table Structures #define PART_TYPE 4 #define PART_START 8 #define PART_SIZE 12 /* * Partition table id * (see http://www.win.tue.nl/~aeb/partitions/partition_types-1.html) */ #define PARTID1_FAT16 0x0E #define PARTID2_FAT16 0x06 #define PARTID_CPM 0x52 ;----------------------------------------------------------------------- ; #ifndef DRAM_8BIT #define DRAM_8BIT 1 /* 1 = 8bit wide data bus to DRAM (ie two 4-bit Chips)*/ #endif /* 0 = only one 4 bit wide DRAM chip */ #ifndef F_CPU #define F_CPU 20000000 /* system clock in Hz; defaults to 20MHz */ #endif #ifndef BAUD #define BAUD 115200 /* console baud rate */ #endif #ifndef I2C_SUPPORT #define I2C_SUPPORT DRAM_8BIT /* I2C requires 8 bit DRAM */ #endif #if I2C_SUPPORT && !DRAM_8BIT #error "I2C_SUPPORT requires 8 bit DRAM (DRAM_8BIT=1)!" #endif #ifndef ADC_SUPPORT #define ADC_SUPPORT 1 #endif #ifndef EM_Z80 #define EM_Z80 1 /* Emulate Z80 if true, else 8080 */ #endif #ifndef CPMDSK_SUPPORT #define CPMDSK_SUPPORT 1 /* Include Support for CP/M partitions */ #endif #ifndef FAT16_SUPPORT #define FAT16_SUPPORT 1 /* Include Support for a FAT16 partition */ #endif /* which may contain CP/M image files. */ #ifndef RAMDISKCNT #define RAMDISKCNT 0 /* Number of RAM disks */ #endif #define RAMDISKNR 'I'-'A' /* Drive "letter" for first RAM disk */ /* MMC/SD Bootloader support. */ #define BOOTLDRSIZE 2048 /* Bytes needed for Bootloader (1024 Words Bootsection Size) */ #define DEVID_S "ACPM" #ifndef MMCBOOTLOADER #define MMCBOOTLOADER 1 #endif #ifndef TESTVERSION #define TESTVERSION 0 #endif ;----------------------------------------------------------------------- ; Port declarations #if DRAM_8BIT /* Implies software uart */ ;Port D .equ RAM_D0 = 0 .equ RAM_D1 = 1 .equ RAM_D2 = 2 .equ RAM_D3 = 3 .equ RAM_D4 = 4 .equ RAM_D5 = 5 .equ RAM_D6 = 6 .equ RAM_D7 = 7 .equ RAM_A0 = 0 .equ RAM_A1 = 1 .equ RAM_A2 = 2 .equ RAM_A3 = 3 .equ RAM_A4 = 4 .equ RAM_A5 = 5 .equ RAM_A6 = 6 .equ RAM_A7 = 7 ;Port B .equ MMC_MOSI = 3 .equ MMC_MISO = 4 .equ MMC_SCK = 5 .equ RAM_A8 = 3 .equ RAM_A9 = 4 .equ RAM_A10 = 5 .equ RXD = 0 .equ TXD = 1 .equ MMC_CS = 2 .equ P_MMC_CS = PORTB .equ P_A8 = PORTB .equ P_RXD = PORTB .equ P_TXD = PORTB ;Port C .equ RAM_RAS = 0 .equ RAM_CAS = 1 .equ RAM_OE = 2 .equ RAM_W = 3 .equ P_RAS = PORTC .equ P_CAS = PORTC .equ P_OE = PORTC .equ P_W = PORTC #else /* 4 bit RAM, hardware uart */ ; Port D .equ RXD = 0 .equ TXD = 1 .equ RAM_OE = 2 .equ RAM_A8 = 3 .equ MMC_CS = 4 .equ RAM_A5 = 5 .equ RAM_A6 = 6 .equ RAM_A7 = 7 .equ P_RXD = PORTD .equ P_OE = PORTD .equ P_A8 = PORTD .equ P_MMC_CS = PORTD .equ P_AH = PORTD ; RAM_A[7..5] .equ RAM_AH_MASK = (1<