; Configuration, hardware definition, ...
-;
+;
; Copyright (C) 2010 Sprite_tm
; Copyright (C) 2010,2012,2013 Leo C.
;
; You should have received a copy of the GNU General Public License
; along with avrcpm. If not, see <http://www.gnu.org/licenses/>.
;
-; $Id$
+; $Id: config.inc 242 2015-12-11 16:05:52Z rapid $
+
+#define VMAJOR 3 /* Version number */
+#define VMINOR 5
+#define VERS_STR "3.5"
-#define VMAJOR 3 /* Version number */
-#define VMINOR 2
;-----------------------------------------------------------------------
;
; Hardware and feature configuration
;
-; Supported MCUs are: atmega328P atmega168 atmega88 atmega8
+; Supported MCUs are: atmega328P atmega168 atmega88 atmega8
; Z80 emulation currently needs atmega328P, so this is the default.
;#define atmega328p
;#define BAUD 115200
; I2C_SUPPORT defaults to 1 on 8-bit-ram systems and must be 0 on 4-bit-ram systems.
-; Set this do 0, if you don't have I2C peripherals and want to save some flash
+; Set this do 0, if you don't have I2C peripherals and want to save some flash
; or use the I2C pins for other purposes.
-;#define I2C_SUPPORT
+;#define I2C_SUPPORT
+
+; Support for the SC16IS740 I2C UART chip is included automatically, when
+; I2C support is enabled. Uncomment and set to 0 if you don't want support for
+; the SC16IS740 I2C UART chip.
+;#define I2C_UART_SUPPORT 1
; Emulate Z80 cpu if 1, 8080 otherwise.
;
;#define EM_Z80 1
-; Uncomment and set RAMDISKCOUNT to 1-4 if you want to test the experimental and
-; unsupported ramdisk feature . Number depends on actual ram size (256kx4 - 4Mx8)
+; Uncomment and set RAMDISKCOUNT to 1-4 if you want to test the experimental and
+; unsupported ramdisk feature . Number depends on actual ram size (256kx4 - 4Mx8)
; and bios dpb/dph definitions.
;#define RAMDISKCNT 0
; Uncomment and set to 0, if you need to save flash.
;#define MMCBOOTLOADER 1
-; Uncomment to disable ADC support
-;#define ADC_SUPPORT 0
-
;-----------------------------------------------------------------------
;Debugging aids
-.equ BOOTWAIT = 1
-.equ MEMTEST = 1
-.equ MEMFILL = 1
-.equ MMC_DEBUG = 0 /* Increase for more debugging */
-.equ MMC_DEBUG_RDW = 0
-.equ DSKSEL_DEBUG = 0
-.equ DISK_DEBUG = 0 /* 1 = BOOT/HOME debug, 2 = +R/W debug */
-.equ HOSTRW_DEBUG = 0
-.equ FAT16_DEBUG = 0
-.equ FAT16_DBG_FAT = 0
-.equ HEAP_DEBUG = 0
-.equ PORT_DEBUG = 0
-.equ INS_DEBUG = 0
-.equ STACK_DBG = 0
-.equ PRINT_PC = 0
-.equ TIMER_DEBUG = 0
+.equ BOOTWAIT = 1
+.equ MEMTEST = 1
+.equ MEMFILL = 1 /* Fill DRAM */
+.equ SRAM_FILL = 1 /* Fill unused SRAM */
+.equ MMC_DEBUG = 0 /* Increase for more debugging */
+.equ MMC_DEBUG_RDW = 0
+.equ DSKSEL_DEBUG = 0
+.equ DISK_DEBUG = 0 /* 1 = BOOT/HOME debug, 2 = +R/W debug */
+.equ HOSTRW_DEBUG = 0
+.equ FAT16_DEBUG = 0
+.equ FAT16_DBG_FAT = 0
+.equ HEAP_DEBUG = 0
+.equ PORT_DEBUG = 0
+.equ INS_DEBUG = 0
+.equ STACK_DBG = 0
+.equ PRINT_PC = 0
+.equ TIMER_DEBUG = 0
+.equ I2C_STATE_DEBUG = 0
+.equ MEMDUMP_DEBUG = 1
;-----------------------------------------------------------------------
; Z80/8080 Virtual Ports
+#define UARTDR 1 /* UART Data Register */
+#define UARTCSR 3 /* UART Control/Status Register */
+#define UARTRXRDY 0x01 /* RxReady Status Bit Mask */
+#define UARTTXRDY 0x02 /* TxReady Status Bit Mask */
+
#define READ_FUNC 7
#define WRITE_FUNC 6
#define BOOT_FUNC 5
#define printTimerCmd 15
#define uptimeCmd 16
-#define DEBUGPORT 0x4F
+#define MEMDUMPPORT 0x09
+#define DEBUGPORT 0x4F
-#define startTraceCmd 1 /* 'OUT (DEBUGPORT),startTraceCmd' starts tracing */
-#define stopTraceCmd 0
+#define startTraceCmd 0x01 /* 'OUT (DEBUGPORT),startTraceCmd' starts tracing */
+#define stopTraceCmd 0x00
+#define PrintStackCmd 0x02
; Virtual I2C Interface
#define I2CSTAT 0x05
#define I2CADRL 0x07
#define I2CADRH 0x08
-; Simple ADC Interface
-#define ADC80 0x17 /* Read Value from ADC6 Pin, 8 bit */
-#define ADC81 0x18 /* Read Value from ADC7 Pin, 8 bit */
-#define ADCTEMP 0x19 /* Read Value from Temp Sensor, 8 bit */
-#define ADCBGL 0x20 /* Read 1.1V Bandgap, 10 bit */
-#define ADCBGH 0x21 /* Read 1.1V Bandgap, 10 bit */
-
+; ISC16IS740 UART
+#define I2C_UART 0x50 /* ISC16IS740 base port */
; Port-Expander PCF8574
#define PORT 0x80
;-----------------------------------------------------------------------
;
-#define PARTID 0x52 /* Partition table id */
- /* http://www.win.tue.nl/~aeb/partitions/partition_types-1.html */
#define IPLADDR 0x2000 /* Bootloader load address */
#define DRAM_WAITSTATES 1 /* Number of additional clock cycles for dram read access */
#define REFR_RATE 64000 /* dram refresh rate in cycles/s. */
/* Most drams need 1/15.6µs. */
#define RXBUFSIZE 128 /* USART recieve buffer size. Must be power of 2 */
-#define TXBUFSIZE 32 /* USART transmit buffer size. Must be power of 2 */
+.if SRAM_SIZE > 1024
+ .equ TXBUFSIZE = 128 /* USART transmit buffer size. Must be power of 2 */
+.else
+ .equ TXBUFSIZE = 32 /* USART transmit buffer size. Must be power of 2 */
+.endif
+
+.if SRAM_SIZE > 1024
+ .equ FAT16_FATBUF = 1
+.else
+ .equ FAT16_FATBUF = 0
+.endif
+
#define I2C_CLOCK 100000 /* 100kHz */
-#define I2C_BUFSIZE 17 /* largest message size including address byte (SLA) */
+#define I2C_BUFSIZE 66 /* largest message size + slave address (SLA) + subaddress */
#define MMC_SPI2X 1 /* 0 = SPI CLK/4, 1 = SPI CLK/2 */
#define MEMFILL_VAL 0x76 /* Fill ram with HALT opcode. */
#define DBG_TRACE_BOTTOM 0x01 /* Page boundaries for INS_DEBUG and PRINT_PC */
#define DBG_TRACE_TOP 0xdc /* Trace is off, below bottom page and above top page. */
+#define SRAMFILL_VAL 0x5A /* Fill unused SRAM */
+
+; define PARTID 0x52 /* Partition table id */
+ /* http://www.win.tue.nl/~aeb/partitions/partition_types-1.html */
+; Partition Table Structures
+#define PART_TYPE 4
+#define PART_START 8
+#define PART_SIZE 12
+
+/*
+ * Partition table id
+ * (see http://www.win.tue.nl/~aeb/partitions/partition_types-1.html)
+ */
+#define PARTID1_FAT16 0x0E
+#define PARTID2_FAT16 0x06
+#define PARTID_CPM 0x52
+
+
+;-----------------------------------------------------------------------
+;
#ifndef DRAM_8BIT
#define DRAM_8BIT 1 /* 1 = 8bit wide data bus to DRAM (ie two 4-bit Chips)*/
#endif /* 0 = only one 4 bit wide DRAM chip */
#if I2C_SUPPORT && !DRAM_8BIT
#error "I2C_SUPPORT requires 8 bit DRAM (DRAM_8BIT=1)!"
#endif
-#ifndef ADC_SUPPORT
- #define ADC_SUPPORT 1
+#ifndef I2C_UART_SUPPORT
+ #define I2C_UART_SUPPORT I2C_SUPPORT
+#endif
+#if I2C_UART_SUPPORT
+ #define SC16IS740_ADDR 0x90 /* SC16IS740 I2C address. (8bit, A0=VDD, A1=VDD) */
+ #define SC16IS740_CLOCK 9216000 /* */
#endif
#ifndef EM_Z80
#endif
#ifndef CPMDSK_SUPPORT
- #define CPMDSK_SUPPORT 1 /* Include Support for CP/M partitions */
-#endif
+ #define CPMDSK_SUPPORT 1 /* Include Support for CP/M partitions */
+#endif
#ifndef FAT16_SUPPORT
#define FAT16_SUPPORT 1 /* Include Support for a FAT16 partition */
-#endif /* which may contain CP/M image files. */
+#endif /* which may contain CP/M image files. */
#ifndef RAMDISKCNT
#define RAMDISKCNT 0 /* Number of RAM disks */
#define MMCBOOTLOADER 1
#endif
#ifndef TESTVERSION
- #define TESTVERSION 0
+ #define TESTVERSION 0
#endif
+#define TC_1MS (F_CPU/1000)
+#define TC_1US (F_CPU/1000000)
+
;-----------------------------------------------------------------------
; Port declarations
.equ RAM_CAS = 1
.equ RAM_OE = 2
.equ RAM_W = 3
+.equ SDA = 4
+.equ SCL = 5
.equ P_RAS = PORTC
.equ P_CAS = PORTC
.equ P_OE = PORTC
.equ P_W = PORTC
+.equ P_I2C = PORTC
#else /* 4 bit RAM, hardware uart */
.def z_c = r8 ;
.def z_b = r9 ;
+.def z_bcl = r8 ;
+.def z_bch = r9 ;
.def z_e = r10 ;
.def z_d = r11 ;
+.def z_del = r10 ;
+.def z_deh = r11 ;
.def z_l = r12 ;
.def z_h = r13 ;
+.def z_hll = r12 ;
+.def z_hlh = r13 ;
.def z_spl = r14 ;
.def z_sph = r15 ;
.def temp = r16 ;
.equ flags = UBRRL ;UART is unused with 8-Bit RAM
#else
.equ flags = TWBR ;TWI is unused with 4-Bit RAM
- #endif
+ #endif
.equ P_PUD = SFIOR
-#else
+#else
.equ flags = GPIOR0
.equ P_PUD = MCUCR
#define CPUSTR "8080"
#endif
#if TESTVERSION
- #define TESTSTR "Test"
+ #define TESTSTR " Test"
#else
#define TESTSTR ""
#endif
#endif
; vim:set ts=8 noet nowrap
-
projects / avrcpm.git / blobdiff