SVN --> GIT

[avrcpm.git] / cpm / CFGACPM.LIB

diff --git a/cpm/CFGACPM.LIB b/cpm/CFGACPM.LIB
index 6f30879d7745f1aacd924f31d43eada512634f56..f664e0e27bb1cc2b88bf48c884cda02f0c1667b3 100644 (file)
--- a/cpm/CFGACPM.LIB
+++ b/cpm/CFGACPM.LIB
@@ -29,11 +29,95 @@ iobyte      equ     0003h           ;intel iobyte
 buff   equ     0080h           ;default buffer address\r
 retry  equ     3               ;max retries on disk i/o before error\r
 \r
+\r
+;copy from avr/virt_ports.asm:\r
+;\r
+;   Port        Direction  Function\r
+;hex   dez\r
+;-------------------------------------------------------------------------\r
+;00    0       in      - Con status. (deprecated)\r
+;                        Returns 0xFF if the UART has a byte, 0 otherwise.\r
+;01    1       in/out  - Console input, aka UDR. / Console Output\r
+;02    2       out     - Console Output (deprecated)\r
+;03    3       in      - "UART" status: bit 0 = rx (UARTRXRDY) \r
+;                                       bit 1 = tx (UARTTXRDY)\r
+;03    3       out     - "UART" control (tbd)\r
+;04    4       in/out  - "UART" data register, no wait\r
+;\r
+;------------------------ Virtual I2C interface --------------------------\r
+;05    5       out     - Control Port: 1 = Start read operation\r
+;                                      2 = Start write operation \r
+;05    5       in      - Status of last Transfer: 0 = ok, else fail\r
+;06    6       in/out  - Number of bytes to transfer, including Slave address\r
+;07,08 7,8     in/out  - Read/Write address low/high\r
+;\r
+;------------------------ Disk I/O ---------------------------------------\r
+;0D,0E 13,14   in/out  - Set address of Bios Controll Block\r
+;0F    15      in/out  - Disk select\r
+;10,11  16,17  in/out  - Track select\r
+;12,13         18,19   in/out  - Sector select\r
+;14,15         20,21   in/out  - Write addr\r
+;              \r
+;16    22      out     - Trigger disk i/o operations\r
+;                        Bit 7 = 1: Read sector\r
+;                        Bit 6 = 1: Write sector\r
+;                        Bit 5 = 1: BIOS WBOOT\r
+;                        Bit 4 = 1: BIOS Home\r
+;                        Only one of bits 4..7  may be set.\r
+;                        If Write function (bit 6=1):\r
+;                         Bits 0..2: 0 - write to allocated\r
+;                                    1 - write to directory\r
+;                                    2 - write unallocated\r
+;                                    3 - write to directory                     \r
+;\r
+;16    22      in      - Result of last read/write operation.\r
+;                        0x00 = ok, 0xff = error (--> Bad Sector)\r
+;\r
+;\r
+;------------------------ ADC Interface ----------------------------------\r
+;17-19 23,25   in      - ADC Channels 6,7 and 8 (Temp-Sensor) \r
+;                              ADC 6,7 only Devices in 32 pin Case (TQFP/MLF)\r
+;                              8 Bit only\r
+;                              Fixed ADC clock (FCPU/128, 156KHz at 20MHz CPU)\r
+;                              Vref = VCC\r
+;20,21         in      - ADC: Measure VCC\r
+;\r
+;------------------------ Wall Clock and Timers --------------------------\r
+;40    64-71   in/out  - Timer/Clock control.  \r
+;41-46\r
+;\r
+;47-4D         clock   - BCD format: ss, mm, hh,  DD, MM, YYl, YYh\r
+;\r
+;4F            debug   - start/stop trace, print stack, ...\r
+;\r
+;------------------------ Ports ------------------------------------------\r
+;80-87         in/out  - Port-Expander PCF8574 (max. 8 Chips)\r
+;88-8F         in/out  - Port-Expander PCF8574A (not implemented yet!)\r
+\r
+;-----------------------------------------------------------------------\r
+; Z80/8080 Virtual Ports\r
+\r
+UARTDR     equ 1               ;UART Data Register\r
+UARTCSR     equ        3               ;UART Control/Status Register\r
+UARTRXRDY   equ        01h             ;RxReady Status Bit Mask\r
+UARTTXRDY   equ        02h             ;TxReady Status Bit Mask\r
+\r
 READ_FUNC   equ        7\r
 WRITE_FUNC  equ        6\r
 BOOT_FUNC   equ 5\r
 HOME_FUNC   equ 4\r
 \r
-cr equ 13\r
-lf equ 10\r
+TIMERCTL       equ     040h\r
+TIMER_MSECS    equ     TIMERCTL+1\r
+TIMER_SECS     equ     TIMER_MSECS+2\r
+starttimercmd  equ     1\r
+quitTimerCmd   equ     2\r
+printTimerCmd  equ     15\r
+uptimeCmd      equ     16\r
+\r
+CLOCKPORT      equ     TIMERCTL+7\r
+\r
+DEBUGPORT      equ     04FH\r
+StartTraceCmd  equ     1\r
+StopTraceCmd   equ     0\r
 \r