\r
maclib CFGACPM.LIB\r
\r
+cr equ 0dh\r
+lf equ 0ah\r
+\r
aseg\r
org 100h\r
.phase bios\r
.z80\r
\r
-nsects equ ($-ccp)/128 ;warm start sector count\r
+nsects equ ($-ccp)/128 ;warm start sector count\r
\r
- jp boot\r
+ jp boot\r
wboote: \r
- jp wboot\r
- jp const\r
- jp conin\r
- jp conout\r
- jp list\r
- jp punch\r
- jp reader\r
- jp home\r
- jp seldsk\r
- jp settrk\r
- jp setsec\r
- jp setdma\r
- jp read\r
- jp write\r
- jp listst\r
- jp sectran\r
+ jp wboot\r
+ jp const\r
+ jp conin\r
+ jp conout\r
+ jp list\r
+ jp punch\r
+ jp reader\r
+ jp home\r
+ jp seldsk\r
+ jp settrk\r
+ jp setsec\r
+ jp setdma\r
+ jp read\r
+ jp write\r
+ jp listst\r
+ jp sectran\r
+ jp 0 ;zsdos (?)\r
+ jp 0 ;zsdos (?)\r
+ jp 0 ;zsdos (?)\r
+ jp clock ;zsdos compatible clock set/get\r
+\r
\r
.8080\r
maclib AVRCPM.LIB\r
\r
;Drive A B C D E F G H I J K L\r
-;drvtbl: dtbl <dpha,dphb,dphc,dphd, , , , ,dphi,dphj,dphk,dphl>\r
-;drvtbl: dtbl <dpha, , , , , , , ,dphi,dphj,dphk,dphl>\r
-drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl>\r
+;drvtbl:dtbl <dpha,dphb,dphc,dphd, , , , ,dphi,dphj,dphk,dphl>\r
+;drvtbl:dtbl <dpha, , , , , , , ,dphi,dphj,dphk,dphl>\r
+;drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl>\r
+drvtbl:dtbl < , , , , , , , ,dphi>\r
\r
; Name spt bls dks dir cks off\r
; dpb dpb243, 26, 1024, 243, 64, 64, 2\r
; dpb dp8192s,32, 4096,2046, 512, 512, 2\r
; dpb dp8192, 32, 4096,2046,1024,1024, 2\r
; dpb dpbrd, 32, 1024, 56, 32, 0, 2\r
- dpb rd1016, 32, 2048, 508, 192, 0, 2\r
- dpb rd1024, 32, 2048, 512, 192, 0, 0\r
- dpb rd0960, 32, 2048, 480, 192, 0, 0\r
+ dpb rd192, 32, 1024, 192, 32, 0, 0\r
+; dpb rd1016, 32, 2048, 508, 192, 0, 2\r
+; dpb rd1024, 32, 2048, 512, 192, 0, 0\r
+; dpb rd0960, 32, 2048, 480, 192, 0, 0\r
\r
;dpha: dph dpb243\r
;dphb: dph dpb243\r
;dphb: dph dp8192s\r
;dphc: dph dp8192\r
;dphd: dph dp8192\r
-dphi: dph rd1016\r
-dphj: dph rd1024\r
-dphk: dph rd1024\r
-dphl: dph rd0960\r
+;dphi: dph rd1016\r
+dphi: dph rd192\r
+;dphj: dph rd1024\r
+;dphk: dph rd1024\r
+;dphl: dph rd0960\r
\r
.z80\r
\r
db cr,lf,0\r
\r
const:\r
- in a,(0)\r
+ in a,(UARTCSR)\r
+ and UARTRXRDY\r
+ ret z\r
+ or 0ffh\r
ret\r
\r
conin:\r
- in a,(0)\r
- cp 0ffh\r
- jp nz,conin\r
+ in a,(UARTCSR)\r
+ rra\r
+ jp nc,conin\r
\r
- in a,(1)\r
+ in a,(UARTDR)\r
ret\r
\r
conout:\r
- ld a,c\r
- out (1),a\r
+ ld a,c\r
+ out (UARTDR),a\r
ret\r
\r
list:\r
ret\r
\r
listst:\r
- ld a,0\r
+ ld a,0\r
ret\r
\r
punch:\r
ret\r
\r
reader:\r
- ld a,01Fh\r
+ ld a,01Fh\r
ret\r
\r
prmsg:\r
out (22),a\r
ld a,(bootdsk)\r
ld c,a\r
+ ld e,0 ;clear reselection flag\r
call seldsk\r
call home\r
ld b,nsects\r
\r
\r
home:\r
- ld a,1 shl HOME_FUNC\r
- out (22),a\r
+ ld a,1 shl HOME_FUNC\r
+ out (22),a\r
\r
- ld bc,0 ; same as seek to track 0\r
+ ld bc,0 ; same as seek to track 0\r
settrk:\r
- ld a,c\r
- out (16),a\r
- ld a,b\r
- out (17),a\r
+ ld a,c\r
+ out (16),a\r
+ ld a,b\r
+ out (17),a\r
ret\r
\r
setsec:\r
- ld a,c\r
- out (18),a\r
+ ld a,c\r
+ out (18),a\r
ret\r
\r
setdma:\r
- ld a,c\r
- out (20),a\r
- ld a,b\r
- out (21),a\r
+ ld a,c\r
+ out (20),a\r
+ ld a,b\r
+ out (21),a\r
ret\r
\r
read:\r
- ld a,1 shl READ_FUNC\r
- out (22),a\r
- in a,(22)\r
- and 1\r
+ ld a,1 shl READ_FUNC\r
+ out (22),a\r
+ in a,(22)\r
+ and 1\r
ret\r
\r
write:\r
ld a,c\r
- and 3 ;mask write type\r
+ and 3 ;mask write type\r
or 1 shl WRITE_FUNC\r
out (22),a\r
- in a,(22)\r
- and 1\r
+ in a,(22)\r
+ and 1\r
ret\r
\r
sectran:\r
;translate sector bc using table at de, res into hl\r
- ld h,b\r
- ld l,c\r
- ld a,d\r
- or e\r
- ret z\r
- ex de,hl\r
- add hl,bc\r
- ld l,(hl)\r
- ld h,0\r
+ ld h,b\r
+ ld l,c\r
+ ld a,d\r
+ or e\r
+ ret z\r
+ ex de,hl\r
+ add hl,bc\r
+ ld l,(hl)\r
+ ld h,0\r
ret\r
\r
+;------------------------------------------------------------------------\r
+; ZSDOS clock drivers may use registers BC and D without restoring them, \r
+; but must preserve the Z80's alternate and index registers. \r
+; Other registers must be used exactly as follows:\r
+;\r
+; Enter: C = 00H to Read the Clock, 01H to Set the Clock\r
+; DE = Address of a 6-byte field to Receive or from which \r
+; to Set time in DateStamper format (BCD digits as: \r
+; YY MM DD HH MM SS). 24-hour operation is assumed.\r
+;\r
+; Exit : A = 01H for a successful operation,\r
+; 0FFH for a failure of any sort (Can't set, etc.)\r
+;\r
+; When Reading the Clock:\r
+; E = Original contents of Entry value of DE plus 5\r
+; HL = Entry value of DE plus 5 (Seconds field)\r
+\r
+clock:\r
+ dec c\r
+ jr z,clk_set\r
+ inc c\r
+ ret nz\r
+\r
+clk_get:\r
+ ld hl,5\r
+ add hl,de\r
+ push hl\r
+ ld bc,6*256 + CLOCKPORT-1\r
+ ld e,(hl)\r
+clk_gl:\r
+ inc c\r
+ ind\r
+ jr nz,clk_gl\r
+ pop hl\r
+ jr clk_e\r
+\r
+\r
+clk_set:\r
+ ld a,(hl)\r
+ cp 78h\r
+ ld a,19h\r
+ jr nc,clk_s1\r
+ ld a,20h\r
+clk_s1:\r
+ out (CLOCKPORT+6),a\r
+ ld bc,6*256 + CLOCKPORT+6\r
+clk_sl:\r
+ dec c\r
+ outi\r
+ jr nz,clk_sl\r
+ dec hl\r
+clk_e:\r
+ ld a,1\r
+ ret\r
+\r
+;------------------------------------------------------------------------\r
+\r
bcb: dw drvtbl\r
dw dirbuf\r
dw enddat\r
projects / avrcpm.git / blobdiff