; mem_read_ds destreg, memaddr
.macro mem_read_ds
- cli ;1
+; cli ;1
out PORTD,@1h ;1
out PORTC,_RAS0 ;1
out PORTD,@1l ;1
dram_wait DRAM_WAITSTATES ;
in @0,PIND ;1
out PORTC,_255 ;1
- sei ;1
+; sei ;1
out DDRD,_255 ;1 = 14 + DRAM_WAITSTATES
.endm
; mem_write_ds memaddr, sourcereg
.macro mem_write_ds
- cli ;1
+; cli ;1
out PORTD,@0h ;1
out PORTC,_RAS0 ;1
out PORTD,@0l ;1
out PORTC,_CAS0 ;1
out PORTD,@1 ;1
out PORTC,_WE ;1
- sei ;1
+; sei ;1
out PORTC,_255 ;1 = 9
.endm
; temp = srcreg
.macro mem_write_d
- mem_write_ds @0, temp
+ mem_write_ds @0, temp
.endm
;----------------------------------------------
; xh = memaddrh, xl = memaddrl
.macro mem_write_s
- mem_write_ds x, @0
+ mem_write_ds x, @0
.endm
;----------------------------------------------
.macro mem_write
mem_write_ds x, temp
.endm
-
-