;
.dseg
-
+z_regs:
z_b: .byte 1
z_c: .byte 1
z_d: .byte 1
z_h: .byte 1
z_l: .byte 1
+ .equ oz_b = 0
+ .equ oz_c = 1
+ .equ oz_d = 2
+ .equ oz_e = 3
+ .equ oz_h = 4
+ .equ oz_l = 5
+
+
+#if EM_Z80
+z_b2: .byte 1
+z_c2: .byte 1
+z_d2: .byte 1
+z_e2: .byte 1
+z_h2: .byte 1
+z_l2: .byte 1
+z_f2: .byte 1
+z_a2: .byte 1
+ .equ r2ofs = z_b2-z_b
+ .equ oz_b2 = 6
+ .equ oz_c2 = 7
+ .equ oz_d2 = 8
+ .equ oz_e2 = 9
+ .equ oz_h2 = 10
+ .equ oz_l2 = 11
+ .equ oz_f2 = 12
+ .equ oz_a2 = 13
+
+z_xh: .byte 1
+z_xl: .byte 1
+z_yh: .byte 1
+z_yl: .byte 1
+
+z_i: .byte 1
+z_r: .byte 1
+ .equ oz_xh = 14
+ .equ oz_xl = 15
+ .equ oz_yh = 16
+ .equ oz_yl = 17
+ .equ oz_i = 18
+ .equ oz_r = 19
+
+z_istat: .byte 1
+ .equ oz_istat = 20
+
+ .equ IM_MASK = 0x03 ;Mask IM 0..2
+ .equ IM0 = 0
+ .equ IM1 = 1
+ .equ IM2 = 2
+
+ .equ IFF1 = 2 ;IFF1 Flag
+ .equ IFF2 = 3 ;IFF2 Flag
+
+#endif
.cseg
notraceon:
.endif
-
.if PRINT_PC
cpi z_pch,DBG_TRACE_BOTTOM
brlo noprintpc
printnewline
printstring "PC="
movw temp,z_pcl
- rcall printhexw
+ lcall printhexw
printstring " "
noprintpc:
.endif
sbic flags,trace
rcall printregs
.endif
- ;hier kommt die Interruptbehandlung rein
+ ;hier kommt die Interruptbehandlung rein
mem_read_ds zl,z_pc ;zl = memReadByte(z_pc)
adiw z_pcl,1 ;++z_pc
rjmp main ;
-
-; .listmac
+ .listmac
;--------------------------------------------------
; Generate a table entry for one instruction
.set todo_table_pos_ = opcjmp + 256 + 128
.endif
.endif
- .set do_@0_@1_@2 = todo_table_pos_ ; make a label
- .org opcjmp_table_pos_
- rjmp do_@0_@1_@2 ; generate a jump to the label
- .set opcjmp_table_pos_ = PC
-
- .org do_@0_@1_@2
-
.set fetch_ = (@0 != do_fetch_nop) ; must call or jump to fetch phase
.set op_ = (do_@1 != do_op_nop) ; must call or jump to op phase
.set store_ = (@2 != do_store_nop) ; must jump to store phase
-
- .if fetch_ || op_ || store_ ; something to do
+ .set cnt_ = fetch_ + op_ + store_
+
+ .set do_@0_@1_@2 = todo_table_pos_ ; make a label
+
+ .org opcjmp_table_pos_
+ .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1
+
+ .if cnt_ == 0 ; nothing to do (nop)
+ ret ; go back to main
+ .endif
+
+ .if cnt_ == 1 ; jump direct to action
+ .if fetch_ ;
+ rjmp @0 ;
+ .endif
+ .if op_
+ rjmp do_@1 ; do op and return to main
+ .endif
+ .if store_ ;
+ rjmp @2 ;
+ .endif
+ .endif
+
+ ; two or tree actions
+ .if cnt_ >= 2 ; jump direct to action
+ rjmp do_@0_@1_@2 ; generate a jump to action table
+
+ .org do_@0_@1_@2
+
.if fetch_ ; must fetch
.if op_ || store_
rcall @0 ; fetch and come back here
.if store_ ; must store
rjmp @2 ; store is allways last
.endif
- .else
- ret ; nop, go back to main
+
+ .set todo_table_pos_ = PC
+
.endif
- .set todo_table_pos_ = PC
.endm
do_fetch_mbc:
lds xh,z_b
lds xl,z_c
- mem_read_d opl
+ mem_read_d z_a
ret
do_fetch_mde:
lds xh,z_d
lds xl,z_e
- mem_read_d opl
+ mem_read_d z_a
ret
do_fetch_mhl:
do_store_mbc:
lds xh,z_b
lds xl,z_c
- mem_write_s opl
+ mem_write_s z_a
ret
do_store_mde:
lds xh,z_d
lds xl,z_e
- mem_write_s opl
+ mem_write_s z_a
ret
do_store_mhl:
-
; ------------ Operation phase stuff -----------------
;----------------------------------------------------------------
;|ADC A,s |***V0*|Add with Carry |A=A+s+CY |
;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY |
;|ADD A,s |***V0*|Add |A=A+s |
-;|ADD HL,ss |--?-0*|Add |HL=HL+ss |
-;|ADD IX,pp |--?-0*|Add |IX=IX+pp |
-;|ADD IY,rr |--?-0*|Add |IY=IY+rr |
+;|ADD HL,ss |--*-0*|Add |HL=HL+ss |
+;|ADD IX,pp |--*-0*|Add |IX=IX+pp |
+;|ADD IY,rr |--*-0*|Add |IY=IY+rr |
;|AND s |**1P00|Logical AND |A=A&s |
;|BIT b,m |?*1?0-|Test Bit |m&{2^b} |
;|CALL cc,nn|------|Conditional Call |If cc CALL |
;|DEC s |***V1-|Decrement |s=s-1 |
;|DEC xx |------|Decrement |xx=xx-1 |
;|DEC ss |------|Decrement |ss=ss-1 |
-;|DI |------|Disable Interrupts | |
+;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 |
;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 |
-;|EI |------|Enable Interrupts | |
+;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 |
;|EX [SP],HL|------|Exchange |[SP]<->HL |
;|EX [SP],xx|------|Exchange |[SP]<->xx |
;|EX AF,AF' |------|Exchange |AF<->AF' |
;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
;|RST p |------|Restart | (p=0H,8H,10H,...,38H)|
;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY |
-;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY |
+;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY |
;|SCF |--0-01|Set Carry Flag |CY=1 |
;|SET b,m |------|Set bit |m=mv{2^b} |
;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 |
.equ ZFL_N = 1
.equ ZFL_C = 0
-
.equ AVR_T = SREG_T
.equ AVR_H = SREG_H
.equ AVR_S = SREG_S
lpm @0,z
.endm
-.macro do_z80_flags_HP
+.macro do_z80_flags_V
#if EM_Z80
bmov z_flags, ZFL_P, temp, AVR_V
+#endif
+.endm
+
+.macro do_z80_flags_H
+#if EM_Z80
bmov z_flags, ZFL_H, temp, AVR_H
#endif
.endm
#endif
.endm
+.macro do_z80_flags_clear_HN
+#if EM_Z80
+ andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
+#endif
+.endm
+
+
+.macro do_z80_flags_copy_HC
+#if EM_Z80
+ bmov z_flags, ZFL_H, z_flags, ZFL_H
+#endif
+.endm
+
.macro do_z80_flags_op_rotate
; must not change avr carry flag!
#if EM_Z80
.macro do_z80_flags_op_and
#if EM_Z80
ori z_flags,(1<<ZFL_H)
-#else
- ori z_flags,(1<<ZFL_H)
#endif
.endm
.macro do_z80_flags_op_or
#if EM_Z80
+ ;nothing to do
#endif
.endm
printnewline
printstring "Port write: "
mov temp,z_a
- rcall printhex
+ lcall printhex
printstring " -> ("
mov temp,opl
- rcall printhex
+ lcall printhex
printstring ") "
.endif
mov temp,z_a
;|IN A,[n] |------|Input |A=[n] |
;
;
-do_op_in: ; in a,(opl)
+do_op_ina: ; in a,(opl)
.if PORT_DEBUG
printnewline
printstring "Port read: ("
mov temp,opl
- rcall printhex
+ lcall printhex
printstring ") -> "
.endif
mov temp2,opl
lcall portRead
- mov opl,temp
+ mov z_a,temp
.if PORT_DEBUG
- rcall printhex
+ lcall printhex
printstring " "
.endif
ret
;
;
do_op_inc:
- inc opl
-#if EM_Z80
+ ldi temp,1
+ add opl,temp
in temp, sreg
-#endif
- andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
+ andi z_flags,(1<<ZFL_C) ; preserve C-flag
ldpmx temp2, sz53p_tab, opl
- or z_flags,temp2 ;
- do_z80_flags_HP
+ or z_flags,temp2 ;
+ bmov z_flags, ZFL_H, temp, AVR_H
+ do_z80_flags_V
ret
do_op_inca:
- inc z_a
-#if EM_Z80
+ ldi temp,1
+ add z_a,temp
in temp, sreg
-#endif
- andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
+ andi z_flags,(1<<ZFL_C) ; preserve C-flag
ldpmx temp2, sz53p_tab, z_a
- or z_flags,temp2 ;
- do_z80_flags_HP
+ or z_flags,temp2 ;
+ bmov z_flags, ZFL_H, temp, AVR_H
+ do_z80_flags_V
ret
;----------------------------------------------------------------
;
;
do_op_dec:
- dec opl
-#if EM_Z80
+ subi opl,1
in temp, sreg
-#endif
- andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
+ andi z_flags,(1<<ZFL_C) ; preserve C-flag
ldpmx temp2, sz53p_tab, opl
or z_flags,temp2 ;
- do_z80_flags_HP
+ bmov z_flags, ZFL_H, temp, AVR_H
+ do_z80_flags_V
do_z80_flags_set_N
ret
do_op_deca:
- dec z_a
-#if EM_Z80
+ ldi opl,1
+ sub z_a,opl
in temp, sreg
-#endif
- andi z_flags,(1<<ZFL_H)|(1<<ZFL_C) ; preserve C-, and H-flag
+ andi z_flags,(1<<ZFL_C) ; preserve C-flag
ldpmx temp2, sz53p_tab, z_a
or z_flags,temp2 ;
- do_z80_flags_HP
+ bmov z_flags, ZFL_H, temp, AVR_H
+ do_z80_flags_V
do_z80_flags_set_N
ret
;|RLCA |---- *|Rotate Left Circular |A=A<- |
;
;
-do_op_rlc:
+do_op_rlca:
;Rotate Left Cyclical. All bits move 1 to the
;left, the msb becomes c and lsb.
do_z80_flags_op_rotate
- lsl opl
- brcc do_op_rlc_noc
- ori opl, 1
- ori z_flags, (1<<ZFL_C)
+ lsl z_a
+ brcc do_op_rlc_noc
+ ldi temp,1
+ or z_a,temp
+ ori z_flags, (1<<ZFL_C)
do_op_rlc_noc:
ret
;|RRCA |---- *|Rotate Right Circular|A=->A |
;
;
-do_op_rrc:
+do_op_rrca:
;Rotate Right Cyclical. All bits move 1 to the
;right, the lsb becomes c and msb.
do_z80_flags_op_rotate
- lsr opl
- brcc do_op_rrc_noc
- ori opl, 0x80
- ori z_flags, (1<<ZFL_C)
+ lsr z_a
+ brcc do_op_rrc_noc
+ ldi temp,0x80
+ or z_a,temp
+ ori z_flags, (1<<ZFL_C)
do_op_rrc_noc:
ret
;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} |
;
;
-do_op_rr:
+do_op_rra:
;Rotate Right. All bits move 1 to the right, the lsb
;becomes c, c becomes msb.
clc ; get z80 carry to avr carry
sbrc z_flags,ZFL_C
sec
do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
- bmov z_flags,ZFL_C, opl,0 ; Bit 0 --> CY
- ror opl
+ bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY
+ ror z_a
ret
;----------------------------------------------------------------
;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- |
;
;
-do_op_rl:
+do_op_rla:
;Rotate Left. All bits move 1 to the left, the msb
;becomes c, c becomes lsb.
clc
sbrc z_flags,ZFL_C
sec
do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C)
- bmov z_flags,ZFL_C, opl,7 ; Bit 7 --> CY
- rol opl
+ bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY
+ rol z_a
ret
;----------------------------------------------------------------
in temp,sreg
ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag
bmov z_flags,ZFL_C, temp,AVR_C
- do_z80_flags_HP
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
ret
;----------------------------------------------------------------
in temp,sreg
ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
bmov z_flags,ZFL_C, temp,AVR_C
- do_z80_flags_HP
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
ret
;----------------------------------------------------------------
in temp,sreg
ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
bmov z_flags,ZFL_C, temp,AVR_C
- do_z80_flags_HP
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
do_z80_flags_set_N
ret
;
do_op_cpfa:
- mov temp,z_a
- sub temp,opl
- mov opl,temp
+ mov temp2,z_a
+ sub temp2,opl
in temp,sreg
- ldpmx z_flags,sz53p_tab,opl ;S,Z,P
+ ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P
bmov z_flags,ZFL_C, temp,AVR_C
- do_z80_flags_HP
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
do_z80_flags_set_N
ret
in temp,sreg
ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
bmov z_flags,ZFL_C, temp,AVR_C
- do_z80_flags_HP
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
do_z80_flags_set_N
ret
;|----------|SZHP C|---------- 8080 ----------------------------|
;|AND s |**-P 0|Logical AND |A=A&s |
;
-; TODO H-Flag
+;
do_op_anda:
and z_a,opl ;
ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C
;|----------|SZHP C|---------- 8080 ----------------------------|
;|OR s |**-P00|Logical inclusive OR |A=Avs |
;
-; TODO: H-Flag
+;
do_op_ora:
or z_a,opl
ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
;|----------|SZHP C|---------- 8080 ----------------------------|
;|XOR s |**-P 0|Logical Exclusive OR |A=Axs |
;
-; TODO: H-Flag
+;
do_op_xora:
eor z_a,opl
ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C
lds temp2,z_h
add opl,temp
adc oph,temp2
+ sts z_l,opl
+ sts z_h,oph
in temp,sreg
- bmov z_flags,ZFL_H, temp,AVR_H
bmov z_flags,ZFL_C, temp,AVR_C
+ do_z80_flags_H
do_z80_flags_clear_N
ret
; and subtraction operations. For addition (ADD, ADC, INC) or subtraction
; (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
;
-; -------------------------------------------------------------------------------
-; | | C Flag | HEX value in | H Flag | HEX value in | Number | C flag|
-; | Operation| Before | upper digit | Before | lower digit | added | After |
-; | | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA |
-; |-----------------------------------------------------------------------------|
-; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
-; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
-; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
-; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
-; | | 0 | 9-F | 0 | A-F | 66 | 1 |
-; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
-; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
-; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
-; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
-; |-----------------------------------------------------------------------------|
-; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
-; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
-; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
-; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
-; |-----------------------------------------------------------------------------|
-;
-; Flags:
-; C: See instruction.
+; -------------------------------------------------------------------
+; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag |
+; | Oper |Before |upper digit |Before |lower digit| added |After |
+; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA |
+; |-------+-------+------------+-------+-----------+--------+-------|
+; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
+; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 |
+; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 |
+; | ADC | 0 | A-F | 0 | 0-9 | 60 | 1 |
+; | | 0 | 9-F | 0 | A-F | 66 | 1 |
+; | INC | 0 | A-F | 1 | 0-3 | 66 | 1 |
+; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 |
+; | | 1 | 0-2 | 0 | A-F | 66 | 1 |
+; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 |
+; |-------+-------+------------+-------+-----------+--------+-------|
+; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 |
+; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 |
+; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 |
+; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 |
+; -------------------------------------------------------------------
+;
+; The H flag is affected as follows:
+;
+; ---------------------
+; | N | H | low |H' |
+; | | |nibble | |
+; |---+---+-------+---|
+; | 0 | * | 0-9 | 0 |
+; | 0 | * | a-f | 1 |
+; | 1 | 0 | * | 0 |
+; | 1 | 1 | 6-f | 0 |
+; | 1 | 1 | 0-5 | 1 |
+; ---------------------
+;
+; Ohter flags:
; N: Unaffected.
; P/V: Set if Acc. is even parity after operation, reset otherwise.
-; H: See instruction.
; Z: Set if Acc. is Zero after operation, reset otherwise.
; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
-
-
#if 1
+
do_op_da:
- ldi oph,0 ; what to add
- sbrc z_flags,ZFL_H ; if H-Flag
- rjmp op_da_06
- mov temp,opl
- andi temp,0x0f ; ... or lower digit > 9
- cpi temp,0x0a
- brlo op_da_06n
-op_da_06:
- ori oph,0x06
-op_da_06n:
- sbrc z_flags,(1<<ZFL_C)
- rjmp op_da_60
- cpi opl,0xa0
- brlo op_da_60n
-op_da_60:
- ori oph,0x60
-op_da_60n:
- cpi opl,0x9a
- brlo op_da_99n
- ori z_flags,(1<<ZFL_C); set C
-op_da_99n:
- sbrs z_flags,ZFL_N ; if sub-op
- rjmp op_da_add ; then
- sub opl,oph
- rjmp op_da_ex
-op_da_add: ; else add-op
- cpi opl,0x91
- brlo op_da_60n2
- mov temp,opl
- andi temp,0x0f
- cpi temp,0x0a
- brlo op_da_60n2
- ori oph,0x60
-op_da_60n2:
- add opl,oph
-op_da_ex:
- in temp,SREG
- sbrc temp,AVR_H
- ori z_flags,(1<<ZFL_C)
- andi z_flags,(1<<ZFL_N)|(1<<ZFL_C) ; preserve C,N
- ldpmx temp2, sz53p_tab, opl ; get S,Z,P
- or z_flags,temp2
- bmov z_flags,ZFL_H, temp,AVR_H ; H (?)
+
+#if EM_Z80
+ sbrc z_flags,ZFL_N ;if add-op
+ rjmp op_da_sub ;then
+#endif
+
+op_da_add:
+ ldi temp2,0 ; new C and H flag
+ sbrc z_flags,ZFL_H ; |
+ rjmp op_da_a01 ; if (H flag ...
+ mov temp,opl ; |
+ andi temp,0x0f ; |
+ cpi temp,0x0a ; or (lower nibble >= 0x0A))
+ brlo op_da_a10 ; |
+op_da_a01: ; then
+ ldi oph,0x06 ; add 6 to lower nibble
+ add opl,oph ;
+ brhc op_da_02 ; if
+ ori temp2,(1<<ZFL_H) ; set new H flag
+op_da_02: ;
+ brcc op_da_a10 ; if
+ ori temp2,(1<<ZFL_C) ; set new H flag
+op_da_a10: ; endif
+ sbrc z_flags,ZFL_C ; |
+ rjmp op_da_a12 ; if (C flag ...
+ cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
+ brlo op_da_a13 ;
+op_da_a12: ;
+ ldi oph,0x60 ; add 6 to lower nibble
+ add opl,oph ;
+ ori temp2,(1<<ZFL_C) ; set new C flag
+op_da_a13: ;
+ ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
+ or z_flags,temp2 ; merge new C and H flag
ret
+
+#if EM_Z80
+
+op_da_sub: ;else (sub-op)
+ rcall do_op_inv ; TODO: !
+ ret ;endif
+#endif
+
#else
do_op_da:
- sbrc z_flags,ZFL_N ; if add-op
- rjmp do_op_da_sub ; then
- ldi temp2,0 ;
- mov temp,opl ;
- andi temp,0x0f ;
- cpi temp,0x0a ; if lower digit > 9
- brlo do_op_da_h ;
- ori temp2,0x06 ; add 6 to lower digit
-do_op_da_h: ;
- sbrc z_flags,ZFL_H ; ... or H-Flag
- ori temp2,0x06 ;
- add opl,temp2 ;
-
- ldi temp2,0 ;
- mov temp,opl ;
- andi temp,0xf0 ;
- cpi temp,0xa0 ;
- brlo do_op_da_c ;
- ori temp2,0x60 ;
-do_op_da_c: ; else sub-op
- sbrc z_flags,ZFL_C ;
- ori temp2,0x60 ;
- andi z_flags, ~( (1<<ZFL_S) | (1<<ZFL_Z) | (1<<ZFL_H) )
- add opl,temp2 ;
- in temp,SREG ;
- bst temp,AVR_Z ;Z-Flag
- bld z_flags,ZFL_Z ;
- bst temp,AVR_N ;S-Flag
- bst z_flags,ZFL_S ;
- sbrc temp2,5 ;C-Flag, set if 0x06 added
- ori z_flags,(1<<ZFL_C) ;
- ;H-Flag?
- ret
-
-do_op_da_sub: ;TODO:
- rcall do_op_inv
+ ldi temp2,0 ;new C and H flag
+ ldi oph,0 ;oph: what to add
+
+ sbrc z_flags,ZFL_N ;if add-op
+ rjmp op_da_sub ;then
+op_da_add:
+ mov temp,opl ; |
+ andi temp,0x0f ; |
+ cpi temp,0x0a ; if (lower nibble >= 0x0A)
+ brlo op_da_a10 ; |
+ ori oph,0x06 ; add 6
+ ori temp2,(1<<ZFL_H) ; set new H flag
+
+ sbrc z_flags,ZFL_C ; |
+ rjmp op_da_a02 ; if (C flag ...
+ cpi opl,0x90 ; |... or upper nibble >= 0x90)
+ brlo op_da_a03 ; |
+op_da_a02:
+ ori oph,0x60 ; add 0x60
+ ori temp2,(1<<ZFL_C) ; set new C flag
+op_da_a03: ; endif
+ rjmp op_da_ae
+op_da_a10: ; else (lower nibble is 0x09 or lower)
+ sbrc z_flags,ZFL_C ; |
+ rjmp op_da_a12 ; if (C flag ...
+ cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
+ brlo op_da_a13 ;
+op_da_a12:
+ ori oph,0x60 ; add 0x60
+ ori temp2,(1<<ZFL_C) ; set new C flag
+op_da_a13:
+ sbrs z_flags,ZFL_H ; if (H flag)
+ rjmp op_da_ae ; |
+ ori oph,0x06 ; add 0x06
+ mov temp,opl ; |
+ andi temp,0x0f ; |
+ cpi temp,0x06 ; if (lower nibble >= 0x0A)
+ brsh op_da_ae ; |
+ ori temp2,(1<<ZFL_H) ; set new H flag
+ ; endif
+ ; endif
+op_da_ae:
+ add opl,oph
+ ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
+ or z_flags,temp2 ; merge new C and H flag
ret
+
+op_da_sub: ;else (sub-op)
+ rcall do_op_inv ; TODO: !
+ ret ;endif
#endif
+
;----------------------------------------------------------------
;|Mnemonic |SZHPNC|Description |Notes |
;----------------------------------------------------------------
;
;
do_op_scf:
- andi z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
+ do_z80_flags_clear_HN
ori z_flags,(1<<ZFL_C)
ret
;----------------------------------------------------------------
;|Mnemonic |SZHPNC|Description |Notes |
;----------------------------------------------------------------
-;|CCF |--?-0*|Complement Carry Flag|CY=~CY |
+;|CCF |--?-0*|Complement Carry Flag|CY=~CY, HC=previous CY|
;|----------|SZHP C|---------- 8080 ----------------------------|
-;|SCF |---- 1|Set Carry Flag |CY=1 |
+;|CCF |---- 1|Set Carry Flag |CY=1 |
;
-;TODO: H-Flag
do_op_ccf:
do_z80_flags_clear_N
+ do_z80_flags_copy_HC
ldi temp,(1<<ZFL_C)
eor z_flags,temp
ret
sbrs z_flags, ZFL_Z
ret
pop temp ; nix tun
- pop temp ; direkt zuruech zu main
+ pop temp ; direkt zurueck zu main
ret
;----------------------------------------------------------------
sbrc z_flags, ZFL_Z
ret
pop temp ; nix tun
- pop temp ; direkt zuruech zu main
+ pop temp ; direkt zurueck zu main
ret
;----------------------------------------------------------------
;opcjmp:
instr do_fetch_nop, op_nop, do_store_nop ;00 ;NOP
instr do_fetch_DIR16, op_nop, do_store_BC ;01 nn nn ;LD BC,nn
-instr do_fetch_A, op_nop, do_store_MBC ;02 ;LD (BC),A
+instr do_fetch_nop, op_nop, do_store_MBC ;02 ;LD (BC),A
instr do_fetch_BC, op_INC16, do_store_BC ;03 ;INC BC
instr do_fetch_B, op_INC, do_store_B ;04 ;INC B
instr do_fetch_B, op_DEC, do_store_B ;05 ;DEC B
instr do_fetch_DIR8, op_nop, do_store_B ;06 ;LD B,n
-instr do_fetch_A, op_RLC, do_store_A ;07 ;RLCA
+instr do_fetch_nop, op_RLCA, do_store_nop ;07 ;RLCA
instr do_fetch_nop, op_INV, do_store_nop ;08 ;EX AF,AF'
-instr do_fetch_BC, op_ADDHL, do_store_HL ;09 ;ADD HL,BC
-instr do_fetch_MBC, op_nop, do_store_A ;0A ;LD A,(BC)
+instr do_fetch_BC, op_ADDHL, do_store_nop ;09 ;ADD HL,BC
+instr do_fetch_MBC, op_nop, do_store_nop ;0A ;LD A,(BC)
instr do_fetch_BC, op_DEC16, do_store_BC ;0B ;DEC BC
instr do_fetch_C, op_INC, do_store_C ;0C ;INC C
instr do_fetch_C, op_DEC, do_store_C ;0D ;DEC C
instr do_fetch_DIR8, op_nop, do_store_C ;0E nn ;LD C,n
-instr do_fetch_A, op_RRC, do_store_A ;0F ;RRCA
+instr do_fetch_nop, op_RRCA, do_store_nop ;0F ;RRCA
instr do_fetch_nop, op_INV, do_store_nop ;10 oo ;DJNZ o
instr do_fetch_DIR16, op_nop, do_store_DE ;11 nn nn ;LD DE,nn
-instr do_fetch_A, op_nop, do_store_MDE ;12 ;LD (DE),A
+instr do_fetch_nop, op_nop, do_store_MDE ;12 ;LD (DE),A
instr do_fetch_DE, op_INC16, do_store_DE ;13 ;INC DE
instr do_fetch_D, op_INC, do_store_D ;14 ;INC D
instr do_fetch_D, op_DEC, do_store_D ;15 ;DEC D
instr do_fetch_DIR8, op_nop, do_store_D ;16 nn ;LD D,n
-instr do_fetch_A, op_RL, do_store_A ;17 ;RLA
+instr do_fetch_nop, op_RLA, do_store_nop ;17 ;RLA
instr do_fetch_nop, op_INV, do_store_nop ;18 oo ;JR o
-instr do_fetch_DE, op_ADDHL, do_store_HL ;19 ;ADD HL,DE
-instr do_fetch_MDE, op_nop, do_store_A ;1A ;LD A,(DE)
+instr do_fetch_DE, op_ADDHL, do_store_nop ;19 ;ADD HL,DE
+instr do_fetch_MDE, op_nop, do_store_nop ;1A ;LD A,(DE)
instr do_fetch_DE, op_DEC16, do_store_DE ;1B ;DEC DE
instr do_fetch_E, op_INC, do_store_E ;1C ;INC E
instr do_fetch_E, op_DEC, do_store_E ;1D ;DEC E
instr do_fetch_DIR8, op_nop, do_store_E ;1E nn ;LD E,n
-instr do_fetch_A, op_RR, do_store_A ;1F ;RRA
+instr do_fetch_nop, op_RRA, do_store_nop ;1F ;RRA
instr do_fetch_nop, op_INV, do_store_nop ;20 oo ;JR NZ,o
instr do_fetch_DIR16, op_nop, do_store_HL ;21 nn nn ;LD HL,nn
instr do_fetch_DIR16, op_STHL, do_store_nop ;22 nn nn ;LD (nn),HL
instr do_fetch_DIR8, op_nop, do_store_H ;26 nn ;LD H,n
instr do_fetch_A, op_DA, do_store_A ;27 ;DAA
instr do_fetch_nop, op_INV, do_store_nop ;28 oo ;JR Z,o
-instr do_fetch_HL, op_ADDHL, do_store_HL ;29 ;ADD HL,HL
+instr do_fetch_HL, op_ADDHL, do_store_nop ;29 ;ADD HL,HL
instr do_fetch_DIR16, op_RMEM16, do_store_HL ;2A nn nn ;LD HL,(nn)
instr do_fetch_HL, op_DEC16, do_store_HL ;2B ;DEC HL
instr do_fetch_L, op_INC, do_store_L ;2C ;INC L
instr do_fetch_DIR8, op_nop, do_store_MHL ;36 nn ;LD (HL),n
instr do_fetch_nop, op_SCF, do_store_nop ;37 ;SCF
instr do_fetch_nop, op_INV, do_store_nop ;38 oo ;JR C,o
-instr do_fetch_SP, op_ADDHL, do_store_HL ;39 ;ADD HL,SP
+instr do_fetch_SP, op_ADDHL, do_store_nop ;39 ;ADD HL,SP
instr do_fetch_DIR16, op_RMEM8, do_store_A ;3A nn nn ;LD A,(nn)
instr do_fetch_SP, op_DEC16, do_store_SP ;3B ;DEC SP
instr do_fetch_nop, op_INCA, do_store_nop ;3C ;INC A
instr do_fetch_nop, op_DECA, do_store_nop ;3D ;DEC A
instr do_fetch_DIR8, op_nop, do_store_A ;3E nn ;LD A,n
instr do_fetch_nop, op_CCF, do_store_nop ;3F ;CCF (Complement Carry Flag, gvd)
-instr do_fetch_B, op_nop, do_store_B ;40 ;LD B,B
+instr do_fetch_nop, op_nop, do_store_nop ;40 ;LD B,B
instr do_fetch_C, op_nop, do_store_B ;41 ;LD B,C
instr do_fetch_D, op_nop, do_store_B ;42 ;LD B,D
instr do_fetch_E, op_nop, do_store_B ;43 ;LD B,E
instr do_fetch_MHL, op_nop, do_store_B ;46 ;LD B,(HL)
instr do_fetch_A, op_nop, do_store_B ;47 ;LD B,A
instr do_fetch_B, op_nop, do_store_C ;48 ;LD C,B
-instr do_fetch_C, op_nop, do_store_C ;49 ;LD C,C
+instr do_fetch_nop, op_nop, do_store_nop ;49 ;LD C,C
instr do_fetch_D, op_nop, do_store_C ;4A ;LD C,D
instr do_fetch_E, op_nop, do_store_C ;4B ;LD C,E
instr do_fetch_H, op_nop, do_store_C ;4C ;LD C,H
instr do_fetch_A, op_nop, do_store_C ;4F ;LD C,A
instr do_fetch_B, op_nop, do_store_D ;50 ;LD D,B
instr do_fetch_C, op_nop, do_store_D ;51 ;LD D,C
-instr do_fetch_D, op_nop, do_store_D ;52 ;LD D,D
+instr do_fetch_nop, op_nop, do_store_nop ;52 ;LD D,D
instr do_fetch_E, op_nop, do_store_D ;53 ;LD D,E
instr do_fetch_H, op_nop, do_store_D ;54 ;LD D,H
instr do_fetch_L, op_nop, do_store_D ;55 ;LD D,L
instr do_fetch_B, op_nop, do_store_E ;58 ;LD E,B
instr do_fetch_C, op_nop, do_store_E ;59 ;LD E,C
instr do_fetch_D, op_nop, do_store_E ;5A ;LD E,D
-instr do_fetch_E, op_nop, do_store_E ;5B ;LD E,E
+instr do_fetch_nop, op_nop, do_store_nop ;5B ;LD E,E
instr do_fetch_H, op_nop, do_store_E ;5C ;LD E,H
instr do_fetch_L, op_nop, do_store_E ;5D ;LD E,L
instr do_fetch_MHL, op_nop, do_store_E ;5E ;LD E,(HL)
instr do_fetch_C, op_nop, do_store_H ;61 ;LD H,C
instr do_fetch_D, op_nop, do_store_H ;62 ;LD H,D
instr do_fetch_E, op_nop, do_store_H ;63 ;LD H,E
-instr do_fetch_H, op_nop, do_store_H ;64 ;LD H,H
+instr do_fetch_nop, op_nop, do_store_nop ;64 ;LD H,H
instr do_fetch_L, op_nop, do_store_H ;65 ;LD H,L
instr do_fetch_MHL, op_nop, do_store_H ;66 ;LD H,(HL)
instr do_fetch_A, op_nop, do_store_H ;67 ;LD H,A
instr do_fetch_D, op_nop, do_store_L ;6A ;LD L,D
instr do_fetch_E, op_nop, do_store_L ;6B ;LD L,E
instr do_fetch_H, op_nop, do_store_L ;6C ;LD L,H
-instr do_fetch_L, op_nop, do_store_L ;6D ;LD L,L
+instr do_fetch_nop, op_nop, do_store_nop ;6D ;LD L,L
instr do_fetch_MHL, op_nop, do_store_L ;6E ;LD L,(HL)
instr do_fetch_A, op_nop, do_store_L ;6F ;LD L,A
instr do_fetch_B, op_nop, do_store_MHL ;70 ;LD (HL),B
instr do_fetch_H, op_nop, do_store_A ;7C ;LD A,H
instr do_fetch_L, op_nop, do_store_A ;7D ;LD A,L
instr do_fetch_MHL, op_nop, do_store_A ;7E ;LD A,(HL)
-instr do_fetch_A, op_nop, do_store_A ;7F ;LD A,A
+instr do_fetch_nop, op_nop, do_store_nop ;7F ;LD A,A
instr do_fetch_B, op_ADDA, do_store_nop ;80 ;ADD A,B
instr do_fetch_C, op_ADDA, do_store_nop ;81 ;ADD A,C
instr do_fetch_D, op_ADDA, do_store_nop ;82 ;ADD A,D
instr do_fetch_nop, op_IFC, do_store_RET ;D8 ;RET C
instr do_fetch_nop, op_nop, do_store_nop ;D9 ;EXX
instr do_fetch_DIR16, op_IFC, do_store_PC ;DA nn nn ;JP C,nn
-instr do_fetch_DIR8, op_IN, do_store_A ;DB nn ;IN A,(n)
+instr do_fetch_DIR8, op_INA, do_store_nop ;DB nn ;IN A,(n)
instr do_fetch_DIR16, op_IFC, do_store_CALL ;DC nn nn ;CALL C,nn
instr do_fetch_nop, op_INV, do_store_nop ;DD ;(Z80 specific)
instr do_fetch_DIR8, op_SBCFA, do_store_nop ;DE nn ;SBC A,n
projects / avrcpm.git / blobdiff