; This is the base z80 port address for clock access
#define TIMERPORT 0x40
#define TIMER_CTL TIMERPORT
#define TIMER_MSECS TIMERPORT+1
#define TIMER_SECS TIMER_MSECS+2
; This is the base z80 port address for clock access
#define TIMERPORT 0x40
#define TIMER_CTL TIMERPORT
#define TIMER_MSECS TIMERPORT+1
#define TIMER_SECS TIMER_MSECS+2