-instr fetch_B, op_RES0, store_B ;80 ;RES 0,B
-instr fetch_C, op_RES0, store_C ;81 ;RES 0,C
-instr fetch_D, op_RES0, store_D ;82 ;RES 0,D
-instr fetch_E, op_RES0, store_E ;83 ;RES 0,E
-instr fetch_H, op_RES0, store_H ;84 ;RES 0,H
-instr fetch_L, op_RES0, store_L ;85 ;RES 0,L
-instr fetch_MHL, op_RES0, store_MHL ;86 ;RES 0,(HL)
-instr fetch_A, op_RES0, store_A ;87 ;RES 0,A
-instr fetch_B, op_RES1, store_B ;88 ;RES 1,B
-instr fetch_C, op_RES1, store_C ;89 ;RES 1,C
-instr fetch_D, op_RES1, store_D ;8A ;RES 1,D
-instr fetch_E, op_RES1, store_E ;8B ;RES 1,E
-instr fetch_H, op_RES1, store_H ;8C ;RES 1,H
-instr fetch_L, op_RES1, store_L ;8D ;RES 1,L
-instr fetch_MHL, op_RES1, store_MHL ;8E ;RES 1,(HL)
-instr fetch_A, op_RES1, store_A ;8F ;RES 1,A
-instr fetch_B, op_RES2, store_B ;90 ;RES 2,B
-instr fetch_C, op_RES2, store_C ;91 ;RES 2,C
-instr fetch_D, op_RES2, store_D ;92 ;RES 2,D
-instr fetch_E, op_RES2, store_E ;93 ;RES 2,E
-instr fetch_H, op_RES2, store_H ;94 ;RES 2,H
-instr fetch_L, op_RES2, store_L ;95 ;RES 2,L
-instr fetch_MHL, op_RES2, store_MHL ;96 ;RES 2,(HL)
-instr fetch_A, op_RES2, store_A ;97 ;RES 2,A
-instr fetch_B, op_RES3, store_B ;98 ;RES 3,B
-instr fetch_C, op_RES3, store_C ;99 ;RES 3,C
-instr fetch_D, op_RES3, store_D ;9A ;RES 3,D
-instr fetch_E, op_RES3, store_E ;9B ;RES 3,E
-instr fetch_H, op_RES3, store_H ;9C ;RES 3,H
-instr fetch_L, op_RES3, store_L ;9D ;RES 3,L
-instr fetch_MHL, op_RES3, store_MHL ;9E ;RES 3,(HL)
-instr fetch_A, op_RES3, store_A ;9F ;RES 3,A
-instr fetch_B, op_RES4, store_B ;A0 ;RES 4,B
-instr fetch_C, op_RES4, store_C ;A1 ;RES 4,C
-instr fetch_D, op_RES4, store_D ;A2 ;RES 4,D
-instr fetch_E, op_RES4, store_E ;A3 ;RES 4,E
-instr fetch_H, op_RES4, store_H ;A4 ;RES 4,H
-instr fetch_L, op_RES4, store_L ;A5 ;RES 4,L
-instr fetch_MHL, op_RES4, store_MHL ;A6 ;RES 4,(HL)
-instr fetch_A, op_RES4, store_A ;A7 ;RES 4,A
-instr fetch_B, op_RES5, store_B ;A8 ;RES 5,B
-instr fetch_C, op_RES5, store_C ;A9 ;RES 5,C
-instr fetch_D, op_RES5, store_D ;AA ;RES 5,D
-instr fetch_E, op_RES5, store_E ;AB ;RES 5,E
-instr fetch_H, op_RES5, store_H ;AC ;RES 5,H
-instr fetch_L, op_RES5, store_L ;AD ;RES 5,L
-instr fetch_MHL, op_RES5, store_MHL ;AE ;RES 5,(HL)
-instr fetch_A, op_RES5, store_A ;AF ;RES 5,A
-instr fetch_B, op_RES6, store_B ;B0 ;RES 6,B
-instr fetch_C, op_RES6, store_C ;B1 ;RES 6,C
-instr fetch_D, op_RES6, store_D ;B2 ;RES 6,D
-instr fetch_E, op_RES6, store_E ;B3 ;RES 6,E
-instr fetch_H, op_RES6, store_H ;B4 ;RES 6,H
-instr fetch_L, op_RES6, store_L ;B5 ;RES 6,L
-instr fetch_MHL, op_RES6, store_MHL ;B6 ;RES 6,(HL)
-instr fetch_A, op_RES6, store_A ;B7 ;RES 6,A
-instr fetch_B, op_RES7, store_B ;B8 ;RES 7,B
-instr fetch_C, op_RES7, store_C ;B9 ;RES 7,C
-instr fetch_D, op_RES7, store_D ;BA ;RES 7,D
-instr fetch_E, op_RES7, store_E ;BB ;RES 7,E
-instr fetch_H, op_RES7, store_H ;BC ;RES 7,H
-instr fetch_L, op_RES7, store_L ;BD ;RES 7,L
-instr fetch_MHL, op_RES7, store_MHL ;BE ;RES 7,(HL)
-instr fetch_A, op_RES7, store_A ;BF ;RES 7,A
-instr fetch_B, op_SET0, store_B ;C0 ;SET 0,B
-instr fetch_C, op_SET0, store_C ;C1 ;SET 0,C
-instr fetch_D, op_SET0, store_D ;C2 ;SET 0,D
-instr fetch_E, op_SET0, store_E ;C3 ;SET 0,E
-instr fetch_H, op_SET0, store_H ;C4 ;SET 0,H
-instr fetch_L, op_SET0, store_L ;C5 ;SET 0,L
-instr fetch_MHL, op_SET0, store_MHL ;C6 ;SET 0,(HL)
-instr fetch_A, op_SET0, store_A ;C7 ;SET 0,A
-instr fetch_B, op_SET1, store_B ;C8 ;SET 1,B
-instr fetch_C, op_SET1, store_C ;C9 ;SET 1,C
-instr fetch_D, op_SET1, store_D ;CA ;SET 1,D
-instr fetch_E, op_SET1, store_E ;CB ;SET 1,E
-instr fetch_H, op_SET1, store_H ;CC ;SET 1,H
-instr fetch_L, op_SET1, store_L ;CD ;SET 1,L
-instr fetch_MHL, op_SET1, store_MHL ;CE ;SET 1,(HL)
-instr fetch_A, op_SET1, store_A ;CF ;SET 1,A
-instr fetch_B, op_SET2, store_B ;D0 ;SET 2,B
-instr fetch_C, op_SET2, store_C ;D1 ;SET 2,C
-instr fetch_D, op_SET2, store_D ;D2 ;SET 2,D
-instr fetch_E, op_SET2, store_E ;D3 ;SET 2,E
-instr fetch_H, op_SET2, store_H ;D4 ;SET 2,H
-instr fetch_L, op_SET2, store_L ;D5 ;SET 2,L
-instr fetch_MHL, op_SET2, store_MHL ;D6 ;SET 2,(HL)
-instr fetch_A, op_SET2, store_A ;D7 ;SET 2,A
-instr fetch_B, op_SET3, store_B ;D8 ;SET 3,B
-instr fetch_C, op_SET3, store_C ;D9 ;SET 3,C
-instr fetch_D, op_SET3, store_D ;DA ;SET 3,D
-instr fetch_E, op_SET3, store_E ;DB ;SET 3,E
-instr fetch_H, op_SET3, store_H ;DC ;SET 3,H
-instr fetch_L, op_SET3, store_L ;DD ;SET 3,L
-instr fetch_MHL, op_SET3, store_MHL ;DE ;SET 3,(HL)
-instr fetch_A, op_SET3, store_A ;DF ;SET 3,A
-instr fetch_B, op_SET4, store_B ;E0 ;SET 4,B
-instr fetch_C, op_SET4, store_C ;E1 ;SET 4,C
-instr fetch_D, op_SET4, store_D ;E2 ;SET 4,D
-instr fetch_E, op_SET4, store_E ;E3 ;SET 4,E
-instr fetch_H, op_SET4, store_H ;E4 ;SET 4,H
-instr fetch_L, op_SET4, store_L ;E5 ;SET 4,L
-instr fetch_MHL, op_SET4, store_MHL ;E6 ;SET 4,(HL)
-instr fetch_A, op_SET4, store_A ;E7 ;SET 4,A
-instr fetch_B, op_SET5, store_B ;E8 ;SET 5,B
-instr fetch_C, op_SET5, store_C ;E9 ;SET 5,C
-instr fetch_D, op_SET5, store_D ;EA ;SET 5,D
-instr fetch_E, op_SET5, store_E ;EB ;SET 5,E
-instr fetch_H, op_SET5, store_H ;EC ;SET 5,H
-instr fetch_L, op_SET5, store_L ;ED ;SET 5,L
-instr fetch_MHL, op_SET5, store_MHL ;EE ;SET 5,(HL)
-instr fetch_A, op_SET5, store_A ;EF ;SET 5,A
-instr fetch_B, op_SET6, store_B ;F0 ;SET 6,B
-instr fetch_C, op_SET6, store_C ;F1 ;SET 6,C
-instr fetch_D, op_SET6, store_D ;F2 ;SET 6,D
-instr fetch_E, op_SET6, store_E ;F3 ;SET 6,E
-instr fetch_H, op_SET6, store_H ;F4 ;SET 6,H
-instr fetch_L, op_SET6, store_L ;F5 ;SET 6,L
-instr fetch_MHL, op_SET6, store_MHL ;F6 ;SET 6,(HL)
-instr fetch_A, op_SET6, store_A ;F7 ;SET 6,A
-instr fetch_B, op_SET7, store_B ;F8 ;SET 7,B
-instr fetch_C, op_SET7, store_C ;F9 ;SET 7,C
-instr fetch_D, op_SET7, store_D ;FA ;SET 7,D
-instr fetch_E, op_SET7, store_E ;FB ;SET 7,E
-instr fetch_H, op_SET7, store_H ;FC ;SET 7,H
-instr fetch_L, op_SET7, store_L ;FD ;SET 7,L
-instr fetch_MHL, op_SET7, store_MHL ;FE ;SET 7,(HL)
-instr fetch_A, op_SET7, store_A ;FF ;SET 7,A
-
-
- opctable DDFDCBjmp
+instr fetch_B, op_RES0, store2_B ;80 ;RES 0,B
+instr fetch_C, op_RES0, store2_C ;81 ;RES 0,C
+instr fetch_D, op_RES0, store2_D ;82 ;RES 0,D
+instr fetch_E, op_RES0, store2_E ;83 ;RES 0,E
+instr fetch_H, op_RES0, store2_H ;84 ;RES 0,H
+instr fetch_L, op_RES0, store2_L ;85 ;RES 0,L
+instr fetch2_mhl, op_RES0, store_MHL ;86 ;RES 0,(HL)
+instr fetch_A, op_RES0, store2_A ;87 ;RES 0,A
+instr fetch_B, op_RES1, store2_B ;88 ;RES 1,B
+instr fetch_C, op_RES1, store2_C ;89 ;RES 1,C
+instr fetch_D, op_RES1, store2_D ;8A ;RES 1,D
+instr fetch_E, op_RES1, store2_E ;8B ;RES 1,E
+instr fetch_H, op_RES1, store2_H ;8C ;RES 1,H
+instr fetch_L, op_RES1, store2_L ;8D ;RES 1,L
+instr fetch2_mhl, op_RES1, store_MHL ;8E ;RES 1,(HL)
+instr fetch_A, op_RES1, store2_A ;8F ;RES 1,A
+instr fetch_B, op_RES2, store2_B ;90 ;RES 2,B
+instr fetch_C, op_RES2, store2_C ;91 ;RES 2,C
+instr fetch_D, op_RES2, store2_D ;92 ;RES 2,D
+instr fetch_E, op_RES2, store2_E ;93 ;RES 2,E
+instr fetch_H, op_RES2, store2_H ;94 ;RES 2,H
+instr fetch_L, op_RES2, store2_L ;95 ;RES 2,L
+instr fetch2_mhl, op_RES2, store_MHL ;96 ;RES 2,(HL)
+instr fetch_A, op_RES2, store2_A ;97 ;RES 2,A
+instr fetch_B, op_RES3, store2_B ;98 ;RES 3,B
+instr fetch_C, op_RES3, store2_C ;99 ;RES 3,C
+instr fetch_D, op_RES3, store2_D ;9A ;RES 3,D
+instr fetch_E, op_RES3, store2_E ;9B ;RES 3,E
+instr fetch_H, op_RES3, store2_H ;9C ;RES 3,H
+instr fetch_L, op_RES3, store2_L ;9D ;RES 3,L
+instr fetch2_mhl, op_RES3, store_MHL ;9E ;RES 3,(HL)
+instr fetch_A, op_RES3, store2_A ;9F ;RES 3,A
+instr fetch_B, op_RES4, store2_B ;A0 ;RES 4,B
+instr fetch_C, op_RES4, store2_C ;A1 ;RES 4,C
+instr fetch_D, op_RES4, store2_D ;A2 ;RES 4,D
+instr fetch_E, op_RES4, store2_E ;A3 ;RES 4,E
+instr fetch_H, op_RES4, store2_H ;A4 ;RES 4,H
+instr fetch_L, op_RES4, store2_L ;A5 ;RES 4,L
+instr fetch2_mhl, op_RES4, store_MHL ;A6 ;RES 4,(HL)
+instr fetch_A, op_RES4, store2_A ;A7 ;RES 4,A
+instr fetch_B, op_RES5, store2_B ;A8 ;RES 5,B
+instr fetch_C, op_RES5, store2_C ;A9 ;RES 5,C
+instr fetch_D, op_RES5, store2_D ;AA ;RES 5,D
+instr fetch_E, op_RES5, store2_E ;AB ;RES 5,E
+instr fetch_H, op_RES5, store2_H ;AC ;RES 5,H
+instr fetch_L, op_RES5, store2_L ;AD ;RES 5,L
+instr fetch2_mhl, op_RES5, store_MHL ;AE ;RES 5,(HL)
+instr fetch_A, op_RES5, store2_A ;AF ;RES 5,A
+instr fetch_B, op_RES6, store2_B ;B0 ;RES 6,B
+instr fetch_C, op_RES6, store2_C ;B1 ;RES 6,C
+instr fetch_D, op_RES6, store2_D ;B2 ;RES 6,D
+instr fetch_E, op_RES6, store2_E ;B3 ;RES 6,E
+instr fetch_H, op_RES6, store2_H ;B4 ;RES 6,H
+instr fetch_L, op_RES6, store2_L ;B5 ;RES 6,L
+instr fetch2_mhl, op_RES6, store_MHL ;B6 ;RES 6,(HL)
+instr fetch_A, op_RES6, store2_A ;B7 ;RES 6,A
+instr fetch_B, op_RES7, store2_B ;B8 ;RES 7,B
+instr fetch_C, op_RES7, store2_C ;B9 ;RES 7,C
+instr fetch_D, op_RES7, store2_D ;BA ;RES 7,D
+instr fetch_E, op_RES7, store2_E ;BB ;RES 7,E
+instr fetch_H, op_RES7, store2_H ;BC ;RES 7,H
+instr fetch_L, op_RES7, store2_L ;BD ;RES 7,L
+instr fetch2_mhl, op_RES7, store_MHL ;BE ;RES 7,(HL)
+instr fetch_A, op_RES7, store2_A ;BF ;RES 7,A
+instr fetch_B, op_SET0, store2_B ;C0 ;SET 0,B
+instr fetch_C, op_SET0, store2_C ;C1 ;SET 0,C
+instr fetch_D, op_SET0, store2_D ;C2 ;SET 0,D
+instr fetch_E, op_SET0, store2_E ;C3 ;SET 0,E
+instr fetch_H, op_SET0, store2_H ;C4 ;SET 0,H
+instr fetch_L, op_SET0, store2_L ;C5 ;SET 0,L
+instr fetch2_mhl, op_SET0, store_MHL ;C6 ;SET 0,(HL)
+instr fetch_A, op_SET0, store2_A ;C7 ;SET 0,A
+instr fetch_B, op_SET1, store2_B ;C8 ;SET 1,B
+instr fetch_C, op_SET1, store2_C ;C9 ;SET 1,C
+instr fetch_D, op_SET1, store2_D ;CA ;SET 1,D
+instr fetch_E, op_SET1, store2_E ;CB ;SET 1,E
+instr fetch_H, op_SET1, store2_H ;CC ;SET 1,H
+instr fetch_L, op_SET1, store2_L ;CD ;SET 1,L
+instr fetch2_mhl, op_SET1, store_MHL ;CE ;SET 1,(HL)
+instr fetch_A, op_SET1, store2_A ;CF ;SET 1,A
+instr fetch_B, op_SET2, store2_B ;D0 ;SET 2,B
+instr fetch_C, op_SET2, store2_C ;D1 ;SET 2,C
+instr fetch_D, op_SET2, store2_D ;D2 ;SET 2,D
+instr fetch_E, op_SET2, store2_E ;D3 ;SET 2,E
+instr fetch_H, op_SET2, store2_H ;D4 ;SET 2,H
+instr fetch_L, op_SET2, store2_L ;D5 ;SET 2,L
+instr fetch2_mhl, op_SET2, store_MHL ;D6 ;SET 2,(HL)
+instr fetch_A, op_SET2, store2_A ;D7 ;SET 2,A
+instr fetch_B, op_SET3, store2_B ;D8 ;SET 3,B
+instr fetch_C, op_SET3, store2_C ;D9 ;SET 3,C
+instr fetch_D, op_SET3, store2_D ;DA ;SET 3,D
+instr fetch_E, op_SET3, store2_E ;DB ;SET 3,E
+instr fetch_H, op_SET3, store2_H ;DC ;SET 3,H
+instr fetch_L, op_SET3, store2_L ;DD ;SET 3,L
+instr fetch2_mhl, op_SET3, store_MHL ;DE ;SET 3,(HL)
+instr fetch_A, op_SET3, store2_A ;DF ;SET 3,A
+instr fetch_B, op_SET4, store2_B ;E0 ;SET 4,B
+instr fetch_C, op_SET4, store2_C ;E1 ;SET 4,C
+instr fetch_D, op_SET4, store2_D ;E2 ;SET 4,D
+instr fetch_E, op_SET4, store2_E ;E3 ;SET 4,E
+instr fetch_H, op_SET4, store2_H ;E4 ;SET 4,H
+instr fetch_L, op_SET4, store2_L ;E5 ;SET 4,L
+instr fetch2_mhl, op_SET4, store_MHL ;E6 ;SET 4,(HL)
+instr fetch_A, op_SET4, store2_A ;E7 ;SET 4,A
+instr fetch_B, op_SET5, store2_B ;E8 ;SET 5,B
+instr fetch_C, op_SET5, store2_C ;E9 ;SET 5,C
+instr fetch_D, op_SET5, store2_D ;EA ;SET 5,D
+instr fetch_E, op_SET5, store2_E ;EB ;SET 5,E
+instr fetch_H, op_SET5, store2_H ;EC ;SET 5,H
+instr fetch_L, op_SET5, store2_L ;ED ;SET 5,L
+instr fetch2_mhl, op_SET5, store_MHL ;EE ;SET 5,(HL)
+instr fetch_A, op_SET5, store2_A ;EF ;SET 5,A
+instr fetch_B, op_SET6, store2_B ;F0 ;SET 6,B
+instr fetch_C, op_SET6, store2_C ;F1 ;SET 6,C
+instr fetch_D, op_SET6, store2_D ;F2 ;SET 6,D
+instr fetch_E, op_SET6, store2_E ;F3 ;SET 6,E
+instr fetch_H, op_SET6, store2_H ;F4 ;SET 6,H
+instr fetch_L, op_SET6, store2_L ;F5 ;SET 6,L
+instr fetch2_mhl, op_SET6, store_MHL ;F6 ;SET 6,(HL)
+instr fetch_A, op_SET6, store2_A ;F7 ;SET 6,A
+instr fetch_B, op_SET7, store2_B ;F8 ;SET 7,B
+instr fetch_C, op_SET7, store2_C ;F9 ;SET 7,C
+instr fetch_D, op_SET7, store2_D ;FA ;SET 7,D
+instr fetch_E, op_SET7, store2_E ;FB ;SET 7,E
+instr fetch_H, op_SET7, store2_H ;FC ;SET 7,H
+instr fetch_L, op_SET7, store2_L ;FD ;SET 7,L
+instr fetch2_mhl, op_SET7, store_MHL ;FE ;SET 7,(HL)
+instr fetch_A, op_SET7, store2_A ;FF ;SET 7,A
+
+
+ opctable DDFDCBjmp, PC ;+256
+
+instr fetch_nop, op_RLC, store2_B ;00 ;RLC (Ix+d),B
+instr fetch_nop, op_RLC, store2_C ;01 ;RLC (Ix+d),C
+instr fetch_nop, op_RLC, store2_D ;02 ;RLC (Ix+d),D
+instr fetch_nop, op_RLC, store2_E ;03 ;RLC (Ix+d),E
+instr fetch_nop, op_RLC, store2_H ;04 ;RLC (Ix+d),H
+instr fetch_nop, op_RLC, store2_L ;05 ;RLC (Ix+d),L
+instr fetch_nop, op_RLC, store_nop ;06 ;RLC (Ix+d)
+instr fetch_nop, op_RLC, store2_A ;07 ;RLC (Ix+d),A
+instr fetch_nop, op_RRC, store2_B ;08 ;RRC (Ix+d),B
+instr fetch_nop, op_RRC, store2_C ;09 ;RRC (Ix+d),C
+instr fetch_nop, op_RRC, store2_D ;0A ;RRC (Ix+d),D
+instr fetch_nop, op_RRC, store2_E ;0B ;RRC (Ix+d),E
+instr fetch_nop, op_RRC, store2_H ;0C ;RRC (Ix+d),H
+instr fetch_nop, op_RRC, store2_L ;0D ;RRC (Ix+d),L
+instr fetch_nop, op_RRC, store_nop ;0E ;RRC (Ix+d)
+instr fetch_nop, op_RRC, store2_A ;0F ;RRC (Ix+d),A
+instr fetch_nop, op_RL, store2_B ;10 ;RL (Ix+d),B
+instr fetch_nop, op_RL, store2_C ;11 ;RL (Ix+d),C
+instr fetch_nop, op_RL, store2_D ;12 ;RL (Ix+d),D
+instr fetch_nop, op_RL, store2_E ;13 ;RL (Ix+d),E
+instr fetch_nop, op_RL, store2_H ;14 ;RL (Ix+d),H
+instr fetch_nop, op_RL, store2_L ;15 ;RL (Ix+d),L
+instr fetch_nop, op_RL, store_nop ;16 ;RL (Ix+d)
+instr fetch_nop, op_RL, store2_A ;17 ;RL (Ix+d),A
+instr fetch_nop, op_RR, store2_B ;18 ;RR (Ix+d),B
+instr fetch_nop, op_RR, store2_C ;19 ;RR (Ix+d),C
+instr fetch_nop, op_RR, store2_D ;1A ;RR (Ix+d),D
+instr fetch_nop, op_RR, store2_E ;1B ;RR (Ix+d),E
+instr fetch_nop, op_RR, store2_H ;1C ;RR (Ix+d),H
+instr fetch_nop, op_RR, store2_L ;1D ;RR (Ix+d),L
+instr fetch_nop, op_RR, store_nop ;1E ;RR (Ix+d)
+instr fetch_nop, op_RR, store2_A ;1F ;RR (Ix+d),A
+instr fetch_nop, op_SLA, store2_B ;20 ;SLA (Ix+d),B
+instr fetch_nop, op_SLA, store2_C ;21 ;SLA (Ix+d),C
+instr fetch_nop, op_SLA, store2_D ;22 ;SLA (Ix+d),D
+instr fetch_nop, op_SLA, store2_E ;23 ;SLA (Ix+d),E
+instr fetch_nop, op_SLA, store2_H ;24 ;SLA (Ix+d),H
+instr fetch_nop, op_SLA, store2_L ;25 ;SLA (Ix+d),L
+instr fetch_nop, op_SLA, store_nop ;26 ;SLA (Ix+d)
+instr fetch_nop, op_SLA, store2_A ;27 ;SLA (Ix+d),A
+instr fetch_nop, op_SRA, store2_B ;28 ;SRA (Ix+d),B
+instr fetch_nop, op_SRA, store2_C ;29 ;SRA (Ix+d),C
+instr fetch_nop, op_SRA, store2_D ;2A ;SRA (Ix+d),D
+instr fetch_nop, op_SRA, store2_E ;2B ;SRA (Ix+d),E
+instr fetch_nop, op_SRA, store2_H ;2C ;SRA (Ix+d),H
+instr fetch_nop, op_SRA, store2_L ;2D ;SRA (Ix+d),L
+instr fetch_nop, op_SRA, store_nop ;2E ;SRA (Ix+d)
+instr fetch_nop, op_SRA, store2_A ;2F ;SRA (Ix+d),A
+instr fetch_nop, op_SLL, store2_B ;30 ;SLL (Ix+d),B
+instr fetch_nop, op_SLL, store2_C ;31 ;SLL (Ix+d),C
+instr fetch_nop, op_SLL, store2_D ;32 ;SLL (Ix+d),D
+instr fetch_nop, op_SLL, store2_E ;33 ;SLL (Ix+d),E
+instr fetch_nop, op_SLL, store2_H ;34 ;SLL (Ix+d),H
+instr fetch_nop, op_SLL, store2_L ;35 ;SLL (Ix+d),L
+instr fetch_nop, op_SLL, store_nop ;36 ;SLL (Ix+d)
+instr fetch_nop, op_SLL, store2_A ;37 ;SLL (Ix+d),A
+instr fetch_nop, op_SRL, store2_B ;38 ;SRL (Ix+d),B
+instr fetch_nop, op_SRL, store2_C ;39 ;SRL (Ix+d),C
+instr fetch_nop, op_SRL, store2_D ;3A ;SRL (Ix+d),D
+instr fetch_nop, op_SRL, store2_E ;3B ;SRL (Ix+d),E
+instr fetch_nop, op_SRL, store2_H ;3C ;SRL (Ix+d),H
+instr fetch_nop, op_SRL, store2_L ;3D ;SRL (Ix+d),L
+instr fetch_nop, op_SRL, store_nop ;3E ;SRL (Ix+d)
+instr fetch_nop, op_SRL, store2_A ;3F ;SRL (Ix+d),A
+instr fetch_nop, op_BIT0, store_nop ;40 ;BIT 0,(Ix+d),B
+instr fetch_nop, op_BIT0, store_nop ;41 ;BIT 0,(Ix+d),C
+instr fetch_nop, op_BIT0, store_nop ;42 ;BIT 0,(Ix+d),D
+instr fetch_nop, op_BIT0, store_nop ;43 ;BIT 0,(Ix+d),E
+instr fetch_nop, op_BIT0, store_nop ;44 ;BIT 0,(Ix+d),H
+instr fetch_nop, op_BIT0, store_nop ;45 ;BIT 0,(Ix+d),L
+instr fetch_nop, op_BIT0, store_nop ;46 ;BIT 0,(Ix+d)
+instr fetch_nop, op_BIT0, store_nop ;47 ;BIT 0,(Ix+d),A
+instr fetch_nop, op_BIT1, store_nop ;48 ;BIT 1,(Ix+d),B
+instr fetch_nop, op_BIT1, store_nop ;49 ;BIT 1,(Ix+d),C
+instr fetch_nop, op_BIT1, store_nop ;4A ;BIT 1,(Ix+d),D
+instr fetch_nop, op_BIT1, store_nop ;4B ;BIT 1,(Ix+d),E
+instr fetch_nop, op_BIT1, store_nop ;4C ;BIT 1,(Ix+d),H
+instr fetch_nop, op_BIT1, store_nop ;4D ;BIT 1,(Ix+d),L
+instr fetch_nop, op_BIT1, store_nop ;4E ;BIT 1,(Ix+d)
+instr fetch_nop, op_BIT1, store_nop ;4F ;BIT 1,(Ix+d),A
+instr fetch_nop, op_BIT2, store_nop ;50 ;BIT 2,(Ix+d),B
+instr fetch_nop, op_BIT2, store_nop ;51 ;BIT 2,(Ix+d),C
+instr fetch_nop, op_BIT2, store_nop ;52 ;BIT 2,(Ix+d),D
+instr fetch_nop, op_BIT2, store_nop ;53 ;BIT 2,(Ix+d),E
+instr fetch_nop, op_BIT2, store_nop ;54 ;BIT 2,(Ix+d),H
+instr fetch_nop, op_BIT2, store_nop ;55 ;BIT 2,(Ix+d),L
+instr fetch_nop, op_BIT2, store_nop ;56 ;BIT 2,(Ix+d)
+instr fetch_nop, op_BIT2, store_nop ;57 ;BIT 2,(Ix+d),A
+instr fetch_nop, op_BIT3, store_nop ;58 ;BIT 3,(Ix+d),B
+instr fetch_nop, op_BIT3, store_nop ;59 ;BIT 3,(Ix+d),C
+instr fetch_nop, op_BIT3, store_nop ;5A ;BIT 3,(Ix+d),D
+instr fetch_nop, op_BIT3, store_nop ;5B ;BIT 3,(Ix+d),E
+instr fetch_nop, op_BIT3, store_nop ;5C ;BIT 3,(Ix+d),H
+instr fetch_nop, op_BIT3, store_nop ;5D ;BIT 3,(Ix+d),L
+instr fetch_nop, op_BIT3, store_nop ;5E ;BIT 3,(Ix+d)
+instr fetch_nop, op_BIT3, store_nop ;5F ;BIT 3,(Ix+d),A
+instr fetch_nop, op_BIT4, store_nop ;60 ;BIT 4,(Ix+d),B
+instr fetch_nop, op_BIT4, store_nop ;61 ;BIT 4,(Ix+d),C
+instr fetch_nop, op_BIT4, store_nop ;62 ;BIT 4,(Ix+d),D
+instr fetch_nop, op_BIT4, store_nop ;63 ;BIT 4,(Ix+d),E
+instr fetch_nop, op_BIT4, store_nop ;64 ;BIT 4,(Ix+d),H
+instr fetch_nop, op_BIT4, store_nop ;65 ;BIT 4,(Ix+d),L
+instr fetch_nop, op_BIT4, store_nop ;66 ;BIT 4,(Ix+d)
+instr fetch_nop, op_BIT4, store_nop ;67 ;BIT 4,(Ix+d),A
+instr fetch_nop, op_BIT5, store_nop ;68 ;BIT 5,(Ix+d),B
+instr fetch_nop, op_BIT5, store_nop ;69 ;BIT 5,(Ix+d),C
+instr fetch_nop, op_BIT5, store_nop ;6A ;BIT 5,(Ix+d),D
+instr fetch_nop, op_BIT5, store_nop ;6B ;BIT 5,(Ix+d),E
+instr fetch_nop, op_BIT5, store_nop ;6C ;BIT 5,(Ix+d),H
+instr fetch_nop, op_BIT5, store_nop ;6D ;BIT 5,(Ix+d),L
+instr fetch_nop, op_BIT5, store_nop ;6E ;BIT 5,(Ix+d)
+instr fetch_nop, op_BIT5, store_nop ;6F ;BIT 5,(Ix+d),A
+instr fetch_nop, op_BIT6, store_nop ;70 ;BIT 6,(Ix+d),B
+instr fetch_nop, op_BIT6, store_nop ;71 ;BIT 6,(Ix+d),C
+instr fetch_nop, op_BIT6, store_nop ;72 ;BIT 6,(Ix+d),D
+instr fetch_nop, op_BIT6, store_nop ;73 ;BIT 6,(Ix+d),E
+instr fetch_nop, op_BIT6, store_nop ;74 ;BIT 6,(Ix+d),H
+instr fetch_nop, op_BIT6, store_nop ;75 ;BIT 6,(Ix+d),L
+instr fetch_nop, op_BIT6, store_nop ;76 ;BIT 6,(Ix+d)
+instr fetch_nop, op_BIT6, store_nop ;77 ;BIT 6,(Ix+d),A
+instr fetch_nop, op_BIT7, store_nop ;78 ;BIT 7,(Ix+d),B
+instr fetch_nop, op_BIT7, store_nop ;79 ;BIT 7,(Ix+d),C
+instr fetch_nop, op_BIT7, store_nop ;7A ;BIT 7,(Ix+d),D
+instr fetch_nop, op_BIT7, store_nop ;7B ;BIT 7,(Ix+d),E
+instr fetch_nop, op_BIT7, store_nop ;7C ;BIT 7,(Ix+d),H
+instr fetch_nop, op_BIT7, store_nop ;7D ;BIT 7,(Ix+d),L
+instr fetch_nop, op_BIT7, store_nop ;7E ;BIT 7,(Ix+d)
+instr fetch_nop, op_BIT7, store_nop ;7F ;BIT 7,(Ix+d),A
+instr fetch_nop, op_RES0, store2_B ;80 ;RES 0,(Ix+d),B
+instr fetch_nop, op_RES0, store2_C ;81 ;RES 0,(Ix+d),C
+instr fetch_nop, op_RES0, store2_D ;82 ;RES 0,(Ix+d),D
+instr fetch_nop, op_RES0, store2_E ;83 ;RES 0,(Ix+d),E
+instr fetch_nop, op_RES0, store2_H ;84 ;RES 0,(Ix+d),H
+instr fetch_nop, op_RES0, store2_L ;85 ;RES 0,(Ix+d),L
+instr fetch_nop, op_RES0, store_nop ;86 ;RES 0,(Ix+d)
+instr fetch_nop, op_RES0, store2_A ;87 ;RES 0,(Ix+d),A
+instr fetch_nop, op_RES1, store2_B ;88 ;RES 1,(Ix+d),B
+instr fetch_nop, op_RES1, store2_C ;89 ;RES 1,(Ix+d),C
+instr fetch_nop, op_RES1, store2_D ;8A ;RES 1,(Ix+d),D
+instr fetch_nop, op_RES1, store2_E ;8B ;RES 1,(Ix+d),E
+instr fetch_nop, op_RES1, store2_H ;8C ;RES 1,(Ix+d),H
+instr fetch_nop, op_RES1, store2_L ;8D ;RES 1,(Ix+d),L
+instr fetch_nop, op_RES1, store_nop ;8E ;RES 1,(Ix+d)
+instr fetch_nop, op_RES1, store2_A ;8F ;RES 1,(Ix+d),A
+instr fetch_nop, op_RES2, store2_B ;90 ;RES 2,(Ix+d),B
+instr fetch_nop, op_RES2, store2_C ;91 ;RES 2,(Ix+d),C
+instr fetch_nop, op_RES2, store2_D ;92 ;RES 2,(Ix+d),D
+instr fetch_nop, op_RES2, store2_E ;93 ;RES 2,(Ix+d),E
+instr fetch_nop, op_RES2, store2_H ;94 ;RES 2,(Ix+d),H
+instr fetch_nop, op_RES2, store2_L ;95 ;RES 2,(Ix+d),L
+instr fetch_nop, op_RES2, store_nop ;96 ;RES 2,(Ix+d)
+instr fetch_nop, op_RES2, store2_A ;97 ;RES 2,(Ix+d),A
+instr fetch_nop, op_RES3, store2_B ;98 ;RES 3,(Ix+d),B
+instr fetch_nop, op_RES3, store2_C ;99 ;RES 3,(Ix+d),C
+instr fetch_nop, op_RES3, store2_D ;9A ;RES 3,(Ix+d),D
+instr fetch_nop, op_RES3, store2_E ;9B ;RES 3,(Ix+d),E
+instr fetch_nop, op_RES3, store2_H ;9C ;RES 3,(Ix+d),H
+instr fetch_nop, op_RES3, store2_L ;9D ;RES 3,(Ix+d),L
+instr fetch_nop, op_RES3, store_nop ;9E ;RES 3,(Ix+d)
+instr fetch_nop, op_RES3, store2_A ;9F ;RES 3,(Ix+d),A
+instr fetch_nop, op_RES4, store2_B ;A0 ;RES 4,(Ix+d),B
+instr fetch_nop, op_RES4, store2_C ;A1 ;RES 4,(Ix+d),C
+instr fetch_nop, op_RES4, store2_D ;A2 ;RES 4,(Ix+d),D
+instr fetch_nop, op_RES4, store2_E ;A3 ;RES 4,(Ix+d),E
+instr fetch_nop, op_RES4, store2_H ;A4 ;RES 4,(Ix+d),H
+instr fetch_nop, op_RES4, store2_L ;A5 ;RES 4,(Ix+d),L
+instr fetch_nop, op_RES4, store_nop ;A6 ;RES 4,(Ix+d)
+instr fetch_nop, op_RES4, store2_A ;A7 ;RES 4,(Ix+d),A
+instr fetch_nop, op_RES5, store2_B ;A8 ;RES 5,(Ix+d),B
+instr fetch_nop, op_RES5, store2_C ;A9 ;RES 5,(Ix+d),C
+instr fetch_nop, op_RES5, store2_D ;AA ;RES 5,(Ix+d),D
+instr fetch_nop, op_RES5, store2_E ;AB ;RES 5,(Ix+d),E
+instr fetch_nop, op_RES5, store2_H ;AC ;RES 5,(Ix+d),H
+instr fetch_nop, op_RES5, store2_L ;AD ;RES 5,(Ix+d),L
+instr fetch_nop, op_RES5, store_nop ;AE ;RES 5,(Ix+d)
+instr fetch_nop, op_RES5, store2_A ;AF ;RES 5,(Ix+d),A
+instr fetch_nop, op_RES6, store2_B ;B0 ;RES 6,(Ix+d),B
+instr fetch_nop, op_RES6, store2_C ;B1 ;RES 6,(Ix+d),C
+instr fetch_nop, op_RES6, store2_D ;B2 ;RES 6,(Ix+d),D
+instr fetch_nop, op_RES6, store2_E ;B3 ;RES 6,(Ix+d),E
+instr fetch_nop, op_RES6, store2_H ;B4 ;RES 6,(Ix+d),H
+instr fetch_nop, op_RES6, store2_L ;B5 ;RES 6,(Ix+d),L
+instr fetch_nop, op_RES6, store_nop ;B6 ;RES 6,(Ix+d)
+instr fetch_nop, op_RES6, store2_A ;B7 ;RES 6,(Ix+d),A
+instr fetch_nop, op_RES7, store2_B ;B8 ;RES 7,(Ix+d),B
+instr fetch_nop, op_RES7, store2_C ;B9 ;RES 7,(Ix+d),C
+instr fetch_nop, op_RES7, store2_D ;BA ;RES 7,(Ix+d),D
+instr fetch_nop, op_RES7, store2_E ;BB ;RES 7,(Ix+d),E
+instr fetch_nop, op_RES7, store2_H ;BC ;RES 7,(Ix+d),H
+instr fetch_nop, op_RES7, store2_L ;BD ;RES 7,(Ix+d),L
+instr fetch_nop, op_RES7, store_nop ;BE ;RES 7,(Ix+d)
+instr fetch_nop, op_RES7, store2_A ;BF ;RES 7,(Ix+d),A
+instr fetch_nop, op_SET0, store2_B ;C0 ;SET 0,(Ix+d),B
+instr fetch_nop, op_SET0, store2_C ;C1 ;SET 0,(Ix+d),C
+instr fetch_nop, op_SET0, store2_D ;C2 ;SET 0,(Ix+d),D
+instr fetch_nop, op_SET0, store2_E ;C3 ;SET 0,(Ix+d),E
+instr fetch_nop, op_SET0, store2_H ;C4 ;SET 0,(Ix+d),H
+instr fetch_nop, op_SET0, store2_L ;C5 ;SET 0,(Ix+d),L
+instr fetch_nop, op_SET0, store_nop ;C6 ;SET 0,(Ix+d)
+instr fetch_nop, op_SET0, store2_A ;C7 ;SET 0,(Ix+d),A
+instr fetch_nop, op_SET1, store2_B ;C8 ;SET 1,(Ix+d),B
+instr fetch_nop, op_SET1, store2_C ;C9 ;SET 1,(Ix+d),C
+instr fetch_nop, op_SET1, store2_D ;CA ;SET 1,(Ix+d),D
+instr fetch_nop, op_SET1, store2_E ;CB ;SET 1,(Ix+d),E
+instr fetch_nop, op_SET1, store2_H ;CC ;SET 1,(Ix+d),H
+instr fetch_nop, op_SET1, store2_L ;CD ;SET 1,(Ix+d),L
+instr fetch_nop, op_SET1, store_nop ;CE ;SET 1,(Ix+d)
+instr fetch_nop, op_SET1, store2_A ;CF ;SET 1,(Ix+d),A
+instr fetch_nop, op_SET2, store2_B ;D0 ;SET 2,(Ix+d),B
+instr fetch_nop, op_SET2, store2_C ;D1 ;SET 2,(Ix+d),C
+instr fetch_nop, op_SET2, store2_D ;D2 ;SET 2,(Ix+d),D
+instr fetch_nop, op_SET2, store2_E ;D3 ;SET 2,(Ix+d),E
+instr fetch_nop, op_SET2, store2_H ;D4 ;SET 2,(Ix+d),H
+instr fetch_nop, op_SET2, store2_L ;D5 ;SET 2,(Ix+d),L
+instr fetch_nop, op_SET2, store_nop ;D6 ;SET 2,(Ix+d)
+instr fetch_nop, op_SET2, store2_A ;D7 ;SET 2,(Ix+d),A
+instr fetch_nop, op_SET3, store2_B ;D8 ;SET 3,(Ix+d),B
+instr fetch_nop, op_SET3, store2_C ;D9 ;SET 3,(Ix+d),C
+instr fetch_nop, op_SET3, store2_D ;DA ;SET 3,(Ix+d),D
+instr fetch_nop, op_SET3, store2_E ;DB ;SET 3,(Ix+d),E
+instr fetch_nop, op_SET3, store2_H ;DC ;SET 3,(Ix+d),H
+instr fetch_nop, op_SET3, store2_L ;DD ;SET 3,(Ix+d),L
+instr fetch_nop, op_SET3, store_nop ;DE ;SET 3,(Ix+d)
+instr fetch_nop, op_SET3, store2_A ;DF ;SET 3,(Ix+d),A
+instr fetch_nop, op_SET4, store2_B ;E0 ;SET 4,(Ix+d),B
+instr fetch_nop, op_SET4, store2_C ;E1 ;SET 4,(Ix+d),C
+instr fetch_nop, op_SET4, store2_D ;E2 ;SET 4,(Ix+d),D
+instr fetch_nop, op_SET4, store2_E ;E3 ;SET 4,(Ix+d),E
+instr fetch_nop, op_SET4, store2_H ;E4 ;SET 4,(Ix+d),H
+instr fetch_nop, op_SET4, store2_L ;E5 ;SET 4,(Ix+d),L
+instr fetch_nop, op_SET4, store_nop ;E6 ;SET 4,(Ix+d)
+instr fetch_nop, op_SET4, store2_A ;E7 ;SET 4,(Ix+d),A
+instr fetch_nop, op_SET5, store2_B ;E8 ;SET 5,(Ix+d),B
+instr fetch_nop, op_SET5, store2_C ;E9 ;SET 5,(Ix+d),C
+instr fetch_nop, op_SET5, store2_D ;EA ;SET 5,(Ix+d),D
+instr fetch_nop, op_SET5, store2_E ;EB ;SET 5,(Ix+d),E
+instr fetch_nop, op_SET5, store2_H ;EC ;SET 5,(Ix+d),H
+instr fetch_nop, op_SET5, store2_L ;ED ;SET 5,(Ix+d),L
+instr fetch_nop, op_SET5, store_nop ;EE ;SET 5,(Ix+d)
+instr fetch_nop, op_SET5, store2_A ;EF ;SET 5,(Ix+d),A
+instr fetch_nop, op_SET6, store2_B ;F0 ;SET 6,(Ix+d),B
+instr fetch_nop, op_SET6, store2_C ;F1 ;SET 6,(Ix+d),C
+instr fetch_nop, op_SET6, store2_D ;F2 ;SET 6,(Ix+d),D
+instr fetch_nop, op_SET6, store2_E ;F3 ;SET 6,(Ix+d),E
+instr fetch_nop, op_SET6, store2_H ;F4 ;SET 6,(Ix+d),H
+instr fetch_nop, op_SET6, store2_L ;F5 ;SET 6,(Ix+d),L
+instr fetch_nop, op_SET6, store_nop ;F6 ;SET 6,(Ix+d)
+instr fetch_nop, op_SET6, store2_A ;F7 ;SET 6,(Ix+d),A
+instr fetch_nop, op_SET7, store2_B ;F8 ;SET 7,(Ix+d),B
+instr fetch_nop, op_SET7, store2_C ;F9 ;SET 7,(Ix+d),C
+instr fetch_nop, op_SET7, store2_D ;FA ;SET 7,(Ix+d),D
+instr fetch_nop, op_SET7, store2_E ;FB ;SET 7,(Ix+d),E
+instr fetch_nop, op_SET7, store2_H ;FC ;SET 7,(Ix+d),H
+instr fetch_nop, op_SET7, store2_L ;FD ;SET 7,(Ix+d),L
+instr fetch_nop, op_SET7, store_nop ;FE ;SET 7,(Ix+d)
+instr fetch_nop, op_SET7, store2_A ;FF ;SET 7,(Ix+d),A
+
+do_fetch_0:
+ ldi opl,0
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|IN r,[C] |***P0-|Input |r=[C] |
+;
+
+do_op_in: ; in opl,(opl)
+.if PORT_DEBUG
+ push opl
+ cp opl,_0 ; don't debug port 0 (con stat)
+ breq dbg_op_in_1
+ printnewline
+ printstring "Port read: ("
+ mov temp,opl
+ lcall printhex
+ printstring ") -> "
+dbg_op_in_1:
+.endif
+
+ mov temp2,opl
+ lcall portRead
+ mov opl,temp
+ bst z_flags,ZFL_C ;save Carry
+ ldpmx z_flags,sz53p_tab,temp ;S,Z,P
+ bld z_flags,ZFL_C
+
+.if PORT_DEBUG
+ pop temp
+ cp temp,_0
+ breq dbg_op_in_2
+ lcall printhex
+ printstring " "
+dbg_op_in_2:
+.endif
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|OUT [C],r |------|Output |[C]=r |
+;
+
+do_op_out: ; out (c),opl
+.if PORT_DEBUG
+ printnewline
+ printstring "Port write: "
+ mov temp,opl
+ lcall printhex
+ printstring " -> ("
+ mov temp,z_c
+ lcall printhex
+ printstring ") "
+.endif
+ mov temp,opl
+ mov temp2,z_c
+ lcall portWrite
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load |dst=src |
+;
+
+do_op_stbc: ;store bc to mem loc in opl:h
+ movw xl,opl
+ mem_write_s z_c
+ adiw xl,1
+ mem_write_s z_b
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load |dst=src |
+;
+;
+do_op_stde: ;store de to mem loc in opl:h
+ movw xl,opl
+ mem_write_s z_e
+ adiw xl,1
+ mem_write_s z_d
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|LD dst,src|------|Load |dst=src |
+;
+;
+do_op_stsp: ;store sp to mem loc in opl:h
+ movw xl,opl
+ mem_write_s z_spl
+ adiw xl,1
+ mem_write_s z_sph
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|ADC HL,ss |***V0*|Add with Carry |HL=HL+ss+CY |
+;
+
+do_op_ADCHL:
+ lsr z_flags ; ZFL_C --> Carry
+ ldi z_flags,0 ; clear N
+ adc z_l,opl
+ in temp,sreg ; save lower Z
+ adc z_h,oph
+ in temp2,sreg
+
+ and temp,temp2 ; 16bit Z
+ bmov z_flags,ZFL_C, temp2,AVR_C
+ bmov z_flags,ZFL_P, temp2,AVR_V
+ bmov z_flags,ZFL_H, temp2,AVR_H
+ bmov z_flags,ZFL_Z, temp,AVR_Z
+ bmov z_flags,ZFL_S, temp2,AVR_N
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|SBC HL,ss |***V1*|Subtract with carry |HL=HL-ss-CY |
+;
+
+ checkspace PC, 24
+
+do_op_sbchl:
+ lsr z_flags ; get Z80 carry
+ sez ; set z
+ sbc z_l,opl
+ sbc z_h,oph
+ in temp,sreg
+ ldi z_flags,(1<<ZFL_N) ; set N
+ bmov z_flags,ZFL_C, temp,AVR_C
+ bmov z_flags,ZFL_P, temp,AVR_V
+ bmov z_flags,ZFL_H, temp,AVR_H
+ bmov z_flags,ZFL_Z, temp,AVR_Z
+ bmov z_flags,ZFL_S, temp,AVR_N
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|NEG |***V1*|Negate A |A=0-A |
+
+;
+do_op_NEG:
+ ldi temp,0
+ sub temp,z_a
+ mov z_a,temp
+ in temp,sreg
+ ldpmx z_flags,sz53p_tab,z_a ;S,Z,P
+ bmov z_flags,ZFL_C, temp,AVR_C
+ bmov z_flags,ZFL_H, temp,AVR_H
+ do_z80_flags_V
+ do_z80_flags_set_N
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|RETI |------|Return from Interrupt|PC=[SP]+ |
+;|RETN |------|Return from NMI | Copy IFF2 to IFF1 |
+
+
+do_op_RETI:
+do_op_RETN:
+ ldd temp,y+oz_istat
+ bmov temp,IFF1, temp,IFF2
+ std y+oz_istat,temp
+ ljmp do_store_ret
+
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|IM n |------|Interrupt Mode | (n=0,1,2)|
+
+do_op_IM0:
+ ldd temp,y+oz_istat
+ andi temp, ~IM_MASK
+ std y+oz_istat,temp
+ ret
+
+do_op_IM1:
+ ldd temp,y+oz_istat
+ andi temp,~IM_MASK
+ ori temp,IM1
+ std y+oz_istat,temp
+ ret
+
+do_op_IM2:
+ ldd temp,y+oz_istat
+ andi temp, ~IM_MASK
+ ori temp,IM2
+ std y+oz_istat,temp
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|LD A,i |**0*0-|Load |(i=I,R) IFF2 --> P |
+;|LD i,A |------|Load |(i=I,R) |
+
+do_op_ldai:
+ ldd z_a,y+oz_i
+ rjmp op_ldar1
+
+do_op_ldar:
+ ldd z_a,y+oz_r
+op_ldar1:
+ bst z_flags,ZFL_C ;save C
+ ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
+ bld z_flags,ZFL_C ;
+ ldd temp,y+oz_istat
+ bmov z_flags,ZFL_P, temp,IFF2
+ ret
+
+do_op_ldia:
+ std y+oz_i,z_a
+ ret
+
+do_op_ldra:
+ std y+oz_r,z_a
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##|
+;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##|
+
+do_op_rld:
+ swap opl
+ mov oph,opl
+ andi opl,0xf0
+ andi oph,0x0f
+ mov temp,z_a
+ andi temp,0x0f
+ or opl,temp
+ mov temp,z_a
+ andi temp,0xf0
+ or temp,oph
+ mov z_a,temp
+ bst z_flags,ZFL_C ;save C
+ ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
+ bld z_flags,ZFL_C ;
+ ret
+
+do_op_rrd:
+ mov oph,opl
+ andi opl,0xf0
+ andi oph,0x0f
+ mov temp,z_a
+ andi temp,0x0f
+ or opl,temp
+ swap opl
+ mov temp,z_a
+ andi temp,0xf0
+ or temp,oph
+ mov z_a,temp
+ bst z_flags,ZFL_C ;save C
+ ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N
+ bld z_flags,ZFL_C ;
+ ret
+
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# |
+;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 |
+;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# |
+;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 |
+;
+
+ checkspace PC, 13
+
+op_LDxx_common:
+ movw x,z_l ;HL
+; mem_read_ds temp, z
+ lcall dram_read ; temp = (HL)
+ movw x,z_e ;DE
+; mem_write_ds x, temp
+ lcall dram_write ; (DE) = temp
+
+ cbr z_flags,(1<<ZFL_H) | (1<<ZFL_P) | (1<<ZFL_N)
+
+ movw x,z_c
+ sbiw x,1 ;BC--
+ movw z_c,x
+ breq PC+2
+ sbr z_flags,(1<<ZFL_P)
+ ret
+
+ checkspace PC, 6
+
+do_op_LDI:
+ rcall op_LDxx_common
+ sub z_e,_255 ;-low(-1) DE++
+ sbc z_d,_255 ;-high(-1)
+ sub z_l,_255 ;-low(-1) HL++
+ sbc z_h,_255 ;-high(-1)
+ ret
+
+ checkspace PC, 6
+
+do_op_LDD:
+ rcall op_LDxx_common
+ add z_e,_255 ;+low(-1) DE--
+ adc z_d,_255 ;+high(-1)
+ add z_l,_255 ;+low(-1) HL--
+ adc z_h,_255 ;+high(-1)
+ ret
+
+ checkspace PC, 5
+
+do_op_LDIR:
+ rcall do_op_LDI
+#if 1
+ sbrc z_flags,ZFL_P
+ rjmp do_op_LDIR
+ ret
+#else
+ sbrs z_flags,ZFL_P
+ ret
+ sbiw z_pcl,2
+ ret
+#endif
+
+ checkspace PC, 5
+
+do_op_LDDR:
+ rcall do_op_LDD
+ sbrs z_flags,ZFL_P
+ ret
+ sbiw z_pcl,2
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|CPD |****1-|Compare and Decrement|A-[HL],HL=HL-1,BC=BC-1|
+;|CPDR |****1-|Compare, Dec., Repeat|CPD till A=[HL]or BC=0|
+;|CPI |****1-|Compare and Increment|A-[HL],HL=HL+1,BC=BC-1|
+;|CPIR |****1-|Compare, Inc., Repeat|CPI till A=[HL]or BC=0|
+
+
+ checkspace PC, 21
+
+op_CPxx_common:
+ movw x,z_l ; HL
+
+ movw z,z_c ;BC
+
+ cbr z_flags,(1<<ZFL_S)|(1<<ZFL_Z)|(1<<ZFL_H)|(1<<ZFL_P)
+ sbr z_flags,(1<<ZFL_N)
+ lcall dram_read ; temp = (HL)
+
+ cp z_a,temp ; A - (HL)
+
+ brpl PC+2
+ sbr z_flags,(1<<ZFL_S)
+ brne PC+2
+ sbr z_flags,(1<<ZFL_Z)
+ brhc PC+2
+ sbr z_flags,(1<<ZFL_H)
+
+ sbiw z,1 ; BC--
+ breq PC+2
+ sbr z_flags,(1<<ZFL_P)
+ movw z_c,z ;BC
+ ret
+
+ checkspace PC, 5
+
+do_op_CPI:
+ rcall op_CPxx_common
+ adiw x,1 ; HL++
+ movw z_l,x ; HL
+ ret
+
+
+ checkspace PC, 5
+
+do_op_CPD:
+ rcall op_CPxx_common
+ sbiw x,1 ; HL--
+ movw z_l,x ; HL
+ ret
+
+ checkspace PC, 7
+
+do_op_CPIR:
+ rcall do_op_CPI
+ sbrc z_flags,ZFL_Z
+ ret
+ sbrs z_flags,ZFL_P
+ ret
+ sbiw z_pcl,2
+ ret
+
+ checkspace PC, 7
+
+do_op_CPDR:
+ rcall do_op_CPD
+ sbrc z_flags,ZFL_Z
+ ret
+ sbrs z_flags,ZFL_P
+ ret
+ sbiw z_pcl,2
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|INI |?*??1-|Input and Increment |[HL]=[C],HL=HL+1,B=B-1|
+;|IND |?*??1-|Input and Decrement |[HL]=[C],HL=HL-1,B=B-1|
+;|INIR |?1??1-|Input, Inc., Repeat |INI till B=0 |
+;|INDR |?1??1-|Input, Dec., Repeat |IND till B=0 |
+
+ checkspace PC, 12
+
+op_INxx_common:
+ cbr z_flags,(1<<ZFL_Z)
+ sbr z_flags,(1<<ZFL_N)
+ mov temp2,z_c ;C
+ lcall portRead
+ movw x,z_l ;HL
+ lcall dram_write
+ dec z_b ;B
+ brne PC+2
+ sbr z_flags,(1<<ZFL_Z)
+ ret
+
+ checkspace PC, 4
+
+do_op_INI:
+ rcall op_INxx_common
+ adiw x,1
+ movw z_l,x ;HL
+ ret
+
+ checkspace PC, 4
+
+do_op_IND:
+ rcall op_INxx_common
+ sbiw x,1
+ movw z_l,x ;HL
+ ret
+
+ checkspace PC, 5
+
+do_op_INIR:
+ rcall do_op_INI
+ sbrc z_flags,ZFL_Z
+ ret
+ sbiw z_pcl,2
+ ret
+
+ checkspace PC, 5
+
+do_op_INDR:
+ rcall do_op_IND
+ sbrc z_flags,ZFL_Z
+ ret
+ sbiw z_pcl,2
+ ret
+
+;----------------------------------------------------------------
+;|Mnemonic |SZHPNC|Description |Notes |
+;----------------------------------------------------------------
+;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1|
+;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1|
+;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 |
+;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 |
+
+ checkspace PC, 12
+
+op_OUTxx_common:
+ movw x,z_l ;HL
+ lcall dram_read ;temp = (z)
+ mov temp2,z_c ;C
+ lcall portWrite
+ cbr z_flags,(1<<ZFL_Z)
+ sbr z_flags,(1<<ZFL_N)
+ dec z_b ;B
+ brne PC+2
+ sbr z_flags,(1<<ZFL_Z)
+ ret
+
+ checkspace PC, 4
+
+do_op_OUTI:
+ rcall op_OUTxx_common
+ sub z_l,_255 ;-low(-1)
+ sbc z_h,_255 ;-high(-1)
+ ret
+
+ checkspace PC, 4
+
+do_op_OUTD:
+ rcall op_OUTxx_common
+ add z_l,_255 ;+low(-1)
+ adc z_h,_255 ;+high(-1)
+ ret
+
+ checkspace PC, 5
+
+do_op_OTIR:
+ rcall do_op_OUTI
+ sbrc z_flags,ZFL_Z
+ ret
+ sbiw z_pcl,2
+ ret
+
+ checkspace PC, 5
+
+do_op_OTDR:
+ rcall do_op_OUTD
+ sbrc z_flags,ZFL_Z
+ ret
+ sbiw z_pcl,2
+ ret
+
+#if 1
+ opctable EDjmp, PC ;+ 2*256