z_h: .byte 1
z_l: .byte 1
-
.cseg
;Init z80
notraceon:
.endif
-
.if PRINT_PC
cpi z_pch,DBG_TRACE_BOTTOM
brlo noprintpc
ret
-
; ------------ Operation phase stuff -----------------
;.org (PC+255) & 0xff00
gen_opjmp op_dec
gen_opjmp op_inc16
gen_opjmp op_dec16
- gen_opjmp op_rlc
- gen_opjmp op_rrc
- gen_opjmp op_rr
- gen_opjmp op_rl
+ gen_opjmp op_rlca
+ gen_opjmp op_rrca
+ gen_opjmp op_rra
+ gen_opjmp op_rla
gen_opjmp op_adda
gen_opjmp op_adca
gen_opjmp op_subfa
.equ ZFL_N = 1
.equ ZFL_C = 0
-
.equ AVR_T = SREG_T
.equ AVR_H = SREG_H
.equ AVR_S = SREG_S
; Z: Set if Acc. is Zero after operation, reset otherwise.
; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise.
+#if 1
+
+do_op_da:
+
+#if EM_Z80
+ sbrc z_flags,ZFL_N ;if add-op
+ rjmp op_da_sub ;then
+#endif
+
+op_da_add:
+ ldi temp2,0 ; new C and H flag
+ sbrc z_flags,ZFL_H ; |
+ rjmp op_da_a01 ; if (H flag ...
+ mov temp,opl ; |
+ andi temp,0x0f ; |
+ cpi temp,0x0a ; or (lower nibble >= 0x0A))
+ brlo op_da_a10 ; |
+op_da_a01: ; then
+ ldi oph,0x06 ; add 6 to lower nibble
+ add opl,oph ;
+ brhc op_da_02 ; if
+ ori temp2,(1<<ZFL_H) ; set new H flag
+op_da_02: ;
+ brcc op_da_a10 ; if
+ ori temp2,(1<<ZFL_C) ; set new H flag
+op_da_a10: ; endif
+ sbrc z_flags,ZFL_C ; |
+ rjmp op_da_a12 ; if (C flag ...
+ cpi opl,0xA0 ; |... or upper nibble >= 0xA0)
+ brlo op_da_a13 ;
+op_da_a12: ;
+ ldi oph,0x60 ; add 6 to lower nibble
+ add opl,oph ;
+ ori temp2,(1<<ZFL_C) ; set new C flag
+op_da_a13: ;
+ ldpmx z_flags, sz53p_tab, opl ; get S,Z,P flag
+ or z_flags,temp2 ; merge new C and H flag
+ ret
+
+#if EM_Z80
+
+op_da_sub: ;else (sub-op)
+ rcall do_op_inv ; TODO: !
+ ret ;endif
+#endif
+
+#else
do_op_da:
ldi temp2,0 ;new C and H flag
op_da_sub: ;else (sub-op)
rcall do_op_inv ; TODO: !
ret ;endif
-
+#endif
;----------------------------------------------------------------