X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/162601cae715d054f74f6882aacb07c1e7a26631..HEAD:/avr/Z80int-jmp.asm diff --git a/avr/Z80int-jmp.asm b/avr/Z80int-jmp.asm index 7b17fa4..40d5e3d 100644 --- a/avr/Z80int-jmp.asm +++ b/avr/Z80int-jmp.asm @@ -1,9 +1,9 @@ ; 8080/Z80 Interpreter. ; This is part of the Z80-CP/M emulator written by Sprite_tm. -; +; ; Copyright (C) 2010 Sprite_tm -; Copyright (C) 2010 Leo C. +; Copyright (C) 2010-2013 Leo C. ; Copyright (C) 2010 Horst S. ; This file is part of avrcpm. @@ -21,67 +21,60 @@ ; You should have received a copy of the GNU General Public License ; along with avrcpm. If not, see . ; -; $Id$ +; $Id: Z80int-jmp.asm 93 2014-01-03 16:32:32Z rapid $ ; #if EM_Z80 - #define OPC_TABSTART 0x1B00 -#else - #define OPC_TABSTART 0x1200 -#endif .dseg -z_regs: -z_b: .byte 1 -z_c: .byte 1 -z_d: .byte 1 -z_e: .byte 1 -z_h: .byte 1 -z_l: .byte 1 - - .equ oz_b = 0 - .equ oz_c = 1 - .equ oz_d = 2 - .equ oz_e = 3 - .equ oz_h = 4 - .equ oz_l = 5 - - -#if EM_Z80 -z_b2: .byte 1 -z_c2: .byte 1 -z_d2: .byte 1 -z_e2: .byte 1 -z_h2: .byte 1 -z_l2: .byte 1 -z_f2: .byte 1 -z_a2: .byte 1 - .equ r2ofs = z_b2-z_b - .equ oz_b2 = 6 - .equ oz_c2 = 7 - .equ oz_d2 = 8 - .equ oz_e2 = 9 - .equ oz_h2 = 10 - .equ oz_l2 = 11 - .equ oz_f2 = 12 - .equ oz_a2 = 13 - -z_xh: .byte 1 -z_xl: .byte 1 -z_yh: .byte 1 -z_yl: .byte 1 - -z_i: .byte 1 -z_r: .byte 1 - .equ oz_xh = 14 - .equ oz_xl = 15 - .equ oz_yh = 16 - .equ oz_yl = 17 - .equ oz_i = 18 - .equ oz_r = 19 - -z_istat: .byte 1 - .equ oz_istat = 20 +z_regs: +z_c2: + .equ oz_c2 = z_c2 - z_regs + .byte 1 +z_b2: + .equ oz_b2 = z_b2 - z_regs + .byte 1 +z_e2: + .equ oz_e2 = z_e2 - z_regs + .byte 1 +z_d2: + .equ oz_d2 = z_d2 - z_regs + .byte 1 +z_l2: + .equ oz_l2 = z_l2 - z_regs + .byte 1 +z_h2: + .equ oz_h2 = z_h2 - z_regs + .byte 1 +z_f2: + .equ oz_f2 = z_f2 - z_regs + .byte 1 +z_a2: + .equ oz_a2 = z_a2 - z_regs + .byte 1 + +z_xl: + .equ oz_xl = z_xl - z_regs + .byte 1 +z_xh: + .equ oz_xh = z_xh - z_regs + .byte 1 +z_yl: + .equ oz_yl = z_yl - z_regs + .byte 1 +z_yh: + .equ oz_yh = z_yh - z_regs + .byte 1 +z_i: + .equ oz_i = z_i - z_regs + .byte 1 +z_r: + .equ oz_r = z_r - z_regs + .byte 1 + +z_istat: + .equ oz_istat = z_istat - z_regs + .byte 1 .equ IM_MASK = 0x03 ;Mask IM 0..2 .equ IM0 = 0 @@ -90,17 +83,15 @@ z_istat: .byte 1 .equ IFF1 = 2 ;IFF1 Flag .equ IFF2 = 3 ;IFF2 Flag - #endif .cseg - + ;Init z80 z80_init: ldiw z_pc,IPLADDR ldiw y,z_regs - cbi flags,trace clr intstat printnewline @@ -130,19 +121,21 @@ noprintpc: ;TODO: hier kommt die Interruptbehandlung rein - cpse intstat,_0 ;Fast path if no trace, int, break, ... + cpse intstat,_0 ; 2 Fast path if no trace, int, break, ... rjmp int_test int_instr: - mem_read_ds zl,z_pc ;zl = memReadByte(z_pc) - adiw z_pcl,1 ;++z_pc - ldi zh,high(opcjmp) ; - icall - rjmp main ; - + mem_read_ds zl,z_pc ;11 zl = memReadByte(z_pc) + adiw z_pcl,1 ; 2 ++z_pc + ldi zh,high(opcjmp) ; 1 + icall ; 3 (+4 ret) + rjmp main ; 2 + ; / 25 cycles minimum (NOP) int_test: sbrs intstat,i_trace rjmp int_notrace + sbrc intstat,i_halt + rjmp int_notrace cpi z_pch,DBG_TRACE_BOTTOM brlo int_notrace cpi z_pch,DBG_TRACE_TOP @@ -162,35 +155,80 @@ int_nobreak: ;-------------------------------------------------- -; init opcode table +; init opcode table ; -; opctable opc_name +; opctable opc_name, pos ; -#if EM_Z80 - .equ numtabs_ = 5 -#else - .equ numtabs_ = 1 -#endif .macro opctable + + .set opcjmp_table_pos_ = (@1 + 255) & -0x100 ;0xff00 + .ifndef opc_tabnext_ - .if OPC_TABSTART & 0x00ff - .error "OPC_TABSTART is not page aligned!" - .endif - .set opc_tabnext_ = OPC_TABSTART - .equ opc_tablow_ = opc_tabnext_ - .equ opc_tabend_ = opc_tablow_ + (256 * numtabs_) + 128 - .equ sz53p_table_pos = opc_tablow_ + (256 * numtabs_) + .set opc_tabnext_ = opcjmp_table_pos_ + + .set opc_tablow_0 = 0 + .set opc_tablen_0 = 0 + .set opc_tablow_1 = 0 + .set opc_tablen_1 = 0 + .endif + + .if opcjmp_table_pos_ < opc_tabnext_ + .set opcjmp_table_pos_ = opc_tabnext_ .endif - .set opcjmp_table_pos_ = opc_tabnext_ - .set opc_tabnext_ = opc_tabnext_ + 256 + .if opc_tablow_0 == 0 + .set opc_tablow_0 = opcjmp_table_pos_ + .set opc_tablen_0 = 256 +;.message "add tab_0" + .elif opc_tablow_1 == 0 + .if (opc_tablow_0 + opc_tablen_0) == opcjmp_table_pos_ + .set opc_tablen_0 = opc_tablen_0 + 256 +;.message " tab_0++" + .else + .set opc_tablow_1 = opcjmp_table_pos_ + .set opc_tablen_1 = 256 +;.message "add tab_1" + .endif + .else + .if (opc_tablow_1 + opc_tablen_1) == opcjmp_table_pos_ + .set opc_tablen_1 = opc_tablen_1 + 256 +;.message "tab_1++" + .else + .error "Tab full_" + .endif + .endif + .set opc_tabnext_ = opcjmp_table_pos_ + 256 .equ @0 = opcjmp_table_pos_ - .set todo_table_pos_ = 0 +.endm +;-------------------------------------------------- +; +; checkspace frompos, size +; +.macro checkspace + + .ifdef opc_tablow_0 + .if @0 <= opc_tablow_0 + .if (@0 + @1) > opc_tablow_0 + .org opc_tablow_0 + opc_tablen_0 +; .message "skip tab, remove tab_0" + .if opc_tablow_1 == 0 + .set opc_tablow_0 = 0 + .set opc_tablen_0 = 0 + .else + .set opc_tablow_0 = opc_tablow_1 + .set opc_tablen_0 = opc_tablen_1 + .set opc_tablow_1 = 0 + .set opc_tablen_1 = 0 +; .message "remove tab_1" + .endif + .endif + .endif + .endif .endm ;-------------------------------------------------- @@ -198,18 +236,23 @@ int_nobreak: ; ; instr fetch, op, store ; -.macro instr +.macro instr .set fetch_ = (do_@0 != do_fetch_nop) ; must call or jump to fetch action .set op_ = (do_@1 != do_op_nop) ; must call or jump to op action .set store_ = (do_@2 != do_store_nop) ; must jump to store action .set cnt_ = fetch_ + op_ + store_ ; number of actions for this instruction - .set action_1_ = 0 - .set action_2_ = 0 - .set action_3_ = 0 - .if cnt_ == 1 + .set done_ = 0 + .set pc_save_ = PC + + .if cnt_ == 0 ; nothing to do (nop) + .org opcjmp_table_pos_ + ret ; go back to main + .org pc_save_ + .set done_ = 1 + .elif cnt_ == 1 ; jump direct to action .if fetch_ .set action_1_ = do_@0 .elif op_ @@ -217,85 +260,44 @@ int_nobreak: .else .set action_1_ = do_@2 .endif - .elif cnt_ == 2 - .if fetch_ - .set action_1_ = do_@0 - .if op_ - .set action_2_ = do_@1 - .else - .set action_2_ = do_@2 - .endif - .else - .set action_1_ = do_@1 - .set action_2_ = do_@2 - .endif - .elif cnt_ == 3 - .set action_1_ = do_@0 - .set action_2_ = do_@1 - .set action_3_ = do_@2 - .endif - - .set longdist_ = 0 - .set pc_save_ = PC - - .org opcjmp_table_pos_ - .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1 - - - .if cnt_ == 0 ; nothing to do (nop) - ret ; go back to main - .elif cnt_ == 1 ; jump direct to action - .if (PC - action_1_) > 2047 - .set longdist_ = 1 ; target action out of reach for rel jump - .else + .if (opcjmp_table_pos_ - action_1_) <= 2047 + .org opcjmp_table_pos_ rjmp action_1_ ; do op and return to main + .org pc_save_ + .set done_ = 1 .endif .endif + .if !done_ - .set done_ = 0 - .if (cnt_ > 1) || longdist_ - ; two or tree actions .if defined (l_@0_@1_@2) - .if (PC - l_@0_@1_@2) <= 2047 - rjmp l_@0_@1_@2 ; generate a jump to action table - .set done_ = 1 - .endif - .endif - - .if !done_ - - .if todo_table_pos_ == 0 - .set todo_table_pos_ = opcjmp_table_pos_ - 2048 - .if todo_table_pos_ < pc_save_ - .set todo_table_pos_ = pc_save_ - .endif - .endif - - .if todo_table_pos_ < opc_tablow_ - .if todo_table_pos_ + 2*cnt_ > opc_tablow_ - .set todo_table_pos_ = opc_tabend_ - .endif - .endif - .if defined (l_@0_@1_@2) - rjmp todo_table_pos_ - .org todo_table_pos_ + .if (opcjmp_table_pos_ - l_@0_@1_@2) <= 2047 + .org opcjmp_table_pos_ + rjmp l_@0_@1_@2 ; generate a jump to action table + .org pc_save_ + .else + checkspace pc_save_, 2 + .set pc_save_ = PC + .org opcjmp_table_pos_ + rjmp pc_save_ + .org pc_save_ jmp l_@0_@1_@2 - .set todo_table_pos_ = PC - .set done_ = 1 .endif - .endif - .if !done_ + .else + + checkspace pc_save_, 2*cnt_ + .set pc_save_ = PC - .equ l_@0_@1_@2 = todo_table_pos_ ; make a label + .org opcjmp_table_pos_ + .equ l_@0_@1_@2 = pc_save_ ; make a label rjmp l_@0_@1_@2 ; generate a jump to action table .org l_@0_@1_@2 .if fetch_ ; must fetch - .if op_ || store_ + .if op_ || store_ .if do_@0 == 0 m_do_@0 .else @@ -333,18 +335,12 @@ int_nobreak: .else ljmp do_@2 ; store is allways last .endif - .endif - - .set todo_table_pos_ = PC + .endif .endif .endif - .if todo_table_pos_ == 0 - .org pc_save_ - .else - .org todo_table_pos_ - .endif + .set opcjmp_table_pos_ = opcjmp_table_pos_ + 1 .endm @@ -354,9 +350,17 @@ do_x_nop: ; ------------ Fetch phase stuff ----------------- + fetch_ops: .equ do_fetch_nop = do_x_nop +do_fetch_rst: + movw x,z_pcl + sbiw x,1 + mem_read_d opl + andi opl,0x38 + ldi oph,0 + ret .macro m_do_fetch_a mov opl,z_a @@ -367,23 +371,25 @@ fetch_ops: ; ret .macro m_do_fetch_b - ldd opl,y+oz_b + mov opl,z_b .endm .equ do_fetch_b = 0 +; mov opl,z_b ; ldd opl,y+oz_b ; ret .macro m_do_fetch_c - ldd opl,y+oz_c + mov opl,z_c .endm .equ do_fetch_c = 0 +; mov opl,z_c ; ldd opl,y+oz_c ; ret .macro m_do_fetch_d - ldd opl,y+oz_d + mov opl,z_d .endm .equ do_fetch_d = 0 @@ -391,7 +397,7 @@ fetch_ops: ; ret .macro m_do_fetch_e - ldd opl,y+oz_e + mov opl,z_e .endm .equ do_fetch_e = 0 @@ -399,40 +405,52 @@ fetch_ops: ; ret .macro m_do_fetch_h - ldd opl,y+oz_h + mov opl,z_h .endm .equ do_fetch_h = 0 -; ldd opl,y+oz_h +; mov opl,z_h ; ret .macro m_do_fetch_l - ldd opl,y+oz_l + mov opl,z_l .endm .equ do_fetch_l = 0 -; ldd opl,y+oz_l +; mov opl,z_l ; ret -do_fetch_af: - mov opl,z_flags - mov oph,z_a - ret +.macro m_do_fetch_af + movw opl,z_flags +.endm -do_fetch_bc: - ldd opl,y+oz_c - ldd oph,y+oz_b - ret +.equ do_fetch_af = 0 +; movw opl,z_flags +; ret -do_fetch_de: - ldd opl,y+oz_e - ldd oph,y+oz_d - ret +.macro m_do_fetch_bc + movw opl,z_c +.endm -do_fetch_hl: - ldd opl,y+oz_l - ldd oph,y+oz_h - ret +.equ do_fetch_bc = 0 +; movw opl,z_c +; ret + +.macro m_do_fetch_de + movw opl,z_e +.endm + +.equ do_fetch_de = 0 +; movw opl,z_e +; ret + +.macro m_do_fetch_hl + movw opl,z_l +.endm + +.equ do_fetch_hl = 0 +; movw opl,z_l +; ret .macro m_do_fetch_sp movw opl,z_spl @@ -443,21 +461,18 @@ do_fetch_hl: ; ret do_fetch_mbc: - ldd xh,y+oz_b - ldd xl,y+oz_c - mem_read_d z_a +; movw x,z_c + mem_read_ds z_a, z_bc ret do_fetch_mde: - ldd xh,y+oz_d - ldd xl,y+oz_e - mem_read_d z_a +; movw x,z_e + mem_read_ds z_a, z_de ret do_fetch_mhl: - ldd xh,y+oz_h - ldd xl,y+oz_l - mem_read_d opl +; movw x,z_l + mem_read_ds opl, z_hl ret do_fetch_msp: @@ -479,88 +494,75 @@ do_fetch_dir16: adiw z_pcl,1 ret -do_fetch_rst: - movw x,z_pcl - sbiw x,1 - mem_read_d opl - andi opl,0x38 - ldi oph,0 - ret - ; ------------ Store phase stuff ----------------- store_ops: .equ do_store_nop = do_x_nop - + do_store_a: mov z_a,opl ret -;.macro m_do_store_b +;.macro m_do_store_b ; std y+oz_b,opl ;.endm ;.equ do_store_b = 0 do_store_b: - std y+oz_b,opl + mov z_b,opl ret do_store_c: - std y+oz_c,opl + mov z_c,opl ret do_store_d: - std y+oz_d,opl + mov z_d,opl ret do_store_e: - std y+oz_e,opl + mov z_e,opl ret do_store_h: - std y+oz_h,opl + mov z_h,opl ret do_store_l: - std y+oz_l,opl + mov z_l,opl ret do_store_af: - mov z_a,oph - mov z_flags,opl + movw z_flags,opl ret do_store_bc: - std y+oz_b,oph - std y+oz_c,opl + movw z_c,opl ret do_store_de: - std y+oz_d,oph - std y+oz_e,opl + movw z_e,opl +; std y+oz_d,oph +; std y+oz_e,opl ret do_store_hl: - std y+oz_h,oph - std y+oz_l,opl + movw z_l,opl ret do_store_mbc: - ldd xh,y+oz_b - ldd xl,y+oz_c - mem_write_s z_a +; movw x,z_c + mem_write_ds z_bc, z_a ret do_store_mde: - ldd xh,y+oz_d - ldd xl,y+oz_e - mem_write_s z_a +; movw x,z_e + mem_write_ds z_de, z_a ret do_store_mhl: - ldd xh,y+oz_h - ldd xl,y+oz_l - mem_write_s opl +; movw x,z_l + mem_write_ds z_hl, opl ret do_store_msp: @@ -580,11 +582,9 @@ do_store_pc: do_store_pcrel: ;add displacement to PC #if EM_Z80 - clr oph - tst opl ;sign extend - brpl stpcr1 - com oph -stpcr1: + mov oph,opl ;sign extend + lsl oph + sbc oph,oph add z_pcl,opl adc z_pch,oph ret @@ -848,8 +848,8 @@ do_store_am: .macro ldpmx ldi zh,high(@1*2) ; table must be page aligned - mov zl,@2 - lpm @0,z + mov zl,@2 + lpm @0,z .endm .macro do_z80_flags_V @@ -888,7 +888,7 @@ do_store_am: #endif .endm - + .macro do_z80_flags_copy_HC #if EM_Z80 bmov z_flags, ZFL_H, z_flags, ZFL_C @@ -976,7 +976,7 @@ do_op_outa: ; out (opl),a ; do_op_ina: ; in a,(opl) .if PORT_DEBUG - push opl + push opl cp opl,_0 ; don't debug port 0 (con stat) breq dbg_op_ina_1 printnewline @@ -1014,6 +1014,19 @@ dbg_op_ina_2: do_op_inc: #if EM_Z80 +#if 1 + andi z_flags,(1<A | ; ; -do_op_rrca: - ;Rotate Right Cyclical. All bits move 1 to the +do_op_rrca: + ;Rotate Right Cyclical. All bits move 1 to the ;right, the lsb becomes c and msb. do_z80_flags_op_rotate lsr z_a @@ -1166,9 +1218,9 @@ do_op_rrc_noc: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|RRA |---- *|Rotate Right Acc. |A=->{CY,A} | ; -; -do_op_rra: - ;Rotate Right. All bits move 1 to the right, the lsb +; +do_op_rra: + ;Rotate Right. All bits move 1 to the right, the lsb ;becomes c, c becomes msb. clc ; get z80 carry to avr carry sbrc z_flags,ZFL_C @@ -1185,9 +1237,9 @@ do_op_rra: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- | ; -; +; do_op_rla: - ;Rotate Left. All bits move 1 to the left, the msb + ;Rotate Left. All bits move 1 to the left, the msb ;becomes c, c becomes lsb. clc sbrc z_flags,ZFL_C @@ -1344,12 +1396,8 @@ do_op_xora: ; ; do_op_addhl: - ldd temp,y+oz_l - ldd temp2,y+oz_h - add opl,temp - adc oph,temp2 - std y+oz_l,opl - std y+oz_h,oph + add z_l,opl + adc z_h,oph in temp,sreg bmov z_flags,ZFL_C, temp,AVR_C do_z80_flags_H @@ -1364,11 +1412,9 @@ do_op_addhl: ; do_op_sthl: ;store hl to mem loc in opl:h movw xl,opl - ldd temp,y+oz_l - mem_write + mem_write_s z_l adiw xl,1 - ldd temp,y+oz_h - mem_write + mem_write_s z_h ret ;---------------------------------------------------------------- @@ -1376,7 +1422,7 @@ do_op_sthl: ;store hl to mem loc in opl:h ;---------------------------------------------------------------- ;|LD dst,src|------|Load |dst=src | ; -; +; do_op_rmem16: movw xl,opl mem_read_d opl @@ -1431,13 +1477,13 @@ do_op_rmem8: ; ; --------------------- ; | N | H | low |H' | -; | | |nibble | | +; | | |nibble | | ; |---+---+-------+---| -; | 0 | * | 0-9 | 0 | -; | 0 | * | a-f | 1 | -; | 1 | 0 | * | 0 | -; | 1 | 1 | 6-f | 0 | -; | 1 | 1 | 0-5 | 1 | +; | 0 | * | 0-9 | 0 | +; | 0 | * | a-f | 1 | +; | 1 | 0 | * | 0 | +; | 1 | 1 | 6-f | 0 | +; | 1 | 1 | 0-5 | 1 | ; --------------------- ; ; Ohter flags: @@ -1451,7 +1497,7 @@ do_op_rmem8: #if 0 #if EM_Z80 - sbrc z_flags,ZFL_N ;if add-op + sbrc z_flags,ZFL_N ;if add-op rjmp op_da_sub ;then #endif @@ -1466,8 +1512,8 @@ op_da_add: brlo op_da_a10 ; | op_da_a01: ; then ldi oph,0x06 ; add 6 to lower nibble - add opl,oph ; - brhc op_da_02 ; if + add opl,oph ; + brhc op_da_02 ; if ori temp2,(1<= 0xA0) - brlo op_da_a13 ; + brlo op_da_a13 ; op_da_a12: ; ldi oph,0x60 ; add 6 to lower nibble add opl,oph ; @@ -1498,8 +1544,8 @@ op_da_sub: ;Else (sub-op) brlo op_da_s10 ; | op_da_s01: ; then ldi oph,0x06 ; add 6 to lower nibble - sub opl,oph ; - brhc PC+2 ; if + sub opl,oph ; + brhc PC+2 ; if ori temp2,(1<= 0xA0) - brlo op_da_s13 ; + brlo op_da_s13 ; op_da_s12: ; ldi oph,0x60 ; add 6 to lower nibble sub opl,oph ; @@ -1525,7 +1571,7 @@ do_op_DAA: ldi oph,0 ;oph: what to add #if EM_Z80 - sbrc z_flags,ZFL_N ;if add-op + sbrc z_flags,ZFL_N ;if add-op rjmp op_da_sub ;then #endif @@ -1542,7 +1588,7 @@ op_da_add: rjmp op_da_a02 ; if (C flag ... cpi opl,0x90 ; |... or upper nibble >= 0x90) brlo op_da_a03 ; | -op_da_a02: +op_da_a02: ori oph,0x60 ; add 0x60 ori temp2,(1<= 0xA0) - brlo op_da_a13 ; -op_da_a12: + brlo op_da_a13 ; +op_da_a12: ori oph,0x60 ; add 0x60 ori temp2,(1<= 0x90) brlo op_da_s03 ; | -op_da_s02: +op_da_s02: ori oph,0x60 ; sub 0x60 ori temp2,(1<= 0xA0) - brlo op_da_s13 ; -op_da_s12: + brlo op_da_s13 ; +op_da_s12: ori oph,0x60 ; sub 0x60 ori temp2,(1<HL | ;|EX DE,HL |------|Exchange |DE<->HL | ;-----------------------------Z80-------------------------------- -; +; do_op_exhl: - ldd temp,y+oz_l - ldd temp2,y+oz_h - std y+oz_l,opl - std y+oz_h,oph - movw opl,temp + movw temp,z_l + movw z_l,opl + movw opl,temp ret ;---------------------------------------------------------------- @@ -1765,7 +1809,7 @@ do_op_ifnz: sbrs z_flags, ZFL_Z ret pop temp ; nix tun - pop temp ; direkt zurueck zu main + pop temp ; direkt zurueck zu main ret ;---------------------------------------------------------------- @@ -1780,7 +1824,7 @@ do_op_ifz: sbrc z_flags, ZFL_Z ret pop temp ; nix tun - pop temp ; direkt zurueck zu main + pop temp ; direkt zurueck zu main ret ;---------------------------------------------------------------- @@ -1795,7 +1839,7 @@ do_op_ifnc: sbrs z_flags, ZFL_C ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1810,7 +1854,7 @@ do_op_ifc: sbrc z_flags, ZFL_C ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1825,7 +1869,7 @@ do_op_ifpo: sbrs z_flags, ZFL_P ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1840,7 +1884,7 @@ do_op_ifpe: sbrc z_flags, ZFL_P ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1855,7 +1899,7 @@ do_op_ifp: ;sign positive, aka s=0 sbrs z_flags, ZFL_S ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1870,7 +1914,7 @@ do_op_ifm: ;sign negative, aka s=1 sbrc z_flags, ZFL_S ret pop temp ; nix tun - pop temp ; direkt zuruech zu main + pop temp ; direkt zuruech zu main ret ;---------------------------------------------------------------- @@ -1890,9 +1934,7 @@ do_op_ifm: ;sign negative, aka s=1 ; (Joe G.) do_op_DJNZ: ; decremt B, jump B=0 - ldd temp,y+oz_b ; B in temp - dec temp ; temp decrementieren - std y+oz_b,temp ; temp in B + dec z_b ; B decrementieren breq do_op_DJNZ_Z ; bei B=0 subi opl, 0x80 ; z_pc + e im Zweierkomplement subi z_pcl,0x80 @@ -1905,12 +1947,10 @@ do_op_DJNZ_Z: #else do_op_djnz: - ldd temp,y+oz_b - dec temp - std y+oz_b,temp + dec z_b brne opdjnze pop temp ; nix tun - pop temp ; direkt zurueck zu main + pop temp ; direkt zurueck zu main opdjnze: ret @@ -1937,6 +1977,29 @@ do_op_EXAF: ;|EXX |------|Exchange |qq<->qq' (except AF)| +#if 1 + +do_op_EXX: + ldd temp ,y+oz_c2 + ldd temp2,y+oz_b2 + std y+oz_c2,z_c + std y+oz_b2,z_b + movw z_c,temp + + ldd temp ,y+oz_e2 + ldd temp2,y+oz_d2 + std y+oz_e2,z_e + std y+oz_d2,z_d + movw z_e,temp + + ldd temp ,y+oz_l2 + ldd temp2,y+oz_h2 + std y+oz_l2,z_l + std y+oz_h2,z_h + movw z_l,temp + ret +#else + do_op_EXX: ldiw z,z_b ldi temp3,6 @@ -1949,6 +2012,8 @@ opexx_loop: brne opexx_loop ret +#endif + #else do_op_djnz: do_op_EXAF: @@ -1959,10 +2024,6 @@ do_op_EXX: #if EM_Z80 -do_op_noni: - sbiw z_pcl,1 ;--z_pc - ret - do_op_prefixED: mem_read_ds zl,z_pc ;zl = memReadByte(z_pc) adiw z_pcl,1 ;++z_pc @@ -2004,10 +2065,9 @@ opprxcb_fd: opprxcb_1: mem_read_s z_pc ;get displacement adiw z_pcl,1 ;++z_pc - clr temp2 ;sign extend - tst temp - brpl PC+2 - com temp2 + mov temp2,temp ;sign extend + lsl temp2 + sbc temp2,temp2 add xl,temp ;add displacement adc xh,temp2 mem_read_d opl @@ -2031,26 +2091,29 @@ do_op_prefixCB: #endif + ; ----------------------- Opcode decoding ------------------------- ; Lookup table for Z80 opcodes. Translates the first byte of the instruction word into three ; operations: fetch, do something, store. -; The table is made of 256 words. +; The table is made of 256 words. + + opctable opcjmp, PC ;+3*256 - opctable opcjmp - instr fetch_nop, op_nop, store_nop ;00 ;NOP instr fetch_DIR16, op_nop, store_BC ;01 nn nn ;LD BC,nn instr fetch_nop, op_nop, store_MBC ;02 ;LD (BC),A -instr fetch_BC, op_INC16, store_BC ;03 ;INC BC +;instr fetch_BC, op_INC16, store_BC ;03 ;INC BC +instr fetch_nop, op_INCBC, store_nop ;03 ;INC BC instr fetch_B, op_INC, store_B ;04 ;INC B -instr fetch_B, op_DEC, store_B ;05 ;DEC B +instr fetch_B, op_DEC, store_B ;05 ;DEC B instr fetch_DIR8, op_nop, store_B ;06 ;LD B,n instr fetch_nop, op_RLCA, store_nop ;07 ;RLCA -instr fetch_nop, op_EXAF, store_nop ;08 ;EX AF,AF' +instr fetch_nop, op_EXAF, store_nop ;08 ;EX AF,AF' instr fetch_BC, op_ADDHL, store_nop ;09 ;ADD HL,BC instr fetch_MBC, op_nop, store_nop ;0A ;LD A,(BC) -instr fetch_BC, op_DEC16, store_BC ;0B ;DEC BC +;instr fetch_BC, op_DEC16, store_BC ;0B ;DEC BC +instr fetch_nop, op_DECBC, store_nop ;0B ;DEC BC instr fetch_C, op_INC, store_C ;0C ;INC C instr fetch_C, op_DEC, store_C ;0D ;DEC C instr fetch_DIR8, op_nop, store_C ;0E nn ;LD C,n @@ -2058,51 +2121,55 @@ instr fetch_nop, op_RRCA, store_nop ;0F ;RRCA instr fetch_DIR8, op_DJNZ, store_nop ;10 oo ;DJNZ o instr fetch_DIR16, op_nop, store_DE ;11 nn nn ;LD DE,nn instr fetch_nop, op_nop, store_MDE ;12 ;LD (DE),A -instr fetch_DE, op_INC16, store_DE ;13 ;INC DE +;instr fetch_DE, op_INC16, store_DE ;13 ;INC DE +instr fetch_nop, op_INCDE, store_nop ;13 ;INC DE instr fetch_D, op_INC, store_D ;14 ;INC D -instr fetch_D, op_DEC, store_D ;15 ;DEC D +instr fetch_D, op_DEC, store_D ;15 ;DEC D instr fetch_DIR8, op_nop, store_D ;16 nn ;LD D,n instr fetch_nop, op_RLA, store_nop ;17 ;RLA instr fetch_DIR8, op_nop, store_pcrel ;18 oo ;JR o instr fetch_DE, op_ADDHL, store_nop ;19 ;ADD HL,DE instr fetch_MDE, op_nop, store_nop ;1A ;LD A,(DE) -instr fetch_DE, op_DEC16, store_DE ;1B ;DEC DE +;instr fetch_DE, op_DEC16, store_DE ;1B ;DEC DE +instr fetch_nop, op_DECDE, store_nop ;1B ;DEC DE instr fetch_E, op_INC, store_E ;1C ;INC E -instr fetch_E, op_DEC, store_E ;1D ;DEC E +instr fetch_E, op_DEC, store_E ;1D ;DEC E instr fetch_DIR8, op_nop, store_E ;1E nn ;LD E,n instr fetch_nop, op_RRA, store_nop ;1F ;RRA instr fetch_DIR8, op_IFNZ, store_pcrel ;20 oo ;JR NZ,o instr fetch_DIR16, op_nop, store_HL ;21 nn nn ;LD HL,nn instr fetch_DIR16, op_STHL, store_nop ;22 nn nn ;LD (nn),HL -instr fetch_HL, op_INC16, store_HL ;23 ;INC HL -instr fetch_H, op_INC, store_H ;24 ;INC H -instr fetch_H, op_DEC, store_H ;25 ;DEC H -instr fetch_DIR8, op_nop, store_H ;26 nn ;LD H,n -instr fetch_A, op_DAA, store_A ;27 ;DAA +;instr fetch_HL, op_INC16, store_HL ;23 ;INC HL +instr fetch_nop, op_INCHL, store_nop ;23 ;INC HL +instr fetch_H, op_INC, store_H ;24 ;INC H +instr fetch_H, op_DEC, store_H ;25 ;DEC H +instr fetch_DIR8, op_nop, store_H ;26 nn ;LD H,n +instr fetch_A, op_DAA, store_A ;27 ;DAA instr fetch_DIR8, op_IFZ, store_pcrel ;28 oo ;JR Z,o instr fetch_HL, op_ADDHL, store_nop ;29 ;ADD HL,HL instr fetch_DIR16, op_RMEM16, store_HL ;2A nn nn ;LD HL,(nn) -instr fetch_HL, op_DEC16, store_HL ;2B ;DEC HL -instr fetch_L, op_INC, store_L ;2C ;INC L -instr fetch_L, op_DEC, store_L ;2D ;DEC L -instr fetch_DIR8, op_nop, store_L ;2E nn ;LD L,n -instr fetch_nop, op_CPL, store_nop ;2F ;CPL +;instr fetch_HL, op_DEC16, store_HL ;2B ;DEC HL +instr fetch_nop, op_DECHL, store_nop ;2B ;DEC HL +instr fetch_L, op_INC, store_L ;2C ;INC L +instr fetch_L, op_DEC, store_L ;2D ;DEC L +instr fetch_DIR8, op_nop, store_L ;2E nn ;LD L,n +instr fetch_nop, op_CPL, store_nop ;2F ;CPL instr fetch_DIR8, op_IFNC, store_pcrel ;30 oo ;JR NC,o instr fetch_DIR16, op_nop, store_SP ;31 nn nn ;LD SP,nn instr fetch_DIR16, op_nop, store_AM ;32 nn nn ;LD (nn),A instr fetch_SP, op_INC16, store_SP ;33 ;INC SP instr fetch_MHL, op_INC, store_MHL ;34 ;INC (HL) -instr fetch_MHL, op_DEC, store_MHL ;35 ;DEC (HL) +instr fetch_MHL, op_DEC, store_MHL ;35 ;DEC (HL) instr fetch_DIR8, op_nop, store_MHL ;36 nn ;LD (HL),n instr fetch_nop, op_SCF, store_nop ;37 ;SCF instr fetch_DIR8, op_IFC, store_pcrel ;38 oo ;JR C,o instr fetch_SP, op_ADDHL, store_nop ;39 ;ADD HL,SP -instr fetch_DIR16, op_RMEM8, store_A ;3A nn nn ;LD A,(nn) -instr fetch_SP, op_DEC16, store_SP ;3B ;DEC SP +instr fetch_DIR16, op_RMEM8, store_A ;3A nn nn ;LD A,(nn) +instr fetch_SP, op_DEC16, store_SP ;3B ;DEC SP instr fetch_nop, op_INCA, store_nop ;3C ;INC A -instr fetch_nop, op_DECA, store_nop ;3D ;DEC A -instr fetch_DIR8, op_nop, store_A ;3E nn ;LD A,n -instr fetch_nop, op_CCF, store_nop ;3F ;CCF (Complement Carry Flag, gvd) +instr fetch_nop, op_DECA, store_nop ;3D ;DEC A +instr fetch_DIR8, op_nop, store_A ;3E nn ;LD A,n +instr fetch_nop, op_CCF, store_nop ;3F ;CCF (Complement Carry Flag, gvd) instr fetch_nop, op_nop, store_nop ;40 ;LD B,B instr fetch_C, op_nop, store_B ;41 ;LD B,C instr fetch_D, op_nop, store_B ;42 ;LD B,D @@ -2223,14 +2290,14 @@ instr fetch_H, op_ORA, store_nop ;B4 ;OR A,H instr fetch_L, op_ORA, store_nop ;B5 ;OR A,L instr fetch_MHL, op_ORA, store_nop ;B6 ;OR A,(HL) instr fetch_A, op_ORA, store_nop ;B7 ;OR A,A -instr fetch_B, op_CPFA, store_nop ;B8 ;CP A,B -instr fetch_C, op_CPFA, store_nop ;B9 ;CP A,C -instr fetch_D, op_CPFA, store_nop ;BA ;CP A,D -instr fetch_E, op_CPFA, store_nop ;BB ;CP A,E -instr fetch_H, op_CPFA, store_nop ;BC ;CP A,H -instr fetch_L, op_CPFA, store_nop ;BD ;CP A,L -instr fetch_MHL, op_CPFA, store_nop ;BE ;CP A,(HL) -instr fetch_A, op_CPFA, store_nop ;BF ;CP A,A +instr fetch_B, op_CPFA, store_nop ;B8 ;CP A,B +instr fetch_C, op_CPFA, store_nop ;B9 ;CP A,C +instr fetch_D, op_CPFA, store_nop ;BA ;CP A,D +instr fetch_E, op_CPFA, store_nop ;BB ;CP A,E +instr fetch_H, op_CPFA, store_nop ;BC ;CP A,H +instr fetch_L, op_CPFA, store_nop ;BD ;CP A,L +instr fetch_MHL, op_CPFA, store_nop ;BE ;CP A,(HL) +instr fetch_A, op_CPFA, store_nop ;BF ;CP A,A instr fetch_nop, op_IFNZ, store_RET ;C0 ;RET NZ instr fetch_nop, op_POP16, store_BC ;C1 ;POP BC instr fetch_DIR16, op_IFNZ, store_PC ;C2 nn nn ;JP NZ,nn @@ -2256,7 +2323,7 @@ instr fetch_DE, op_PUSH16, store_nop ;D5 ;PUSH DE instr fetch_DIR8, op_SUBFA, store_nop ;D6 nn ;SUB n instr fetch_RST, op_nop, store_CALL ;D7 ;RST 10H instr fetch_nop, op_IFC, store_RET ;D8 ;RET C -instr fetch_nop, op_EXX, store_nop ;D9 ;EXX +instr fetch_nop, op_EXX, store_nop ;D9 ;EXX instr fetch_DIR16, op_IFC, store_PC ;DA nn nn ;JP C,nn instr fetch_DIR8, op_INA, store_nop ;DB nn ;IN A,(n) instr fetch_DIR16, op_IFC, store_CALL ;DC nn nn ;CALL C,nn @@ -2266,7 +2333,7 @@ instr fetch_RST, op_nop, store_CALL ;DF ;RST 18H instr fetch_nop, op_IFPO, store_RET ;E0 ;RET PO instr fetch_nop, op_POP16, store_HL ;E1 ;POP HL instr fetch_DIR16, op_IFPO, store_PC ;E2 nn nn ;JP PO,nn -instr fetch_MSP, op_EXHL, store_MSP ;E3 ;EX (SP),HL +instr fetch_MSP, op_EXHL, store_MSP ;E3 ;EX (SP),HL instr fetch_DIR16, op_IFPO, store_CALL ;E4 nn nn ;CALL PO,nn instr fetch_HL, op_PUSH16, store_nop ;E5 ;PUSH HL instr fetch_DIR8, op_ANDA, store_nop ;E6 nn ;AND n @@ -2274,7 +2341,7 @@ instr fetch_RST, op_nop, store_CALL ;E7 ;RST 20H instr fetch_nop, op_IFPE, store_RET ;E8 ;RET PE instr fetch_HL, op_nop, store_PC ;E9 ;JP HL instr fetch_DIR16, op_IFPE, store_PC ;EA nn nn ;JP PE,nn -instr fetch_DE, op_EXHL, store_DE ;EB ;EX DE,HL +instr fetch_DE, op_EXHL, store_DE ;EB ;EX DE,HL instr fetch_DIR16, op_IFPE, store_CALL ;EC nn nn ;CALL PE,nn instr fetch_nop, op_prefixED, store_nop ;ED ;(ED opcode prefix) instr fetch_DIR8, op_XORA, store_nop ;EE nn ;XOR n @@ -2282,7 +2349,7 @@ instr fetch_RST, op_nop, store_CALL ;EF ;RST 28H instr fetch_nop, op_IFP, store_RET ;F0 ;RET P instr fetch_nop, op_POP16, store_AF ;F1 ;POP AF instr fetch_DIR16, op_IFP, store_PC ;F2 nn nn ;JP P,nn -instr fetch_nop, op_DI, store_nop ;F3 ;DI +instr fetch_nop, op_DI, store_nop ;F3 ;DI instr fetch_DIR16, op_IFP, store_CALL ;F4 nn nn ;CALL P,nn instr fetch_AF, op_PUSH16, store_nop ;F5 ;PUSH AF instr fetch_DIR8, op_ORA, store_nop ;F6 nn ;OR n @@ -2290,10 +2357,10 @@ instr fetch_RST, op_nop, store_CALL ;F7 ;RST 30H instr fetch_nop, op_IFM, store_RET ;F8 ;RET M instr fetch_HL, op_nop, store_SP ;F9 ;LD SP,HL instr fetch_DIR16, op_IFM, store_PC ;FA nn nn ;JP M,nn -instr fetch_nop, op_EI, store_nop ;FB ;EI +instr fetch_nop, op_EI, store_nop ;FB ;EI instr fetch_DIR16, op_IFM, store_CALL ;FC nn nn ;CALL M,nn instr fetch_nop, op_prefixFD, store_nop ;FD ;(FD opcode prefix) -instr fetch_DIR8, op_CPFA, store_nop ;FE nn ;CP n +instr fetch_DIR8, op_CPFA, store_nop ;FE nn ;CP n instr fetch_RST, op_nop, store_CALL ;FF ;RST 38H @@ -2301,311 +2368,40 @@ instr fetch_RST, op_nop, store_CALL ;FF ;RST 38H -do_fetch_0: - ldi opl,0 + checkspace PC, 2 + +do_op_noni: + sbiw z_pcl,1 ;--z_pc ret + checkspace PC, 16 + do_fetch_dir8_2: movw xl,z_pcl adiw xl,1 mem_read_d opl ret -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|IN r,[C] |***P0-|Input |r=[C] | -; - -do_op_in: ; in opl,(opl) -.if PORT_DEBUG - push opl - cp opl,_0 ; don't debug port 0 (con stat) - breq dbg_op_in_1 - printnewline - printstring "Port read: (" - mov temp,opl - lcall printhex - printstring ") -> " -dbg_op_in_1: -.endif - - mov temp2,opl - lcall portRead - mov opl,temp - bst z_flags,ZFL_C ;save Carry - ldpmx z_flags,sz53p_tab,temp ;S,Z,P - bld z_flags,ZFL_C + checkspace PC, 5 -.if PORT_DEBUG - pop temp - cp temp,_0 - breq dbg_op_in_2 - lcall printhex - printstring " " -dbg_op_in_2: -.endif +do_fetch_xh: + sbis flags,prefixfd + ldd opl,y+oz_xh + sbic flags,prefixfd + ldd opl,y+oz_yh ret -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|OUT [C],r |------|Output |[C]=r | -; + checkspace PC, 5 -do_op_out: ; out (c),opl -.if PORT_DEBUG - printnewline - printstring "Port write: " - mov temp,opl - lcall printhex - printstring " -> (" - ldd temp,y+oz_c - lcall printhex - printstring ") " -.endif - mov temp,opl - ldd temp2,y+oz_c - lcall portWrite +do_fetch_xl: + sbis flags,prefixfd + ldd opl,y+oz_xl + sbic flags,prefixfd + ldd opl,y+oz_yl ret -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|LD dst,src|------|Load |dst=src | -; - -do_op_stbc: ;store bc to mem loc in opl:h - movw xl,opl - ldd temp,y+oz_c - mem_write - adiw xl,1 - ldd temp,y+oz_b - mem_write - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|LD dst,src|------|Load |dst=src | -; -; -do_op_stde: ;store de to mem loc in opl:h - movw xl,opl - ldd temp,y+oz_e - mem_write - adiw xl,1 - ldd temp,y+oz_d - mem_write - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|LD dst,src|------|Load |dst=src | -; -; -do_op_stsp: ;store sp to mem loc in opl:h - movw xl,opl - mem_write_s z_spl - adiw xl,1 - mem_write_s z_sph - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|ADC HL,ss |***V0*|Add with Carry |HL=HL+ss+CY | -; - -do_op_ADCHL: - ldd temp,y+oz_l - ldd temp2,y+oz_h - clc - sbrc z_flags,ZFL_C - sec - adc opl,temp - in temp,sreg ; save lower Z - adc oph,temp2 - in temp2,sreg - std y+oz_l,opl - std y+oz_h,oph - and temp,temp2 ; 16bit Z - ldi z_flags,0 ; clear N - bmov z_flags,ZFL_C, temp2,AVR_C - bmov z_flags,ZFL_P, temp2,AVR_V - bmov z_flags,ZFL_H, temp2,AVR_H - bmov z_flags,ZFL_Z, temp,AVR_Z - bmov z_flags,ZFL_S, temp2,AVR_N - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|SBC HL,ss |***V1*|Subtract with carry |HL=HL-ss-CY | -; -; -do_op_sbchl: - ldd temp,y+oz_l - ldd temp2,y+oz_h - cp temp,opl ; set z - clc - sbrc z_flags,ZFL_C - sec - sbc temp,opl - sbc temp2,oph - std y+oz_l,temp - std y+oz_h,temp2 - in temp,sreg - ldi z_flags,(1< P | -;|LD i,A |------|Load |(i=I,R) | - -do_op_ldai: - ldd z_a,y+oz_i - rjmp op_ldar1 - -do_op_ldar: - ldd z_a,y+oz_r -op_ldar1: - bst z_flags,ZFL_C ;save C - ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N - bld z_flags,ZFL_C ; - ldd temp,y+oz_istat - bmov z_flags,ZFL_P, temp,IFF2 - ret - -do_op_ldia: - std y+oz_i,z_a - ret - -do_op_ldra: - std y+oz_r,z_a - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##| -;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##| - -do_op_rld: - swap opl - mov oph,opl - andi opl,0xf0 - andi oph,0x0f - mov temp,z_a - andi temp,0x0f - or opl,temp - mov temp,z_a - andi temp,0xf0 - or temp,oph - mov z_a,temp - bst z_flags,ZFL_C ;save C - ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N - bld z_flags,ZFL_C ; - ret - -do_op_rrd: - mov oph,opl - andi opl,0xf0 - andi oph,0x0f - mov temp,z_a - andi temp,0x0f - or opl,temp - swap opl - mov temp,z_a - andi temp,0xf0 - or temp,oph - mov z_a,temp - bst z_flags,ZFL_C ;save C - ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N - bld z_flags,ZFL_C ; - ret - - -do_fetch_xh: - sbis flags,prefixfd - ldd opl,y+oz_xh - sbic flags,prefixfd - ldd opl,y+oz_yh - ret - -do_fetch_xl: - sbis flags,prefixfd - ldd opl,y+oz_xl - sbic flags,prefixfd - ldd opl,y+oz_yl - ret + checkspace PC, 41 do_fetch_mxx: sbic flags,prefixfd @@ -2619,17 +2415,17 @@ fetchmxx_fd: fetchmxx1: mem_read_ds opl, z_pc ;get displacement adiw z_pcl,1 - clr oph ;sign extend - tst opl - brpl fetchmxx2 - com oph -fetchmxx2: + mov oph,opl ;sign extend + lsl oph + sbc oph,oph add xl,opl ;add displacement adc xh,oph mem_read_d opl ;get operand ret ;(Ix+d) still in xl,xh + checkspace PC, 8 + do_fetch_xx: sbic flags,prefixfd rjmp fetchxx_fd @@ -2641,6 +2437,8 @@ fetchxx_fd: ldd oph,y+oz_yh ret + checkspace PC, 5 + do_store_xh: sbis flags,prefixfd std y+oz_xh,opl @@ -2648,6 +2446,8 @@ do_store_xh: std y+oz_yh,opl ret + checkspace PC, 5 + do_store_xl: sbis flags,prefixfd std y+oz_xl,opl @@ -2655,6 +2455,8 @@ do_store_xl: std y+oz_yl,opl ret + checkspace PC, 37 + do_store_mxx: sbic flags,prefixfd rjmp storemxx_fd @@ -2667,20 +2469,22 @@ storemxx_fd: storemxx1: mem_read_s z_pc ;get displacement adiw z_pcl,1 - clr temp2 ;sign extend - tst temp - brpl storemxx2 - com temp2 -storemxx2: + mov temp2,temp ;sign extend + lsl temp2 + sbc temp2,temp2 add xl,temp ;add displacement adc xh,temp2 mem_write_s opl ;store operand ret + checkspace PC, 10 + do_store_mxx_0: mem_write_s opl ;store operand ret + checkspace PC, 38 + do_store_mxx_2: sbic flags,prefixfd rjmp storemxx2_fd @@ -2694,16 +2498,16 @@ storemxx21: mem_read_s z_pc ;get displacement adiw z_pcl,1 adiw z_pcl,1 - clr temp2 ;sign extend - tst temp - brpl storemxx22 - com temp2 -storemxx22: + mov temp2,temp ;sign extend + lsl temp2 + sbc temp2,temp2 add xl,temp ;add displacement adc xh,temp2 mem_write_s opl ;store operand ret + checkspace PC, 8 + do_store_xx: sbic flags,prefixfd rjmp storexx_fd @@ -2720,10 +2524,12 @@ storexx_fd: ;---------------------------------------------------------------- ;|LD dst,src|------|Load |dst=src | ; -; + + checkspace PC, 30 + do_op_stxx: ;store xx to mem loc in opl:h - movw xl,opl + movw xl,opl sbis flags,prefixfd ldd temp,y+oz_xl sbic flags,prefixfd @@ -2743,7 +2549,9 @@ do_op_stxx: ;store xx to mem loc in opl:h ;---------------------------------------------------------------- ;|EX [SP],IX|------|Exchange |[SP]<->IX | ;|EX [SP],IY|------|Exchange |[SP]<->IY | -; +; + checkspace PC, 13 + do_op_EXxx: sbic flags,prefixfd rjmp opexxx_fd @@ -2767,7 +2575,9 @@ opexxxe: ;|ADD IX,pp |--*-0*|Add |IX=IX+pp | ;|ADD IY,rr |--*-0*|Add |IY=IY+rr | ; -; + + checkspace PC, 25 + do_op_addxx: sbic flags,prefixfd rjmp opadx_fd @@ -2792,1561 +2602,1899 @@ opadx_e: do_z80_flags_clear_N ret -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# | -;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 | -;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# | -;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 | -; - -op_LDxx_common: - ldd zh,y+oz_h ;H - ldd zl,y+oz_l ;L - ldd xh,y+oz_d ;D - ldd xl,y+oz_e ;E - ldd oph,y+oz_b ;B - ldd opl,y+oz_c ;C - mem_read_ds temp, z - mem_write_ds x, temp - cbr z_flags,(1<m | +;|RL m |**0P0*|Rotate Left |m={CY,m}<- | +;|RR m |**0P0*|Rotate Right |m=->{CY,m} | +;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 | +;|SRA m |**0P0*|Shift Right Arith. |m=m/2 | +;|SLL m |**0P0*|Shift Right Logical | +;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} | - sbiw z,1 ; BC-- - breq PC+2 - sbr z_flags,(1< Bit 7 + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; ret -do_op_INI: - rcall op_INxx_common - adiw x,1 - std y+oz_l,xl ;L - std y+oz_h,xh ;H + checkspace PC, 9 + +do_op_sla: + lsl opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; ret -do_op_IND: - rcall op_INxx_common - sbiw x,1 - std y+oz_l,xl ;L - std y+oz_h,xh ;H + checkspace PC, 11 + +do_op_sra: + lsr opl + in temp,sreg + bmov opl,7, opl,6 ;old CY --> Bit 7 + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; ret -do_op_INIR: - rcall do_op_INI - sbrc z_flags,ZFL_Z - ret - sbiw z_pcl,2 + checkspace PC, 9 + +do_op_sll: + sec + rol opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; ret -do_op_INDR: - rcall do_op_IND - sbrc z_flags,ZFL_Z - ret - sbiw z_pcl,2 + checkspace PC, 8 + +do_op_srl: + lsr opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; ret ;---------------------------------------------------------------- ;|Mnemonic |SZHPNC|Description |Notes | ;---------------------------------------------------------------- -;|OUTI |?*??1-|Output and Increment |[C]=[HL],HL=HL+1,B=B-1| -;|OUTD |?*??1-|Output and Decrement |[C]=[HL],HL=HL-1,B=B-1| -;|OTIR |?1??1-|Output, Inc., Repeat |OUTI till B=0 | -;|OTDR |?1??1-|Output, Dec., Repeat |OUTD till B=0 | +;|BIT b,m |?*1?0-|Test Bit |m&{2^b} | +;|RES b,m |------|Reset bit |m=m&{~2^b} | +;|SET b,m |------|Set bit |m=mv{2^b} | -op_OUTxx_common: - cbr z_flags,(1< " +dbg_op_in_1: +.endif + + mov temp2,opl + lcall portRead + mov opl,temp + bst z_flags,ZFL_C ;save Carry + ldpmx z_flags,sz53p_tab,temp ;S,Z,P + bld z_flags,ZFL_C + +.if PORT_DEBUG + pop temp + cp temp,_0 + breq dbg_op_in_2 + lcall printhex + printstring " " +dbg_op_in_2: +.endif + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|OUT [C],r |------|Output |[C]=r | +; + +do_op_out: ; out (c),opl +.if PORT_DEBUG + printnewline + printstring "Port write: " + mov temp,opl + lcall printhex + printstring " -> (" + mov temp,z_c + lcall printhex + printstring ") " +.endif + mov temp,opl + mov temp2,z_c + lcall portWrite + ret +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|LD dst,src|------|Load |dst=src | +; +do_op_stbc: ;store bc to mem loc in opl:h + movw xl,opl + mem_write_s z_c + adiw xl,1 + mem_write_s z_b + ret ;---------------------------------------------------------------- ;|Mnemonic |SZHPNC|Description |Notes | ;---------------------------------------------------------------- -;|RLC m |**0P0*|Rotate Left Circular |m=m<- | -;|RRC m |**0P0*|Rotate Right Circular|m=->m | -;|RL m |**0P0*|Rotate Left |m={CY,m}<- | -;|RR m |**0P0*|Rotate Right |m=->{CY,m} | -;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 | -;|SRA m |**0P0*|Shift Right Arith. |m=m/2 | -;|SLL m |**0P0*|Shift Right Logical | -;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} | +;|LD dst,src|------|Load |dst=src | +; +; +do_op_stde: ;store de to mem loc in opl:h + movw xl,opl + mem_write_s z_e + adiw xl,1 + mem_write_s z_d + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|LD dst,src|------|Load |dst=src | +; +; +do_op_stsp: ;store sp to mem loc in opl:h + movw xl,opl + mem_write_s z_spl + adiw xl,1 + mem_write_s z_sph + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|ADC HL,ss |***V0*|Add with Carry |HL=HL+ss+CY | +; +do_op_ADCHL: + lsr z_flags ; ZFL_C --> Carry + ldi z_flags,0 ; clear N + adc z_l,opl + in temp,sreg ; save lower Z + adc z_h,oph + in temp2,sreg -do_op_rlc: - ;Rotate Left Cyclical. All bits move 1 to the - ;left, the msb becomes c and lsb. - clr temp - lsl opl - adc temp,_0 - or opl,temp - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - or z_flags,temp + and temp,temp2 ; 16bit Z + bmov z_flags,ZFL_C, temp2,AVR_C + bmov z_flags,ZFL_P, temp2,AVR_V + bmov z_flags,ZFL_H, temp2,AVR_H + bmov z_flags,ZFL_Z, temp,AVR_Z + bmov z_flags,ZFL_S, temp2,AVR_N ret -do_op_rrc: - ;Rotate Right Cyclical. All bits move 1 to the - ;right, the lsb becomes c and msb. - lsr opl - brcc PC+2 - ori opl,0x80 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, opl,7 +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|SBC HL,ss |***V1*|Subtract with carry |HL=HL-ss-CY | +; + + checkspace PC, 24 + +do_op_sbchl: + lsr z_flags ; get Z80 carry + sez ; set z + sbc z_l,opl + sbc z_h,oph + in temp,sreg + ldi z_flags,(1< Bit 7 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; +do_op_RETI: +do_op_RETN: + ldd temp,y+oz_istat + bmov temp,IFF1, temp,IFF2 + std y+oz_istat,temp + ljmp do_store_ret + + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|IM n |------|Interrupt Mode | (n=0,1,2)| + +do_op_IM0: + ldd temp,y+oz_istat + andi temp, ~IM_MASK + std y+oz_istat,temp ret -do_op_sla: - lsl opl - in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; +do_op_IM1: + ldd temp,y+oz_istat + andi temp,~IM_MASK + ori temp,IM1 + std y+oz_istat,temp ret -do_op_sra: - lsr opl - in temp,sreg - bmov opl,7, opl,6 ;old CY --> Bit 7 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; +do_op_IM2: + ldd temp,y+oz_istat + andi temp, ~IM_MASK + ori temp,IM2 + std y+oz_istat,temp + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|LD A,i |**0*0-|Load |(i=I,R) IFF2 --> P | +;|LD i,A |------|Load |(i=I,R) | + +do_op_ldai: + ldd z_a,y+oz_i + rjmp op_ldar1 + +do_op_ldar: + ldd z_a,y+oz_r +op_ldar1: + bst z_flags,ZFL_C ;save C + ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N + bld z_flags,ZFL_C ; + ldd temp,y+oz_istat + bmov z_flags,ZFL_P, temp,IFF2 + ret + +do_op_ldia: + std y+oz_i,z_a + ret + +do_op_ldra: + std y+oz_r,z_a + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|RLD |**0P0-|Rotate Left 4 bits |{A,[HL]}={A,[HL]}<- ##| +;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##| + +do_op_rld: + swap opl + mov oph,opl + andi opl,0xf0 + andi oph,0x0f + mov temp,z_a + andi temp,0x0f + or opl,temp + mov temp,z_a + andi temp,0xf0 + or temp,oph + mov z_a,temp + bst z_flags,ZFL_C ;save C + ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N + bld z_flags,ZFL_C ; + ret + +do_op_rrd: + mov oph,opl + andi opl,0xf0 + andi oph,0x0f + mov temp,z_a + andi temp,0x0f + or opl,temp + swap opl + mov temp,z_a + andi temp,0xf0 + or temp,oph + mov z_a,temp + bst z_flags,ZFL_C ;save C + ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N + bld z_flags,ZFL_C ; + ret + + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|LDD |--0*0-|Load and Decrement |[DE]=[HL],HL=HL-1,# | +;|LDDR |--000-|Load, Dec., Repeat |LDD till BC=0 | +;|LDI |--0*0-|Load and Increment |[DE]=[HL],HL=HL+1,# | +;|LDIR |--000-|Load, Inc., Repeat |LDI till BC=0 | +; + + checkspace PC, 13 + +op_LDxx_common: +; movw x,z_l ; +; lcall dram_read ; temp = (HL) + mem_read_ds temp, z_hl +; movw x,z_e ; +; lcall dram_write ; (DE) = temp + mem_write_ds z_de, temp + + cbr z_flags,(1<