X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/1a1d6a788b206d43294878565fbca791d29ead6c..18be946b6d6633ccda8b9ab2d5894b23e815a63d:/avrcpm/avr/z80.asm
diff --git a/avrcpm/avr/z80.asm b/avrcpm/avr/z80.asm
index 3d5f0b8..64f0786 100644
--- a/avrcpm/avr/z80.asm
+++ b/avrcpm/avr/z80.asm
@@ -15,6 +15,9 @@
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see .
+;
+; $Id$
+;
;.nolist
#if defined atmega8
@@ -40,12 +43,15 @@
#define BAUD 38400 /* console baud rate */
#endif
+#define PARTID 0x52 /* Partition table id */
+ /* http://www.win.tue.nl/~aeb/partitions/partition_types-1.html */
#define UBRR_VAL ((F_CPU+BAUD*8)/(BAUD*16)-1) /* clever rounding */
#define RXBUFSIZE 64 /* USART recieve buffer size. Must be power of 2 */
#define TXBUFSIZE 64 /* USART transmit buffer size. Must be power of 2 */
+#define DRAM_WAITSTATES 1 /* Number of additional clock cycles for dram read access */
#define REFR_RATE 64000 /* dram refresh rate in cycles/s. */
/* Most drams need 1/15.6µs. */
#define REFR_PRE 8 /* timer prescale factor */
@@ -53,11 +59,6 @@
#define REFR_CNT F_CPU / REFR_RATE / REFR_PRE
-#if defined __ATmega8__
- .equ refr_vect = OC2addr
-#else
- .equ refr_vect = OC2Aaddr
-#endif
#define DRAM_WORD_ACCESS 0 /* experimental */
@@ -136,8 +137,6 @@
.equ ZFL_C = 0
;Register definitions
-.undef xl ;r26
-.undef xh ;r27
.def _tmp = r0 ; 0
.def _0 = r1
@@ -164,8 +163,8 @@
.def oph = r23 ;
.def z_pcl = r24 ;
.def z_pch = r25 ;
-.def adrl = r26 ;
-.def adrh = r27 ;
+; xl ;r26
+; xh ;r27
; yl ;r28
; yh ;r29
; zl ;r30 ;
@@ -214,6 +213,7 @@
.equ UBRR0H = UBRRH
.equ UBRR0L = UBRRL
.equ OCR2A = OCR2
+.equ OC2Aaddr= OC2addr
.equ TCCR2A = TCCR2
.equ TCCR2B = TCCR2
.equ TIMSK1 = TIMSK
@@ -248,10 +248,25 @@
+;----------------------------------------
+; add wait states
+; dram_wait number_of_cycles
+
+.macro dram_wait
+.if @0 > 1
+ rjmp PC+1
+ dram_wait @0 - 2
+.elif @0 > 0
+ nop
+ dram_wait @0 - 1
+.endif
+.endm
+
+
.cseg
.org 0
rjmp start ; reset vector
-.org refr_vect
+.org OC2Aaddr
rjmp refrint ; tim2cmpa
.org OC1Aaddr ; Timer/Counter1 Compare Match A
rjmp sysclockint ; 1ms system timer
@@ -279,6 +294,17 @@ start:
ldi temp,(1<",0
rcall printhex
rcall printstr
.db ".",13,0
- pop temp
- pop zh
- pop zl
.endif
ret
@@ -1310,8 +1478,8 @@ mmcInitOcrLoopDone:
ret
-;Call this with adrh:adrl = sector number
-;16bit lba address means a max reach of 32M.
+;Call this with yh:yl:xh:xl = sector number
+;
mmcReadSect:
ldi temp,0x50
out SPCR,temp
@@ -1320,14 +1488,14 @@ mmcReadSect:
rcall mmcByteNoSend
ldi temp,0x51 ;cmd (read sector)
rcall mmcByte
- ldi temp,0
- lsl adrl
- rol adrh
- rol temp
+ lsl xl ;convert to byte address (*512)
+ rol xh
+ rol yl
+ mov temp,yl
rcall mmcByte
- mov temp,adrh ;pxl
+ mov temp,xh ;pxl
rcall mmcByte
- mov temp,adrl ;pyh
+ mov temp,xl ;pyh
rcall mmcByte
ldi temp,0 ;pyl
rcall mmcByte
@@ -1366,8 +1534,8 @@ mmcreadloop:
ret
-;Call this with adrh:adrl = sector number
-;16bit lba address means a max reach of 32M.
+;Call this with yh:yl:xh:xl = sector number
+;
mmcWriteSect:
ldi temp,0x50
out SPCR,temp
@@ -1377,14 +1545,14 @@ mmcWriteSect:
ldi temp,0x58 ;cmd (write sector)
rcall mmcByte
- ldi temp,0
- lsl adrl
- rol adrh
- rol temp
+ lsl xl ;convert to byte address (*512)
+ rol xh
+ rol yl
+ mov temp,yl
rcall mmcByte
- mov temp,adrh ;pxl
+ mov temp,xh ;pxl
rcall mmcByte
- mov temp,adrl ;pyh
+ mov temp,xl ;pyh
rcall mmcByte
ldi temp,0 ;pyl
rcall mmcByte
@@ -1463,24 +1631,24 @@ resetwait:
out P_AH,temp
.endm
-;Loads the byte on address adrh:adrl into temp.
-;must not alter adrh:adrl
+;Loads the byte on address xh:xl into temp.
+;must not alter xh:xl
dram_read:
cli
- DRAM_SETADDR adrh, ~0,(1< 21 cycles
-; ****************************************************************************
; ------------- system timer 1ms ---------------
.dseg
@@ -2107,6 +2275,7 @@ rxfifo:
txfifo:
.byte TXBUFSIZE
+ramtop:
.cseg
; Save received character in a circular buffer. Do nothing if buffer overflows.
@@ -2341,53 +2510,53 @@ do_fetch_sp:
ret
do_fetch_mbc:
- movw adrl,z_c
+ movw xl,z_c
rcall memReadByte
mov opl,temp
ret
do_fetch_mde:
- movw adrl,z_e
+ movw xl,z_e
rcall memReadByte
mov opl,temp
ret
do_fetch_mhl:
- movw adrl,z_l
+ movw xl,z_l
rcall memReadByte
mov opl,temp
ret
do_fetch_msp:
- movw adrl,z_spl
+ movw xl,z_spl
#if DRAM_WORD_ACCESS
rcall memReadWord
movw opl,temp
#else
rcall memReadByte
mov opl,temp
- adiw adrl,1
+ adiw xl,1
rcall memReadByte
mov oph,temp
#endif
ret
do_fetch_dir8:
- movw adrl,z_pcl
+ movw xl,z_pcl
rcall memReadByte
adiw z_pcl,1
mov opl,temp
ret
do_fetch_dir16:
- movw adrl,z_pcl
+ movw xl,z_pcl
#if DRAM_WORD_ACCESS
rcall memReadWord
movw opl,temp
#else
rcall memReadByte
mov opl,temp
- adiw adrl,1
+ adiw xl,1
rcall memReadByte
mov oph,temp
#endif
@@ -2395,9 +2564,9 @@ do_fetch_dir16:
ret
do_fetch_rst:
- movw adrl,z_pcl
- subi adrl,1
- sbci adrh,0
+ movw xl,z_pcl
+ subi xl,1
+ sbci xh,0
rcall memReadByte
andi temp,0x38
ldi oph,0
@@ -2507,32 +2676,32 @@ do_store_hl:
ret
do_store_mbc:
- movw adrl,z_c
+ movw xl,z_c
mov temp,opl
rcall memWriteByte
ret
do_store_mde:
- movw adrl,z_e
+ movw xl,z_e
mov temp,opl
rcall memWriteByte
ret
do_store_mhl:
- movw adrl,z_l
+ movw xl,z_l
mov temp,opl
rcall memWriteByte
ret
do_store_msp:
- movw adrl,z_spl
+ movw xl,z_spl
#if DRAM_WORD_ACCESS
movw temp,opl
rcall memWriteWord
#else
mov temp,opl
rcall memWriteByte
- adiw adrl,1
+ adiw xl,1
mov temp,oph
rcall memWriteByte
#endif
@@ -2561,7 +2730,7 @@ do_store_call:
ret
do_store_am:
- movw adrl,opl
+ movw xl,opl
mov temp,z_a
rcall memWriteByte
ret
@@ -2611,6 +2780,8 @@ do_store_am:
.equ OP_EI = (38<<10)
.equ OP_INV = (39<<10)
.equ OP_CPFA = (40<<10)
+.equ OP_INCA = (41<<10)
+.equ OP_DECA = (42<<10)
opjumps:
rjmp do_op_nop
@@ -2654,6 +2825,8 @@ opjumps:
rjmp do_op_ei
rjmp do_op_inv
rjmp do_op_cpfa
+ rjmp do_op_inca
+ rjmp do_op_deca
;How the flags are supposed to work:
@@ -2839,13 +3012,13 @@ opjumps:
;----------------------------------------------------------------
-.equ AVR_T = 6
-.equ AVR_H = 5
-.equ AVR_S = 4
-.equ AVR_V = 3
-.equ AVR_N = 2
-.equ AVR_Z = 1
-.equ AVR_C = 0
+.equ AVR_T = SREG_T
+.equ AVR_H = SREG_H
+.equ AVR_S = SREG_S
+.equ AVR_V = SREG_V
+.equ AVR_N = SREG_N
+.equ AVR_Z = SREG_Z
+.equ AVR_C = SREG_C
;------------------------------------------------;
; Move single bit between two registers
@@ -2933,15 +3106,27 @@ do_op_nop:
;
;
do_op_inc:
- ldi temp,1
- add opl,temp
+ inc opl
+#if EM_Z80
in temp, sreg
+#endif
andi z_flags,(1<