X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/4bd49b803d4fb81873a8fadb2ca7b9df461ab72b..12a27f27734b18ba4dea8d411095cf53c3870ef2:/avr/virt_ports.asm

diff --git a/avr/virt_ports.asm b/avr/virt_ports.asm
index e9e7ddc..ca35d01 100644
--- a/avr/virt_ports.asm
+++ b/avr/virt_ports.asm
@@ -17,7 +17,7 @@
 ;    You should have received a copy of the GNU General Public License
 ;    along with avrcpm.  If not, see <http://www.gnu.org/licenses/>.
 ;
-;    $Id$
+;    $Id: virt_ports.asm 242 2015-12-11 16:05:52Z rapid $
 ;
 
 
@@ -37,10 +37,20 @@
 ;------------------------ Virtual I2C interface --------------------------
 ;05	5	out	- Control Port: 1 = Start read operation
 ;					2 = Start write operation
-;05	5	in	- Status of last Transfer: 0 = ok, else fail
+;					3 = Write 1 byte subaddress, then read
+;05	5	in	- Status of last Transfer
 ;06	6	in/out	- Number of bytes to transfer, including Slave address
 ;07,08	7,8	in/out	- Read/Write address low/high
 ;
+;------------------------ Debugging --------------------------------------
+;09		out	- MEM dump: Number of bytes to print
+;0A,0B		in/out	- MEM dump: Start address
+;
+;------------------------ Version Information ----------------------------
+;0C		out	- 1 = Read VMAJOR
+;			  2 = Read VMINOR
+;			  4 = Read Version String
+;
 ;------------------------ Disk I/O ---------------------------------------
 ;0D,0E	13,14	in/out	- Set address of Bios Controll Block
 ;0F  	15	in/out	- Disk select
@@ -76,9 +86,34 @@
 ;40  	64-71	in/out	- Timer/Clock control.
 ;41-46
 ;
-;47-4D		clock	- BCD format: ss, mm, hh,  DD, MM, YYl, YYh
+;47-4D		in/out	- clock in BCD format: ss, mm, hh,  DD, MM, YYl, YYh
+;
+;------------------------ Debugging --------------------------------------
+;4F		out	- Debug: start/stop trace, print stack, ...
 ;
-;4F		debug	- start/stop trace, print stack, ...
+;------------------------ ISC16IS740 UART --------------------------------
+;50	RHR	in	  Receive Holding
+;50	THR 	out	  Transmit Holding
+;51	IER 	in/out	  Interrupt Enable
+;52	IIR	in	  Interrupt Identification
+;52	FCR	out	  FIFO Control
+;53	LCR 	in/out	  Line Control
+;54	MCR 	in/out	  Modem Control
+;55	LSR 	in	  Line Status
+;56	MSR 	in	  Modem Status
+;57	SPR 	in/out	  Scratchpad
+;56	TCR 	in/out	  Transmission Control
+;57	TLR	in/out	  Trigger Level
+;58	TXLVL	in	  Transmit FIFO Level
+;59	RXLVL	in	  Receive FIFO Level
+;5F	EFCR	in/out	  Extra Features
+;50 	DLL	in/out	  divisor latch LSB
+;51 	DLH	in/out	  divisor latch MSB
+;52 	EFR	in/out	  Enhanced Feature
+;54 	XON1 	in/out	  Xon1 word
+;55 	XON2  	in/out	  Xon2 word
+;56 	XOFF1 	in/out	  Xoff1 word
+;57 	XOFF2 	in/out	  Xoff2 word
 ;
 ;------------------------ Ports ------------------------------------------
 ;80-87		in/out	- Port-Expander PCF8574 (max. 8 Chips)
@@ -124,10 +159,6 @@ vport_tbl:
 	.dw	clockget
 	.dw	clockput
 
-	.db	DEBUGPORT,1
-	.dw	dbg_stat
-	.dw	dbg_ctrl
-
 #if I2C_SUPPORT
 	.db	I2CCTRL,1
 	.dw	vi2c_stat_get
@@ -137,6 +168,12 @@ vport_tbl:
 	.dw	vi2c_param_get
 	.dw	vi2c_param_set
 
+#if I2C_UART_SUPPORT
+	.db	I2C_UART,16
+	.dw	SC16IS740_in
+	.dw	SC16IS740_out
+#endif
+
 	.db	PORT,8
 	.dw	pcf8574_in
 	.dw	pcf8574_out
@@ -150,6 +187,19 @@ vport_tbl:
 	.dw	adc_readvcc
 	.dw	vport_out_dummy
 #endif
+	.db	DEBUGPORT,1
+	.dw	dbg_stat
+	.dw	dbg_ctrl
+
+.if MEMDUMP_DEBUG
+	.db	MEMDUMPPORT,3
+	.dw	dbg_dump_rd
+	.dw	dbg_dump
+.endif
+	.db	0x0C,1
+	.dw	version_get
+	.dw	version_ctrl
+
 	.db	0,0		; Stop mark
 
 ;---------------------------------------------------------------------
@@ -291,6 +341,8 @@ conStatus:
 	ret
 
 
+;---------------------------------------------------------------------
+
 dbgOut:
 	printnewline
 	printstring "Debug: "
@@ -309,6 +361,113 @@ dbg_ctrl:
 .endif
 	ret
 
+;---------------------------------------------------------------------
+
+.if MEMDUMP_DEBUG
+
+	.dseg
+
+dbg_dump_addr:
+	.byte	2
+
+
+	.cseg
+
+dbg_dump_rd:
+	cpse	temp3,_0
+	rjmp	dbg_dump_rdad
+	ldi	temp,0
+	ret
+
+dbg_dump_rdad:
+	dec	temp3
+	brne	dbg_dump_rdad1
+	lds	temp,dbg_dump_addr+0
+	ret
+dbg_dump_rdad1:
+	lds	temp,dbg_dump_addr+1
+	ret
+
+
+dbg_dump:
+	cpse	temp3,_0
+	rjmp	dbg_dump_store
+
+	mov	temp3,temp
+	ldsw	z,dbg_dump_addr
+
+	tst	temp3
+	breq	dbg_dumpl_1
+dbg_dumpl:
+	cpi	temp3,16
+	brlo	dbg_dump_u16
+dbg_dumpl_1:
+	lcall	dbg_hexdump_line
+	subi	temp3,16
+	adiw	z,16
+	rjmp	dbg_dumpl
+
+dbg_dump_u16:
+	tst	temp3
+	breq	dbg_dump_e
+	mov	temp2,temp3
+	lcall	dbg_hexdump
+dbg_dump_e:
+	ret
+
+dbg_dump_store:
+	dec	temp3
+	brne	dbg_dump_st1
+	sts	dbg_dump_addr+0,temp
+	ret
+dbg_dump_st1:
+	sts	dbg_dump_addr+1,temp
+	ret
+
+.endif
+
+;---------------------------------------------------------------------
+
+	.dseg
+vers_cmd:
+	.byte	1
+vers_pstr:
+	.byte	2
+
+	.cseg
+version_ctrl:
+	sts	vers_cmd,temp
+	cpi	temp,4
+	brne	vc_e
+
+	ldiw	z,version_string*2
+	stsw	vers_pstr,z
+vc_e:
+	ret
+
+version_get:
+	lds	temp2,vers_cmd
+	ldi	temp,0
+	cpi	temp2,0
+	breq	vc_g_e
+	ldi	temp,VMAJOR
+	cpi	temp2,1
+	breq	vc_g_e
+	ldi	temp,VMINOR
+	cpi	temp2,2
+	breq	vc_g_e
+	ldi	temp,0xFF
+	cpi	temp2,4
+	brne	vc_g_e
+
+	ldsw	z,vers_pstr
+	lpm	temp,z+
+	tst	temp
+	breq	vc_g_e
+	stsw	vers_pstr,z
+
+vc_g_e:
+	ret
 
 
 ;---------------------------------------------------------------------