X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/5d497f1288f6a474030d5484be84450d7d7ab01d..99ed719900586348e7c4f3c2c39ebb60ec20bf2b:/avrcpm/avr/z80.asm

diff --git a/avrcpm/avr/z80.asm b/avrcpm/avr/z80.asm
old mode 100755
new mode 100644
index efb91df..409cc88
--- a/avrcpm/avr/z80.asm
+++ b/avrcpm/avr/z80.asm
@@ -27,7 +27,6 @@
 	;FUSE_L=0xF7
 #endif
 .list
-
 .listmac
 
 #ifndef DRAM_DQ_ORDER			/* If this is set to 1, the portbits  */
@@ -60,6 +59,7 @@
 	.equ refr_vect = OC2Aaddr
 #endif
 
+#define DRAM_WORD_ACCESS 0	/* experimental */
 
 #define EM_Z80	0	/* we don't have any z80 instructions yet */
 
@@ -142,37 +142,45 @@
 .equ ZFL_C	=	0
 
 ;Register definitions
-.def z_a      = r2
+.def	_tmp	= r0	;  0
+.def	_0	= r1
+;.def z_a      = r2
 .def z_b      = r3
 .def z_c      = r4
 .def z_d      = r5
 .def z_e      = r6
 .def z_l      = r7
 .def z_h      = r8
-.def z_spl    = r9
-.def z_sph    = r10
-
-.def dsk_trk  = r11
-.def dsk_sec  = r12
-.def dsk_dmah = r13
-.def dsk_dmal = r14
-
-;.def parityb  = r15
-
-.def temp     = R16 	;The temp register
-.def temp2    = R17 	;Second temp register
-.def trace    = r18
-.def opl      = r19
-.def oph      = r20
-.def adrl     = r21
-.def adrh     = r22
-.def insdecl  = r23
-.def z_pcl    = r24
-.def z_pch    = r25
-.undef xl
-.undef xh
-.def insdech  = r26
-.def z_flags  = r27
+;.def z_spl    = r9
+;.def z_sph    = r10
+
+.def	z_a	= r11
+
+
+.def	_wl	= r12
+.def	_wh	= r13
+.def	z_spl	= r14
+.def	z_sph	= r15	;
+.def	temp	= r16 	;
+.def	temp2	= r17 	;
+.def	temp3	= r18
+.def	temp4	= r19
+.def	z_flags	= r20	;
+.def	trace	= r21	;
+.def	insdecl	= r22	;
+.def	insdech	= r23	;
+.def	z_pcl	= r24	;
+.def	z_pch	= r25	;
+.undef xl 		;r26
+.undef xh		;r27
+.undef yl		;r28
+.undef yh		;r29
+.def opl	= r26	;
+.def oph	= r27	;
+.def adrl	= r28	;
+.def adrh	= r29	;
+; zl		;r30	;
+; zh		;r31	;
 
 
 ; This is the base z80 port address for clock access
@@ -191,6 +199,11 @@
 	;SRAM
 	.dseg
 	
+dsk_trk:	.byte	1
+dsk_sec:	.byte	1
+dsk_dmah:	.byte	1
+dsk_dmal:	.byte	1
+
 ;Sector buffer for 512 byte reads/writes from/to SD-card
 
 sectbuff:
@@ -220,21 +233,23 @@ start:
 ; - Kill wdt
 	wdr
 #if defined __ATmega8__
-	ldi temp,0
-	out MCUCSR,temp
+	out MCUCSR,_0
 	
 	ldi temp,(1<<WDCE) | (1<<WDE)
 	out WDTCSR,temp
 	ldi temp,(1<<WDCE)
 	out WDTCSR,temp
+	ldi temp,(1<<PUD)	;disable pullups
+	out SFIOR,temp
 #else
-	ldi temp,0
-	out MCUSR,temp
+	out MCUSR,_0
 
 	ldi temp,(1<<WDCE) | (1<<WDE)
 	sts WDTCSR,temp
 	ldi temp,(1<<WDCE)
 	sts WDTCSR,temp
+	ldi temp,(1<<PUD)	;disable pullups
+	out MCUCR,temp
 #endif
 
 ; - Setup Ports
@@ -254,10 +269,9 @@ start:
 
 ; - Init serial port
 
-	ldi	temp,0		; reset receive buffer
-	sts	rxcount,temp
-	sts	rxidx_r,temp
-	sts	rxidx_w,temp
+	sts	rxcount,_0	; reset receive buffer
+	sts	rxidx_r,_0
+	sts	rxidx_w,_0
 	
 
 #if defined __ATmega8__
@@ -305,10 +319,9 @@ start:
 
 	ldi	zl,low(timer_base)
 	ldi	zh,high(timer_base)
-	ldi	temp,0
 	ldi	temp2,timer_size
 ti_loop:
-	st	z+,temp
+	st	z+,_0
 	dec	temp2
 	brne	ti_loop
 
@@ -364,10 +377,7 @@ ramtestw:
 	mov temp,adrh
 	eor temp,adrl
 	rcall memwritebyte
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	brcc ramtestw
 	rcall printstr
 	.db "wait...",0
@@ -406,10 +416,7 @@ ramtestr:
 	ldi temp,13
 	rcall uartPutc
 ramtestrok:
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	brcc ramtestr
 
 .endif
@@ -421,10 +428,7 @@ ramtestrok:
 ramfillw:
 	ldi temp,0xcb
 	rcall memwritebyte
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	brcc ramfillw
 .endif
 
@@ -447,10 +451,7 @@ iplwriteloop:
 	rcall memWriteByte
 	pop zl
 	pop zh
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	cpi zl,low(sectbuff+128)
 	brne iplwriteloop
 	cpi zh,high(sectbuff+128)
@@ -496,8 +497,7 @@ noprintpc:
 .endif
 
 	; *** Stage 1: Fetch next opcode
-	mov adrl,z_pcl
-	mov adrh,z_pch
+	movw adrl,z_pcl
 	rcall memReadByte
 	adiw z_pcl,1
 
@@ -520,13 +520,10 @@ notrace1:
 .endif
 
 	; *** Stage 2: Decode it using the ins_table.
-	ldi temp2,0
-	ldi zl,low(inst_table*2)
 	ldi zh,high(inst_table*2)
+	mov zl,temp
 	add zl,temp
-	adc zh,temp2
-	add zl,temp
-	adc zh,temp2
+	adc zh,_0
 	lpm insdecl,Z+
 	lpm insdech,Z
 
@@ -547,18 +544,11 @@ notrace2:
 	; *** Stage 3: Fetch operand. Use the fetch jumptable for this.
 	mov temp,insdecl
 	andi temp,0x1F
-	cpi temp,0
 	breq nofetch
-	ldi temp2,0
-	lsl temp
-	ldi zl,low(fetchjumps*2)
-	ldi zh,high(fetchjumps*2)
+	ldi zl,low(fetchjumps)
+	ldi zh,high(fetchjumps)
 	add zl,temp
-	adc zh,temp2
-	lpm temp,Z+
-	lpm temp2,Z
-	mov zl,temp
-	mov zh,temp2
+	adc zh,_0
 	icall
 
 .if INS_DEBUG
@@ -579,18 +569,13 @@ nofetch:
 	; *** Stage 4: Execute operation :) Use the op jumptable for this.
 	mov temp,insdech
 	andi temp,0xFC
-	lsr temp
-	cpi temp,0
 	breq nooper
-	ldi zl,low(opjumps*2)
-	ldi zh,high(opjumps*2)
-	ldi temp2,0
+	lsr temp
+	lsr temp
+	ldi zl,low(opjumps)
+	ldi zh,high(opjumps)
 	add zl,temp
-	adc zh,temp2
-	lpm temp,Z+
-	lpm temp2,Z
-	mov zl,temp
-	mov zh,temp2
+	adc zh,_0
 	icall
 
 .if INS_DEBUG
@@ -614,15 +599,11 @@ nooper:
 	andi insdech,0x30
 	or temp,insdech
 	breq nostore
-	ldi zl,low(storejumps*2)
-	ldi zh,high(storejumps*2)
-	ldi temp2,0
+	lsr temp
+	ldi zl,low(storejumps)
+	ldi zh,high(storejumps)
 	add zl,temp
-	adc zh,temp2
-	lpm temp,Z+
-	lpm temp2,Z
-	mov zl,temp
-	mov zh,temp2
+	adc zh,_0
 	icall
 
 .if INS_DEBUG
@@ -732,19 +713,19 @@ conOut:
 
 
 dskTrackSel:
-	mov dsk_trk,temp
+	sts dsk_trk,temp
 	ret
 
 dskSecSel:
-	mov dsk_sec,temp
+	sts dsk_sec,temp
 	ret
 
 dskDmal:
-	mov dsk_dmal,temp
+	sts dsk_dmal,temp
 	ret
 
 dskDmah:
-	mov dsk_dmah,temp
+	sts dsk_dmah,temp
 	ret
 
 dskDoIt:
@@ -752,17 +733,17 @@ dskDoIt:
 	push temp
 	rcall printstr
 	.db "Disk read: track ",0
-	mov temp,dsk_trk
+	lds temp,dsk_trk
 	rcall printhex
 	rcall printstr
 	.db " sector ",0
-	mov temp,dsk_sec
+	lds temp,dsk_sec
 	rcall printhex
 	rcall printstr
 	.db " dma-addr ",0
-	mov temp,dsk_dmah
+	lds temp,dsk_dmah
 	rcall printhex
-	mov temp,dsk_dmal
+	lds temp,dsk_dmal
 	rcall printhex
 	rcall printstr
 	.db ".",13,0
@@ -771,16 +752,15 @@ dskDoIt:
 
 	;First, convert track/sector to an LBA address (in 128byte blocks)
 	push temp
-	mov adrl,dsk_sec
+	lds adrl,dsk_sec
 	ldi adrh,0
-	mov temp2,dsk_trk
+	lds temp2,dsk_trk
+	ldi temp,26
 dskXlateLoop:
 	cpi temp2,0
 	breq dskXlateLoopEnd
-	ldi temp,26
 	add adrl,temp
-	ldi temp,0
-	adc adrh,temp
+	adc adrh,_0
 	dec temp2
 	rjmp dskXlateLoop
 dskXlateLoopEnd:
@@ -815,8 +795,8 @@ dskDoItRead:
 	sbrc adrl,1
 	 inc zh
 
-	mov adrh,dsk_dmah
-	mov adrl,dsk_dmal
+	lds adrh,dsk_dmah
+	lds adrl,dsk_dmal
 
 	ldi temp2,128
 dskDoItReadMemLoop:
@@ -827,10 +807,7 @@ dskDoItReadMemLoop:
 	rcall memWriteByte
 	pop zl
 	pop zh
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	pop temp2
 	dec temp2
 	brne dskDoItReadMemLoop
@@ -847,17 +824,17 @@ dskDoItWrite:
 	push temp
 	rcall printstr
 	.db "Disk write: track ",0
-	mov temp,dsk_trk
+	lds temp,dsk_trk
 	rcall printhex
 	rcall printstr
 	.db " sector ",0
-	mov temp,dsk_sec
+	lds temp,dsk_sec
 	rcall printhex
 	rcall printstr
 	.db " dma-addr ",0
-	mov temp,dsk_dmah
+	lds temp,dsk_dmah
 	rcall printhex
-	mov temp,dsk_dmal
+	lds temp,dsk_dmal
 	rcall printhex
 	rcall printstr
 	.db ".",13,0
@@ -893,8 +870,8 @@ dskDoItWrite:
 	 adc zh,temp2
 	sbrc adrl,1
 	 inc zh
-	mov adrh,dsk_dmah
-	mov adrl,dsk_dmal
+	lds adrh,dsk_dmah
+	lds adrl,dsk_dmal
 	ldi temp2,128
 dskDoItWriteMemLoop:
 	push temp2
@@ -905,10 +882,7 @@ dskDoItWriteMemLoop:
 	pop zl
 	pop zh
 	st z+,temp
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 
 	pop temp2
 	dec temp2
@@ -1092,8 +1066,7 @@ mmcInitOcrLoopDone:
 	sbi P_MMC_CS,mmc_cs  		;disable /CS
 	rcall mmcByteNoSend
 
-	ldi temp,0
-	out SPCR,temp
+	out SPCR,_0
 	ret
 
 
@@ -1149,8 +1122,7 @@ mmcreadloop:
 	sbi P_MMC_CS,mmc_cs
 	rcall mmcByteNoSend
 
-	ldi temp,0
-	out SPCR,temp
+	out SPCR,_0
 	ret
 
 
@@ -1216,8 +1188,7 @@ mmcwaitwritten:
 	sbi P_MMC_CS,mmc_cs
 	rcall mmcByteNoSend
 
-	ldi temp,0
-	out SPCR,temp
+	out SPCR,_0
 	ret
 
 
@@ -1618,9 +1589,8 @@ syscl1:
 	cpc	zh,zl
 	brlo	syscl_end
 	
-	ldi	zl,0
-	sts	cnt_1ms,zl
-	sts	cnt_1ms+1,zl
+	sts	cnt_1ms,_0
+	sts	cnt_1ms+1,_0
 
 	lds	zl,uptime+0
 	inc	zl
@@ -1893,11 +1863,10 @@ ultoa3:	dec	insdech
 	subi	adrh, -'0'
 	push	adrh		;Stack it
 	inc	adrl	
-	ldi	insdech,0
-	cp	temp,insdech	;Repeat until oph:temp gets zero
-	cpc	temp2,insdech
-	cpc	opl,insdech	
-	cpc	oph,insdech	
+	cp	temp,_0	;Repeat until oph:temp gets zero
+	cpc	temp2,_0
+	cpc	opl,_0
+	cpc	oph,_0
 	brne	ultoa1	
 	
 	ldi	temp, '0'
@@ -1977,6 +1946,10 @@ printstr_end:
 
 .equ memReadByte	=	dram_read
 .equ memWriteByte	=	dram_write
+#if DRAM_WORD_ACCESS
+.equ memReadWord	=	dram_read_w
+.equ memWriteWord	=	dram_write_w
+#endif
 
 ; --------------------------------------------------------------
 
@@ -2108,26 +2081,26 @@ uartputc_l:
 
 ;Jump table for fetch routines. Make sure to keep this in sync with the .equs!
 fetchjumps:
-.dw do_fetch_nop
-.dw do_fetch_a
-.dw do_fetch_b
-.dw do_fetch_c
-.dw do_fetch_d
-.dw do_fetch_e
-.dw do_fetch_h
-.dw do_fetch_l
-.dw do_fetch_af
-.dw do_fetch_bc
-.dw do_fetch_de
-.dw do_fetch_hl
-.dw do_fetch_sp
-.dw do_fetch_mbc
-.dw do_fetch_mde
-.dw do_fetch_mhl
-.dw do_fetch_msp
-.dw do_fetch_dir8
-.dw do_fetch_dir16
-.dw do_fetch_rst
+	rjmp do_fetch_nop
+	rjmp do_fetch_a
+	rjmp do_fetch_b
+	rjmp do_fetch_c
+	rjmp do_fetch_d
+	rjmp do_fetch_e
+	rjmp do_fetch_h
+	rjmp do_fetch_l
+	rjmp do_fetch_af
+	rjmp do_fetch_bc
+	rjmp do_fetch_de
+	rjmp do_fetch_hl
+	rjmp do_fetch_sp
+	rjmp do_fetch_mbc
+	rjmp do_fetch_mde
+	rjmp do_fetch_mhl
+	rjmp do_fetch_msp
+	rjmp do_fetch_dir8
+	rjmp do_fetch_dir16
+	rjmp do_fetch_rst
 
 do_fetch_nop:
 	ret
@@ -2181,8 +2154,7 @@ do_fetch_hl:
 	ret
 
 do_fetch_sp:
-	mov opl,z_spl
-	mov oph,z_sph
+	movw opl,z_spl
 	ret
 
 do_fetch_mbc:
@@ -2207,43 +2179,44 @@ do_fetch_mhl:
 	ret
 
 do_fetch_msp:
-	mov adrh,z_sph
-	mov adrl,z_spl
+	movw adrl,z_spl
+#if DRAM_WORD_ACCESS
+	rcall memReadWord
+	movw opl,temp
+#else
 	rcall memReadByte
 	mov opl,temp
 
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	rcall memReadByte
 	mov oph,temp
+#endif	
 	ret
 
 do_fetch_dir8:
-	mov adrl,z_pcl
-	mov adrh,z_pch
+	movw adrl,z_pcl
 	rcall memReadByte
 	adiw z_pcl,1
 	mov opl,temp
 	ret
 
 do_fetch_dir16:
-	mov adrl,z_pcl
-	mov adrh,z_pch
+	movw adrl,z_pcl
+#if DRAM_WORD_ACCESS
+	rcall memReadWord
+	movw opl,temp
+#else
 	rcall memReadByte
 	mov opl,temp
-	adiw z_pcl,1
-	mov adrl,z_pcl
-	mov adrh,z_pch
+	adiw adrl,1
 	rcall memReadByte
-	adiw z_pcl,1
 	mov oph,temp
+#endif	
+	adiw z_pcl,2
 	ret
 
 do_fetch_rst:
-	mov adrl,z_pcl
-	mov adrh,z_pch
+	movw adrl,z_pcl
 	subi adrl,1
 	sbci adrh,0
 	rcall memReadByte
@@ -2280,27 +2253,27 @@ do_fetch_rst:
 
 ;Jump table for store routines. Make sure to keep this in sync with the .equs!
 storejumps:
-.dw do_store_nop
-.dw do_store_a
-.dw do_store_b
-.dw do_store_c
-.dw do_store_d
-.dw do_store_e
-.dw do_store_h
-.dw do_store_l
-.dw do_store_af
-.dw do_store_bc
-.dw do_store_de
-.dw do_store_hl
-.dw do_store_sp
-.dw do_store_pc
-.dw do_store_mbc
-.dw do_store_mde
-.dw do_store_mhl
-.dw do_store_msp
-.dw do_store_ret
-.dw do_store_call
-.dw do_store_am
+	rjmp do_store_nop
+	rjmp do_store_a
+	rjmp do_store_b
+	rjmp do_store_c
+	rjmp do_store_d
+	rjmp do_store_e
+	rjmp do_store_h
+	rjmp do_store_l
+	rjmp do_store_af
+	rjmp do_store_bc
+	rjmp do_store_de
+	rjmp do_store_hl
+	rjmp do_store_sp
+	rjmp do_store_pc
+	rjmp do_store_mbc
+	rjmp do_store_mde
+	rjmp do_store_mhl
+	rjmp do_store_msp
+	rjmp do_store_ret
+	rjmp do_store_call
+	rjmp do_store_am
 
 
 do_store_nop:
@@ -2376,49 +2349,43 @@ do_store_mhl:
 	ret
 
 do_store_msp:
-	mov adrh,z_sph
-	mov adrl,z_spl
+	movw adrl,z_spl
+#if DRAM_WORD_ACCESS
+	movw temp,opl
+	rcall memWriteWord
+#else
 	mov temp,opl
 	rcall memWriteByte
-
-	ldi temp,1
-	ldi temp2,0
-	add adrl,temp
-	adc adrh,temp2
+	adiw adrl,1
 	mov temp,oph
 	rcall memWriteByte
-
+#endif
 	ret
 
 do_store_sp:
-	mov z_sph,oph
-	mov z_spl,opl
+	movw z_spl,opl
 	ret
 
 do_store_pc:
-	mov z_pch,oph
-	mov z_pcl,opl
+	movw z_pcl,opl
 	ret
 
 do_store_ret:
 	rcall do_op_pop16
-	mov z_pcl,opl
-	mov z_pch,oph
+	movw z_pcl,opl
 	ret
 
 do_store_call:
 	push opl
 	push oph
-	mov opl,z_pcl
-	mov oph,z_pch
+	movw opl,z_pcl
 	rcall do_op_push16
 	pop z_pch
 	pop z_pcl
 	ret
 
 do_store_am:
-	mov adrh,oph
-	mov adrl,opl
+	movw adrl,opl
 	mov temp,z_a
 	rcall memWriteByte
 	ret
@@ -2469,46 +2436,46 @@ do_store_am:
 .equ OP_INV		= (39<<10)
 
 opjumps:
-.dw do_op_nop
-.dw do_op_inc
-.dw do_op_dec
-.dw do_op_inc16
-.dw do_op_dec16
-.dw do_op_rlc
-.dw do_op_rrc
-.dw do_op_rr
-.dw do_op_rl
-.dw do_op_adda
-.dw do_op_adca
-.dw do_op_subfa
-.dw do_op_sbcfa
-.dw do_op_anda
-.dw do_op_ora
-.dw do_op_xora
-.dw do_op_addhl
-.dw do_op_sthl
-.dw do_op_rmem16
-.dw do_op_rmem8
-.dw do_op_da
-.dw do_op_scf
-.dw do_op_cpl
-.dw do_op_ccf
-.dw do_op_pop16
-.dw do_op_push16
-.dw do_op_ifnz
-.dw do_op_ifz
-.dw do_op_ifnc
-.dw do_op_ifc
-.dw do_op_ifpo
-.dw do_op_ifpe
-.dw do_op_ifp
-.dw do_op_ifm
-.dw do_op_outa
-.dw do_op_in
-.dw do_op_exhl
-.dw do_op_di
-.dw do_op_ei
-.dw do_op_inv
+	rjmp do_op_nop
+	rjmp do_op_inc
+	rjmp do_op_dec
+	rjmp do_op_inc16
+	rjmp do_op_dec16
+	rjmp do_op_rlc
+	rjmp do_op_rrc
+	rjmp do_op_rr
+	rjmp do_op_rl
+	rjmp do_op_adda
+	rjmp do_op_adca
+	rjmp do_op_subfa
+	rjmp do_op_sbcfa
+	rjmp do_op_anda
+	rjmp do_op_ora
+	rjmp do_op_xora
+	rjmp do_op_addhl
+	rjmp do_op_sthl
+	rjmp do_op_rmem16
+	rjmp do_op_rmem8
+	rjmp do_op_da
+	rjmp do_op_scf
+	rjmp do_op_cpl
+	rjmp do_op_ccf
+	rjmp do_op_pop16
+	rjmp do_op_push16
+	rjmp do_op_ifnz
+	rjmp do_op_ifz
+	rjmp do_op_ifnc
+	rjmp do_op_ifc
+	rjmp do_op_ifpo
+	rjmp do_op_ifpe
+	rjmp do_op_ifp
+	rjmp do_op_ifm
+	rjmp do_op_outa
+	rjmp do_op_in
+	rjmp do_op_exhl
+	rjmp do_op_di
+	rjmp do_op_ei
+	rjmp do_op_inv
 
 
 ;How the flags are supposed to work:
@@ -2632,6 +2599,66 @@ opjumps:
 ;|SUB s     |***V1*|Subtract             |A=A-s                 |
 ;|XOR s     |**0P00|Logical Exclusive OR |A=Axs                 |
 ;|----------+------+--------------------------------------------|
+;| F        |-*01? |Flag unaffected/affected/reset/set/unknown  |
+;| S        |S     |Sign flag (Bit 7)                           |
+;| Z        | Z    |Zero flag (Bit 6)                           |
+;| HC       |  H   |Half Carry flag (Bit 4)                     |
+;| P/V      |   P  |Parity/Overflow flag (Bit 2, V=overflow)    |
+;| N        |    N |Add/Subtract flag (Bit 1)                   |
+;| CY       |     C|Carry flag (Bit 0)                          |
+;|-----------------+--------------------------------------------|
+;| n               |Immediate addressing                        |
+;| nn              |Immediate extended addressing               |
+;| e               |Relative addressing (PC=PC+2+offset)        |
+;| [nn]            |Extended addressing                         |
+;| [xx+d]          |Indexed addressing                          |
+;| r               |Register addressing                         |
+;| [rr]            |Register indirect addressing                |
+;|                 |Implied addressing                          |
+;| b               |Bit addressing                              |
+;| p               |Modified page zero addressing (see RST)     |
+;|-----------------+--------------------------------------------|
+;|DEFB n(,...)     |Define Byte(s)                              |
+;|DEFB 'str'(,...) |Define Byte ASCII string(s)                 |
+;|DEFS nn          |Define Storage Block                        |
+;|DEFW nn(,...)    |Define Word(s)                              |
+;|-----------------+--------------------------------------------|
+;| A  B  C  D  E   |Registers (8-bit)                           |
+;| AF  BC  DE  HL  |Register pairs (16-bit)                     |
+;| F               |Flag register (8-bit)                       |
+;| I               |Interrupt page address register (8-bit)     |
+;| IX IY           |Index registers (16-bit)                    |
+;| PC              |Program Counter register (16-bit)           |
+;| R               |Memory Refresh register                     |
+;| SP              |Stack Pointer register (16-bit)             |
+;|-----------------+--------------------------------------------|
+;| b               |One bit (0 to 7)                            |
+;| cc              |Condition (C,M,NC,NZ,P,PE,PO,Z)             |
+;| d               |One-byte expression (-128 to +127)          |
+;| dst             |Destination s, ss, [BC], [DE], [HL], [nn]   |
+;| e               |One-byte expression (-126 to +129)          |
+;| m               |Any register r, [HL] or [xx+d]              |
+;| n               |One-byte expression (0 to 255)              |
+;| nn              |Two-byte expression (0 to 65535)            |
+;| pp              |Register pair BC, DE, IX or SP              |
+;| qq              |Register pair AF, BC, DE or HL              |
+;| qq'             |Alternative register pair AF, BC, DE or HL  |
+;| r               |Register A, B, C, D, E, H or L              |
+;| rr              |Register pair BC, DE, IY or SP              |
+;| s               |Any register r, value n, [HL] or [xx+d]     |
+;| src             |Source s, ss, [BC], [DE], [HL], nn, [nn]    |
+;| ss              |Register pair BC, DE, HL or SP              |
+;| xx              |Index register IX or IY                     |
+;|-----------------+--------------------------------------------|
+;| +  -  *  /  ^   |Add/subtract/multiply/divide/exponent       |
+;| &  ~  v  x      |Logical AND/NOT/inclusive OR/exclusive OR   |
+;| <-  ->          |Rotate left/right                           |
+;| [ ]             |Indirect addressing                         |
+;| [ ]+  -[ ]      |Indirect addressing auto-increment/decrement|
+;| { }             |Combination of operands                     |
+;| #               |Also BC=BC-1,DE=DE-1                        |
+;| ##              |Only lower 4 bits of accumulator A used     |
+;----------------------------------------------------------------
 
 
 .equ AVR_T = 6
@@ -2661,11 +2688,8 @@ opjumps:
 ; (6 words, 8 cycles)
 
 .macro	ldpmx
-	ldi	zl,low (@1*2)
-	ldi	zh,high(@1*2)
-	add	zl,@2		       
-	brcc	PC+2
-	inc	zh		       
+	ldi	zh,high(@1*2)	; table must be page aligned
+	mov	zl,@2		       
 	lpm	@0,z	
 .endm
 
@@ -2771,10 +2795,7 @@ do_op_dec:
 ;
 ; 
 do_op_inc16:
-	inc	opl
-	brne	op_i16x
-	inc	oph
-op_i16x:
+	adiw	opl,1
 	ret
 
 ;----------------------------------------------------------------
@@ -3010,20 +3031,18 @@ do_op_addhl:
 ;
 ;
 do_op_sthl: ;store hl to mem loc in opl:h
-	mov adrl,opl
-	mov adrh,oph
+	movw adrl,opl
+#if DRAM_WORD_ACCESS
+	mov temp,z_l
+	mov temp2,z_h
+	rcall memWriteWord
+#else
 	mov temp,z_l
 	rcall memWriteByte
-
-	inc	opl
-	brne	op_sthlx
-	inc	oph
-op_sthlx:
-	mov adrl,opl
-	mov adrh,oph
+	adiw adrl,1
 	mov temp,z_h
 	rcall memWriteByte
-
+#endif
 	ret
 
 ;----------------------------------------------------------------
@@ -3033,16 +3052,17 @@ op_sthlx:
 ;
 ; 
 do_op_rmem16:
-	mov adrl,opl
-	mov adrh,oph
+	movw adrl,opl
+#if DRAM_WORD_ACCESS
+	rcall memReadWord
+	movw opl,temp
+#else
 	rcall memReadByte
 	mov opl,temp
-	ldi temp,1
-	add adrl,temp
-	ldi temp,0
-	adc adrh,temp
+	adiw adrl,1
 	rcall memReadByte
 	mov oph,temp
+#endif	
 	ret
 
 ;----------------------------------------------------------------
@@ -3052,8 +3072,7 @@ do_op_rmem16:
 ;
 ;
 do_op_rmem8:
-	mov adrl,opl
-	mov adrh,oph
+	movw adrl,opl
 	rcall memReadByte
 	mov opl,temp
 	ret
@@ -3238,42 +3257,19 @@ do_op_cpl:
 ;
 ;
 do_op_push16:
-#if 1
-	ldi temp,1
-	ldi temp2,0
-	sub z_spl,temp
-	sbc z_sph,temp2
-
-	mov adrl,z_spl
-	mov adrh,z_sph
-	mov temp,oph
-	rcall memWriteByte
-
-	ldi temp,1
-	ldi temp2,0
-	sub z_spl,temp
-	sbc z_sph,temp2
-
-	mov adrl,z_spl
-	mov adrh,z_sph
+	movw adrl,z_spl
+	subi adrl,2
+	sbci adrh,0
+	movw z_spl,adrl
+#if DRAM_WORD_ACCESS	
+	movw temp,opl
+	rcall memWriteWord
+#else
 	mov temp,opl
 	rcall memWriteByte
-#else
-	subi z_spl,1
-	sbci z_sph,0
-
-	mov adrl,z_spl
-	mov adrh,z_sph
+	adiw adrl,1
 	mov temp,oph
 	rcall memWriteByte
-
-	subi z_spl,1
-	sbci z_sph,0
-
-	mov adrl,z_spl
-	mov adrh,z_sph
-	mov temp,opl
-	rcall memWriteByte
 #endif
 
 .if STACK_DBG
@@ -3303,25 +3299,21 @@ do_op_push16:
 ;
 ;
 do_op_pop16:
-	mov adrl,z_spl
-	mov adrh,z_sph
+	movw adrl,z_spl
+#if DRAM_WORD_ACCESS
+	rcall memReadWord
+	movw opl,temp
+#else
 	rcall memReadByte
 	mov opl,temp
-
-	ldi temp,1
-	ldi temp2,0
-	add z_spl,temp
-	adc z_sph,temp2
-
-	mov adrl,z_spl
-	mov adrh,z_sph
+	adiw adrl,1
 	rcall memReadByte
 	mov oph,temp
+#endif	
 
-	ldi temp,1
-	ldi temp2,0
+	ldi temp,2
 	add z_spl,temp
-	adc z_sph,temp2
+	adc z_sph,_0
 
 .if STACK_DBG
 	rcall printstr
@@ -3545,30 +3537,6 @@ do_op_in:	; in a,(opl)
 .endif
 	ret
 
-;----------------------------------------------------------------
-
-#if 0
-do_op_calcparity:
-	ldi temp2,1
-	sbrc parityb,0
-	 inc temp2
-	sbrc parityb,1
-	 inc temp2
-	sbrc parityb,2
-	 inc temp2
-	sbrc parityb,3
-	 inc temp2
-	sbrc parityb,4
-	 inc temp2
-	sbrc parityb,5
-	 inc temp2
-	sbrc parityb,6
-	 inc temp2
-	sbrc parityb,7
-	 inc temp2
-	andi temp2,1
-	ret
-#endif
 
 ;----------------------------------------------------------------
 do_op_inv:
@@ -3588,6 +3556,7 @@ haltinv:
 ; http://z80ex.sourceforge.net/
 
 ; The S, Z, 5 and 3 bits and the parity of the lookup value 
+.org (PC+255) & 0xff00
 sz53p_tab:
 	.db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
 	.db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
@@ -3631,27 +3600,28 @@ sz53p_tab:
 ; the fetch operation (bit 0-4), the processing operation (bit 10-16) and the store 
 ; operation (bit 5-9).
 
+.org (PC+255) & 0xff00
 inst_table:
-.dw (FETCH_NOP  | OP_NOP   | STORE_NOP)	 ; 00		    NOP
-.dw (FETCH_DIR16| OP_NOP   | STORE_BC )	 ; 01 nn nn	LD BC,nn
-.dw (FETCH_A    | OP_NOP   | STORE_MBC ) ; 02		    LD (BC),A
-.dw (FETCH_BC   | OP_INC16 | STORE_BC )	 ; 03		    INC BC
-.dw (FETCH_B    | OP_INC   | STORE_B )	 ; 04       INC B
-.dw (FETCH_B    | OP_DEC   | STORE_B )	 ; 05       DEC B
-.dw (FETCH_DIR8	| OP_NOP	| STORE_B  )	 ; 06 nn    LD B,n
-.dw (FETCH_A    | OP_RLC	| STORE_A  )	 ; 07       RLCA
-.dw (FETCH_NOP	| OP_INV	| STORE_NOP)	 ; 08       EX AF,AF'	(Z80)
-.dw (FETCH_BC   | OP_ADDHL	| STORE_HL ) ; 09       ADD HL,BC
-.dw (FETCH_MBC	| OP_NOP	| STORE_A  )	 ; 0A       LD A,(BC)
-.dw (FETCH_BC   | OP_DEC16	| STORE_BC ) ; 0B       DEC BC
-.dw (FETCH_C    | OP_INC	| STORE_C  )	 ; 0C       INC C
-.dw (FETCH_C    | OP_DEC	| STORE_C  )	 ; 0D       DEC C
-.dw (FETCH_DIR8 | OP_NOP	| STORE_C  )	 ; 0E nn    LD C,n
-.dw (FETCH_A    | OP_RRC	| STORE_A  )	 ; 0F       RRCA
-.dw (FETCH_NOP  | OP_INV	| STORE_NOP)	 ; 10 oo    DJNZ o		(Z80)
+.dw (FETCH_NOP  | OP_NOP	| STORE_NOP)	 ; 00		NOP
+.dw (FETCH_DIR16| OP_NOP	| STORE_BC )	 ; 01 nn nn	LD BC,nn
+.dw (FETCH_A    | OP_NOP	| STORE_MBC)	 ; 02		LD (BC),A
+.dw (FETCH_BC   | OP_INC16	| STORE_BC )	 ; 03		INC BC
+.dw (FETCH_B    | OP_INC	| STORE_B  )	 ; 04       	INC B
+.dw (FETCH_B    | OP_DEC	| STORE_B  )	 ; 05       	DEC B
+.dw (FETCH_DIR8	| OP_NOP	| STORE_B  )	 ; 06 nn    	LD B,n
+.dw (FETCH_A    | OP_RLC	| STORE_A  )	 ; 07       	RLCA
+.dw (FETCH_NOP	| OP_INV	| STORE_NOP)	 ; 08       	EX AF,AF'	(Z80)
+.dw (FETCH_BC   | OP_ADDHL	| STORE_HL )	 ; 09       	ADD HL,BC
+.dw (FETCH_MBC	| OP_NOP	| STORE_A  )	 ; 0A       	LD A,(BC)
+.dw (FETCH_BC   | OP_DEC16	| STORE_BC )	 ; 0B       	DEC BC
+.dw (FETCH_C    | OP_INC	| STORE_C  )	 ; 0C       	INC C
+.dw (FETCH_C    | OP_DEC	| STORE_C  )	 ; 0D       	DEC C
+.dw (FETCH_DIR8 | OP_NOP	| STORE_C  )	 ; 0E nn    	LD C,n
+.dw (FETCH_A    | OP_RRC	| STORE_A  )	 ; 0F       	RRCA
+.dw (FETCH_NOP  | OP_INV	| STORE_NOP)	 ; 10 oo    	DJNZ o		(Z80)
 .dw (FETCH_DIR16| OP_NOP	| STORE_DE )	 ; 11 nn nn	LD DE,nn
 .dw (FETCH_A    | OP_NOP	| STORE_MDE)	 ; 12		LD (DE),A
-.dw (FETCH_DE	| OP_INC16  | STORE_DE )	 ; 13		INC DE
+.dw (FETCH_DE	| OP_INC16	| STORE_DE )	 ; 13		INC DE
 .dw (FETCH_D	| OP_INC	| STORE_D  )	 ; 14		INC D
 .dw (FETCH_D	| OP_DEC	| STORE_D  )	 ; 15		DEC D
 .dw (FETCH_DIR8	| OP_NOP	| STORE_D  )	 ; 16 nn	LD D,n
@@ -3849,7 +3819,7 @@ inst_table:
 .dw (FETCH_DIR8	| OP_SUBFA	| STORE_A  )	 ; D6 nn	SUB n
 .dw (FETCH_RST	| OP_NOP	| STORE_CALL)	 ; D7		RST 10H
 .dw (FETCH_NOP	| OP_IFC	| STORE_RET)	 ; D8		RET C
-.dw (FETCH_NOP	| OP_INV	| STORE_NOP)	 ; D9		EXX			(Z80)
+.dw (FETCH_NOP	| OP_INV	| STORE_NOP)	 ; D9		EXX		(Z80)
 .dw (FETCH_DIR16| OP_IFC	| STORE_PC )	 ; DA nn nn	JP C,nn
 .dw (FETCH_DIR8	| OP_IN 	| STORE_A  )	 ; DB nn	IN A,(n)
 .dw (FETCH_DIR16| OP_IFC	| STORE_CALL)	 ; DC nn nn	CALL C,nn