X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/a7b795ca288038b9b99c6afe5d15cf2ddd4dac3f..de15c768141e7d7c3f34e6a4260d1c7a55cece4f:/avr/8080int.asm diff --git a/avr/8080int.asm b/avr/8080int.asm index 85445cf..5e68a92 100644 --- a/avr/8080int.asm +++ b/avr/8080int.asm @@ -30,7 +30,7 @@ ; instr fetch, op, store ; .macro instr - .db low(@2), low(@1), high(@1), low(@0) + .db low(@2), low(do_@1), high(do_@1), low(@0) .endm @@ -43,6 +43,59 @@ z_e: .byte 1 z_h: .byte 1 z_l: .byte 1 + .equ oz_b = 0 + .equ oz_c = 1 + .equ oz_d = 2 + .equ oz_e = 3 + .equ oz_h = 4 + .equ oz_l = 5 + + +#if EM_Z80 +z_b2: .byte 1 +z_c2: .byte 1 +z_d2: .byte 1 +z_e2: .byte 1 +z_h2: .byte 1 +z_l2: .byte 1 +z_f2: .byte 1 +z_a2: .byte 1 + .equ r2ofs = z_b2-z_b + .equ oz_b2 = 6 + .equ oz_c2 = 7 + .equ oz_d2 = 8 + .equ oz_e2 = 9 + .equ oz_h2 = 10 + .equ oz_l2 = 11 + .equ oz_f2 = 12 + .equ oz_a2 = 13 + +z_xh: .byte 1 +z_xl: .byte 1 +z_yh: .byte 1 +z_yl: .byte 1 + +z_i: .byte 1 +z_r: .byte 1 + .equ oz_xh = 14 + .equ oz_xl = 15 + .equ oz_yh = 16 + .equ oz_yl = 17 + .equ oz_i = 18 + .equ oz_r = 19 + +z_istat: .byte 1 + .equ oz_istat = 20 + + .equ IM_MASK = 0x03 ;Mask IM 0..2 + .equ IM0 = 0 + .equ IM1 = 1 + .equ IM2 = 2 + + .equ IFF1 = 2 ;IFF1 Flag + .equ IFF2 = 3 ;IFF2 Flag + +#endif .cseg @@ -80,7 +133,6 @@ main: notraceon: .endif - .if PRINT_PC cpi z_pch,DBG_TRACE_BOTTOM brlo noprintpc @@ -90,7 +142,7 @@ notraceon: printnewline printstring "PC=" movw temp,z_pcl - rcall printhexw + lcall printhexw printstring " " noprintpc: .endif @@ -136,7 +188,7 @@ noprintpc: .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen fetch_ops: -do_nop: +do_fetch_nop: ret do_fetch_a: @@ -194,13 +246,13 @@ do_fetch_sp: do_fetch_mbc: lds xh,z_b lds xl,z_c - mem_read_d opl + mem_read_d z_a ret do_fetch_mde: lds xh,z_d lds xl,z_e - mem_read_d opl + mem_read_d z_a ret do_fetch_mhl: @@ -240,6 +292,7 @@ do_fetch_rst: .org (PC+255) & 0xff00 ; wichtig !!!fetch und store muessen in einer page liegen store_ops: +do_store_nop: ret do_store_a: @@ -293,13 +346,13 @@ do_store_hl: do_store_mbc: lds xh,z_b lds xl,z_c - mem_write_s opl + mem_write_s z_a ret do_store_mde: lds xh,z_d lds xl,z_e - mem_write_s opl + mem_write_s z_a ret do_store_mhl: @@ -369,8 +422,8 @@ do_store_am: mem_write_ds op, z_a ret -; ------------ Operation phase stuff ----------------- +; ------------ Operation phase stuff ----------------- ;---------------------------------------------------------------- ;| | @@ -393,9 +446,9 @@ do_store_am: ;|ADC A,s |***V0*|Add with Carry |A=A+s+CY | ;|ADC HL,ss |**?V0*|Add with Carry |HL=HL+ss+CY | ;|ADD A,s |***V0*|Add |A=A+s | -;|ADD HL,ss |--?-0*|Add |HL=HL+ss | -;|ADD IX,pp |--?-0*|Add |IX=IX+pp | -;|ADD IY,rr |--?-0*|Add |IY=IY+rr | +;|ADD HL,ss |--*-0*|Add |HL=HL+ss | +;|ADD IX,pp |--*-0*|Add |IX=IX+pp | +;|ADD IY,rr |--*-0*|Add |IY=IY+rr | ;|AND s |**1P00|Logical AND |A=A&s | ;|BIT b,m |?*1?0-|Test Bit |m&{2^b} | ;|CALL cc,nn|------|Conditional Call |If cc CALL | @@ -411,9 +464,9 @@ do_store_am: ;|DEC s |***V1-|Decrement |s=s-1 | ;|DEC xx |------|Decrement |xx=xx-1 | ;|DEC ss |------|Decrement |ss=ss-1 | -;|DI |------|Disable Interrupts | | +;|DI |------|Disable Interrupts |IFF1 = IFF2 = 0 | ;|DJNZ e |------|Dec., Jump Non-Zero |B=B-1 till B=0 | -;|EI |------|Enable Interrupts | | +;|EI |------|Enable Interrupts |IFF1 = IFF2 = 1 | ;|EX [SP],HL|------|Exchange |[SP]<->HL | ;|EX [SP],xx|------|Exchange |[SP]<->xx | ;|EX AF,AF' |------|Exchange |AF<->AF' | @@ -474,7 +527,7 @@ do_store_am: ;|RRD |**0P0-|Rotate Right 4 bits |{A,[HL]}=->{A,[HL]} ##| ;|RST p |------|Restart | (p=0H,8H,10H,...,38H)| ;|SBC A,s |***V1*|Subtract with Carry |A=A-s-CY | -;|SBC HL,ss |**?V1*|Subtract with Carry |HL=HL-ss-CY | +;|SBC HL,ss |***V1*|Subtract with Carry |HL=HL-ss-CY | ;|SCF |--0-01|Set Carry Flag |CY=1 | ;|SET b,m |------|Set bit |m=mv{2^b} | ;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 | @@ -582,9 +635,14 @@ do_store_am: lpm @0,z .endm -.macro do_z80_flags_HP +.macro do_z80_flags_V #if EM_Z80 bmov z_flags, ZFL_P, temp, AVR_V +#endif +.endm + +.macro do_z80_flags_H +#if EM_Z80 bmov z_flags, ZFL_H, temp, AVR_H #endif .endm @@ -607,6 +665,19 @@ do_store_am: #endif .endm +.macro do_z80_flags_clear_HN +#if EM_Z80 + andi z_flags,~((1< (" mov temp,opl - rcall printhex + lcall printhex printstring ") " .endif mov temp,z_a mov temp2,opl - rcall portWrite + lcall portWrite ret ;---------------------------------------------------------------- @@ -669,21 +742,21 @@ do_op_outa: ; out (opl),a ;|IN A,[n] |------|Input |A=[n] | ; ; -do_op_in: ; in a,(opl) +do_op_ina: ; in a,(opl) .if PORT_DEBUG printnewline printstring "Port read: (" mov temp,opl - rcall printhex + lcall printhex printstring ") -> " .endif mov temp2,opl - rcall portRead - mov opl,temp + lcall portRead + mov z_a,temp .if PORT_DEBUG - rcall printhex + lcall printhex printstring " " .endif ret @@ -700,25 +773,25 @@ do_op_in: ; in a,(opl) ; ; do_op_inc: - inc opl -#if EM_Z80 + ldi temp,1 + add opl,temp in temp, sreg -#endif - andi z_flags,(1<A | ; ; -do_op_rrc: +do_op_rrca: ;Rotate Right Cyclical. All bits move 1 to the ;right, the lsb becomes c and msb. do_z80_flags_op_rotate - lsr opl + lsr z_a brcc do_op_rrc_noc - ori opl, 0x80 + ldi temp,0x80 + or z_a,temp ori z_flags, (1<{CY,A} | ; ; -do_op_rr: +do_op_rra: ;Rotate Right. All bits move 1 to the right, the lsb ;becomes c, c becomes msb. clc ; get z80 carry to avr carry sbrc z_flags,ZFL_C sec do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C) - bmov z_flags,ZFL_C, opl,0 ; Bit 0 --> CY - ror opl + bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY + ror z_a ret ;---------------------------------------------------------------- @@ -845,15 +919,15 @@ do_op_rr: ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- | ; ; -do_op_rl: +do_op_rla: ;Rotate Left. All bits move 1 to the left, the msb ;becomes c, c becomes lsb. clc sbrc z_flags,ZFL_C sec do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C) - bmov z_flags,ZFL_C, opl,7 ; Bit 7 --> CY - rol opl + bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY + rol z_a ret ;---------------------------------------------------------------- @@ -869,7 +943,8 @@ do_op_adda: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V ret ;---------------------------------------------------------------- @@ -888,7 +963,8 @@ do_op_adca: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V ret ;---------------------------------------------------------------- @@ -904,7 +980,8 @@ do_op_subfa: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -917,13 +994,13 @@ do_op_subfa: ; do_op_cpfa: - mov temp,z_a - sub temp,opl - mov opl,temp + mov temp2,z_a + sub temp2,opl in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,P + ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -943,7 +1020,8 @@ do_op_sbcfa: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -954,7 +1032,7 @@ do_op_sbcfa: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|AND s |**-P 0|Logical AND |A=A&s | ; -; TODO H-Flag +; do_op_anda: and z_a,opl ; ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C @@ -969,7 +1047,7 @@ do_op_anda: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|OR s |**-P00|Logical inclusive OR |A=Avs | ; -; TODO: H-Flag +; do_op_ora: or z_a,opl ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C @@ -983,7 +1061,7 @@ do_op_ora: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs | ; -; TODO: H-Flag +; do_op_xora: eor z_a,opl ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C @@ -1003,9 +1081,11 @@ do_op_addhl: lds temp2,z_h add opl,temp adc oph,temp2 + sts z_l,opl + sts z_h,oph in temp,sreg - bmov z_flags,ZFL_H, temp,AVR_H bmov z_flags,ZFL_C, temp,AVR_C + do_z80_flags_H do_z80_flags_clear_N ret @@ -1060,11 +1140,11 @@ do_op_rmem8: ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed: ; -; ------------------------------------------------------------------------------- -; | | C Flag | HEX value in | H Flag | HEX value in | Number | C flag| -; | Operation| Before | upper digit | Before | lower digit | added | After | -; | | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA | -; |-----------------------------------------------------------------------------| +; ------------------------------------------------------------------- +; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag | +; | Oper |Before |upper digit |Before |lower digit| added |After | +; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA | +; |-------+-------+------------+-------+-----------+--------+-------| ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 | ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 | ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 | @@ -1074,111 +1154,134 @@ do_op_rmem8: ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 | ; | | 1 | 0-2 | 0 | A-F | 66 | 1 | ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 | -; |-----------------------------------------------------------------------------| +; |-------+-------+------------+-------+-----------+--------+-------| ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 | ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 | ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 | ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 | -; |-----------------------------------------------------------------------------| -; -; Flags: -; C: See instruction. +; ------------------------------------------------------------------- +; +; The H flag is affected as follows: +; +; --------------------- +; | N | H | low |H' | +; | | |nibble | | +; |---+---+-------+---| +; | 0 | * | 0-9 | 0 | +; | 0 | * | a-f | 1 | +; | 1 | 0 | * | 0 | +; | 1 | 1 | 6-f | 0 | +; | 1 | 1 | 0-5 | 1 | +; --------------------- +; +; Ohter flags: ; N: Unaffected. ; P/V: Set if Acc. is even parity after operation, reset otherwise. -; H: See instruction. ; Z: Set if Acc. is Zero after operation, reset otherwise. ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise. - - #if 1 + do_op_da: - ldi oph,0 ; what to add - sbrc z_flags,ZFL_H ; if H-Flag - rjmp op_da_06 - mov temp,opl - andi temp,0x0f ; ... or lower digit > 9 - cpi temp,0x0a - brlo op_da_06n -op_da_06: - ori oph,0x06 -op_da_06n: - sbrc z_flags,(1<= 0x0A)) + brlo op_da_a10 ; | +op_da_a01: ; then + ldi oph,0x06 ; add 6 to lower nibble + add opl,oph ; + brhc op_da_02 ; if + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: ; + ldi oph,0x60 ; add 6 to lower nibble + add opl,oph ; + ori temp2,(1< 9 - brlo do_op_da_h ; - ori temp2,0x06 ; add 6 to lower digit -do_op_da_h: ; - sbrc z_flags,ZFL_H ; ... or H-Flag - ori temp2,0x06 ; - add opl,temp2 ; - - ldi temp2,0 ; - mov temp,opl ; - andi temp,0xf0 ; - cpi temp,0xa0 ; - brlo do_op_da_c ; - ori temp2,0x60 ; -do_op_da_c: ; else sub-op - sbrc z_flags,ZFL_C ; - ori temp2,0x60 ; - andi z_flags, ~( (1<= 0x0A) + brlo op_da_a10 ; | + ori oph,0x06 ; add 6 + ori temp2,(1<= 0x90) + brlo op_da_a03 ; | +op_da_a02: + ori oph,0x60 ; add 0x60 + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: + ori oph,0x60 ; add 0x60 + ori temp2,(1<= 0x0A) + brsh op_da_ae ; | + ori temp2,(1<