X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/bb5256eea0dbc764f2f447362e37d62ec060a5dc..79986122b1d8a4aaf015b8d30f20e99d78779342:/avr/i2c.asm

diff --git a/avr/i2c.asm b/avr/i2c.asm
index 4932173..0d96ace 100644
--- a/avr/i2c.asm
+++ b/avr/i2c.asm
@@ -74,7 +74,15 @@
 ; 
 ; wait ready:
 ; 	 (1<<TWIE)|(1<<TWSTO)
-; 
+;
+;----------------------------------------------------------------------
+;
+;i2c_result	<  0	Error. 
+;			-1 general/unknown error
+;			-2 time out 
+;		>= 0	No error
+;			> 0 status tbd.
+;
 ;----------------------------------------------------------------------
 
 	.dseg
@@ -112,7 +120,6 @@ i2c_buf:
 	ldd	temp2,z+oi2ci_idx			
 
 	inm8	temp,TWSR
-
 	cpi	temp,TWI_START
 	breq	i2ci_START
 	cpi	temp,TWI_REP_START
@@ -135,19 +142,19 @@ i2ci_REP_START:
 i2ci_MTX_ADR_ACK:
 i2ci_MTX_DATA_ACK:
 	ldd	temp,z+oi2c_bufcnt
-	cp	temp2,temp				
-	brsh	i2ci_12
+	cp	temp2,temp				;all bytes tranmited?
+	brsh	i2ci_12					; yes
 	add	zl,temp2
 	adc	zh,_0
 	inc	temp2
-	ldd	temp,z+oi2c_buf
+	ldd	temp,z+oi2c_buf				;next byte
 	outm8	TWDR,temp
 	ldi	temp,(1<<TWEN)|(1<<TWIE)|(1<<TWINT)
 	rjmp	i2ci_end
 
 i2ci_12:
-	std	z+oi2c_result,_255
-	rjmp	i2ci_default
+	std	z+oi2c_result,_0			;done
+	rjmp	i2ci_default				;stop transceiver
 
 i2ci_MRX_DATA_ACK:
 	add	zl,temp2
@@ -167,7 +174,7 @@ i2ci_32:
 	rjmp	i2ci_end
 
 i2ci_MRX_DATA_NACK:
-	std	z+oi2c_result,_255			;result = 1
+	std	z+oi2c_result,_0			;result = ok
 	add	zl,temp2
 	adc	zh,_0
 	inm8	temp,TWDR
@@ -194,22 +201,30 @@ i2c_init:
 	ldi	temp,I2C_BR
 	outm8	TWBR,temp
 	outm8	TWDR,_255			;
-	ldi	temp,(1<<TWEN)			;Enable TWI, disable Interupts.
+	ldi	temp,(1<<TWEN)			;Enable TWI, disable TWI interrupt.
 	outm8	TWCR,temp
 
-	ldi	temp,1
-	sts	i2c_result,temp
+	sts	i2c_result,_0
 	ret
 
 ;------------------------------------------------------------------
 
 i2c_waitready:
-	push	temp
-i2c_b:
+
+	ldi	temp,30
+	sts	delay_timer1,temp
+i2c_wrl:
 	inm8	temp,TWCR
 	andi	temp,(1<<TWIE)|(1<<TWSTO)
-	brne	i2c_b
-	pop	temp
+	breq	i2c_wre
+	lds	temp,delay_timer1
+	tst	temp
+	brne	i2c_wrl
+
+	ldi	temp,-2
+	sts	i2c_result,temp
+i2c_wre:
+	tst	temp
 	ret
 
 ;------------------------------------------------------------------
@@ -220,25 +235,16 @@ i2c_b:
 ;
 
 i2c_write:
-	rcall	i2c_waitready
 
+	rcall	i2c_waitready
+	brmi	i2c_we
 	push	zh
 	push	zl
 	push	xh
 	push	xl
 
-#if 0
-	rcall	printstr
-	.db	'\r', 'W', 0,0
-	mov 	temp,temp2
-	rcall	printhex
-	rcall	printstr
-	.db	": ", 0,0
-	rcall	dbg_hexdump_line
-#endif
-
 	ldiw	x,i2c_result
-	st	x+,_0				;result = 0
+	st	x+,_255				;result = not ok
 	st	x+,temp2			;store size
 	ld	temp,z+
 	cbr	temp,0x01
@@ -257,6 +263,7 @@ i2c_wle:
 	pop	xh
 	pop	zl
 	pop	zh
+i2c_we:
 	ret
 
 
@@ -269,14 +276,16 @@ i2c_wle:
 ;	temp:	return (fail = 0, else succsess)
 
 i2c_read:
+
 	rcall	i2c_waitready
+	brmi	i2c_re
 
 	push	zh
 	push	zl
 	push	xh
 	push	xl
 	ldiw	x,i2c_result
-	st	x+,_0				;result = 0
+	st	x+,_255				;result = not ok
 	st	x+,temp2			;store size
 	ld	temp,z
 	sbr	temp,0x01
@@ -288,18 +297,9 @@ i2c_read:
 
 	rcall	i2c_waitready
 
-#if 0
-	rcall	printstr
-	.db	'\r', 'R', 0,0
-	mov 	temp,temp2
-	rcall	printhex
-	rcall	printstr
-	.db	": ", 0,0
-#endif
-
 	lds	temp,i2c_result
-	tst	temp
-	breq	i2c_ex				;
+	sbrc	temp,7
+	rjmp	i2c_ex				;
 i2c_rl:
 	ld	temp,x+
 	st	z+,temp
@@ -307,14 +307,12 @@ i2c_rl:
 	brne	i2c_rl
 
 i2c_ex:
-	lds	temp,i2c_result
 	pop	xl
 	pop	xh
 	pop	zl
 	pop	zh
-#if 0
-	rcall	dbg_hexdump_line
-#endif
+i2c_re:
+	lds	temp,i2c_result
 	ret
 
 ;------------------------------------------------------------------
@@ -331,7 +329,7 @@ vi2c_addr:
 	.cseg
 
 vi2c_stat_get:
-	lds	temp,vi2c_stat
+	lds	temp,i2c_result
 	ret
 
 vi2c_param_get:
@@ -356,10 +354,12 @@ vi2c_param_set:
 ;
 
 vi2c_read:
+
 	rcall	i2c_waitready
+	brmi	vi2c_rex
 
 	ldiw	z,i2c_var
-	std	z+oi2c_result,_0		;result = 0
+	std	z+oi2c_result,_255		;result = not ok
 	lds	temp3,vi2c_blen
 	std	z+oi2c_bufcnt,temp3		;store size
 	adiw	z,oi2c_buf
@@ -376,15 +376,15 @@ vi2c_read:
 	rcall	i2c_waitready
 
 	lds	temp,i2c_result
-	tst	temp
-	breq	vi2c_ex				;
+	sbrc	temp,7
+	rjmp	vi2c_rex				;
 vi2c_rl:
 	ld	temp,z+
 	lcall	dram_write_pp
 	dec	temp3
 	brne	vi2c_rl
 
-vi2c_ex:
+vi2c_rex:
 	ret
 
 ;------------------------------------------------------------------
@@ -395,9 +395,11 @@ vi2c_ex:
 ;
 
 vi2c_write:
+
 	rcall	i2c_waitready
+	brmi	vi2c_wex
 	ldiw	z,i2c_var
-	std	z+oi2c_result,_0		;result = 0
+	std	z+oi2c_result,_255		;result = not ok
 	lds	temp3,vi2c_blen
 	std	z+oi2c_bufcnt,temp3		;store size
 	adiw	z,oi2c_buf
@@ -414,27 +416,23 @@ vi2c_wle:
 	; Enable TWI, TWI int and initiate start condition
 	ldi	temp,(1<<TWEN)|(1<<TWIE)|(1<<TWINT)|(1<<TWSTA)
 	outm8	TWCR,temp
-
+vi2c_wex:
 	ret
 
+;------------------------------------------------------------------
+
 
 vi2c_ctrl:
 	cpi	temp,1
 	brne	vi2c_c1
-	rcall	vi2c_read
-	rjmp	vi2c_ce0
+	rjmp	vi2c_read
+
 vi2c_c1:
 	cpi	temp,2
-	breq	vi2c_c2
-	ldi	temp,0xff
-	rjmp	vi2c_ce
+	brne	vi2c_c2
+	rjmp	vi2c_write
 vi2c_c2:
-	rcall	vi2c_write
-vi2c_ce0:
-	lds	temp,i2c_result
-	com	temp
 vi2c_ce:
-	sts	vi2c_stat,temp
 	ret
 
 ;------------------------------------------------------------------