X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/blobdiff_plain/cf6e81d85b1f79ff86d856950f3395cc1ff1c488..79986122b1d8a4aaf015b8d30f20e99d78779342:/avr/config.inc

diff --git a/avr/config.inc b/avr/config.inc
index afc89cc..5917a06 100644
--- a/avr/config.inc
+++ b/avr/config.inc
@@ -22,29 +22,31 @@
 ;
 
 
-#define VMAJOR 2		/* Version number */
-#define VMINOR 2
+#define VMAJOR 3		/* Version number */
+#define VMINOR 1
 
 #ifndef DRAM_8BIT
-  #define DRAM_8BIT 1		/* 1 = 8bit wide DRAM */
-#endif
+  #define DRAM_8BIT 1		/* 1 = 8bit wide data bus to DRAM (ie two 4-bit Chips)*/
+#endif				/* 0 = only one 4 bit wide DRAM chip */
 #ifndef F_CPU
   #define F_CPU  20000000	/* system clock in Hz; defaults to 20MHz */
 #endif
 #ifndef BAUD
   #define BAUD   38400		/* console baud rate */
 #endif
- 
-#define K 1024
-#define M 1024*K
+#ifndef I2C
+    #define I2C  0		/* I2C requires 8 bit DRAM */
+#endif
+#if I2C && !DRAM_8BIT
+  #error "I2C requires 8 bit DRAM (DRAM_8BIT=1)!"
+#endif
 
-;#define RAMSIZE 256*K*4	/* 1 chip 256Kx4 */
-#define  RAMSIZE   4*M*4 * 2	/* 2 chips 4Mx4  */
+#define EM_Z80	1		/* Emulate Z80 if true, else 8080 */
 
 #ifndef FAT16_SUPPORT
   #define FAT16_SUPPORT 1	/* Include Support for FAT16 Partitions */
 #endif				/*  which may contain CP/M image files. */ 
-#define RAMDISKCNT    0		/* Number of RAM disks */
+#define RAMDISKCNT    4		/* Number of RAM disks */
 #define RAMDISKNR     'I'-'A'	/* Drive "letter" for first RAM disk */
 
 #define PARTID 0x52		/* Partition table id */
@@ -57,10 +59,10 @@
 #define	RXBUFSIZE 128		/* USART recieve buffer size. Must be power of 2 */
 #define	TXBUFSIZE 128		/* USART transmit buffer size. Must be power of 2 */
 
+#define I2C_CLOCK  100000	/* 100kHz */
+#define I2C_BUFSIZE    17 	/* largest message size including address byte (SLA) */
 
 
-#define EM_Z80	0		/* we don't have any z80 instructions yet */
-
 .equ BOOTWAIT      = 1
 .equ MEMTEST       = 1
 .equ MEMFILL       = 1
@@ -75,10 +77,11 @@
 .equ INS_DEBUG     = 0
 .equ STACK_DBG     = 0
 .equ PRINT_PC      = 0
+.equ TIMER_DEBUG   = 0
 
 #define MMC_SPI2X  1		/* 0 = SPI CLK/4, 1 = SPI CLK/2 */
 
-#define MEMFILL_VAL      0xCB	/* Fill ram with cbs, which will trigger an invalid opcode error. */
+#define MEMFILL_VAL      0x76	/* Fill ram with HALT opcode. */
 #define DBG_TRACE_BOTTOM 0x01	/* Page boundaries for INS_DEBUG and PRINT_PC  */
 #define DBG_TRACE_TOP	 0xdc	/* Trace is off, below bottom page and above top page. */
 
@@ -120,6 +123,7 @@
 .equ P_MMC_CS	= PORTB
 .equ P_A8	= PORTB
 .equ P_RXD	= PORTB
+.equ P_TXD	= PORTB
 
 ;Port C
 .equ RAM_RAS	= 0
@@ -205,11 +209,12 @@
 .def	z_a	= r9
 ;.def	stx_bitcount  = r9
 ;.def	stx_dr	      = r10
+
 .def	srx_lastedgel = r10
 .def	srx_lastedgeh = r11
-
-.def	insstore= r8	;
+;.def	insstore= r8	;
 ;.def	insop	= r13	;
+
 .def	insdecl	= r12	;
 .def	insdech	= r13	;
 .def	z_spl	= r14
@@ -219,7 +224,7 @@
 .def	temp3	= r18
 .def	temp4	= r19
 .def	z_flags	= r20	;
-			;
+.def	intstat	= r21	; interpreter status / interrupt status
 .def	opl	= r22	;
 .def	oph	= r23	;
 .def	z_pcl	= r24	;
@@ -232,6 +237,9 @@
 ; zh		;r31	;
 
 
+.equ	i_break = 0			;break detected flag
+.equ	i_trace = 1			;cpu interpreter trace flag
+.equ	i_halt  = 2			;executing halt instruction
 
 #if defined __ATmega8__
 .equ	flags	= TWBR
@@ -246,19 +254,53 @@
 	.equ	hostwrt	= 6		;host written flag
 	.equ	rsflag	= 5		;read sector flag
 	.equ	readop	= 4		;1 if read operation
-	.equ	trace	= 0
+
+	.equ	prefixfd = 1		;Opcode prefix DD=0, FD=1
+	.equ	trace	 = 0
 
 ; This is the base z80 port address for clock access
 #define	TIMERPORT   0x40
 #define TIMER_CTL   TIMERPORT
 #define TIMER_MSECS TIMERPORT+1
 #define TIMER_SECS  TIMER_MSECS+2
+#define	CLOCKPORT   TIMERPORT+7
 
 #define starttimercmd	1
 #define quitTimerCmd	2
 #define printTimerCmd	15
 #define uptimeCmd	16
 
+#define DEBUGPORT   0x4F
+
+#define startTraceCmd 1
+#define stopTraceCmd  0
+
+; Virtual I2C Interface
+#define I2CSTAT	0x05
+#define I2CCTRL	0x05
+#define I2CBLEN	0x06
+#define I2CADR	0x07
+#define I2CADRL	0x07
+#define I2CADRH	0x08
+
+; Port-Expander PCF8574
+#define PORT	0x80
+#define PORT0	0x80
+#define PORT1	0x81
+#define PORT2	0x82
+#define PORT3	0x83
+#define PORT4	0x84
+#define PORT5	0x85
+#define PORT6	0x86
+#define PORT7	0x87
+
+
+#if EM_Z80
+  #define CPUSTR "Z80"
+#else
+  #define CPUSTR "8080"
+#endif
+
 #if defined __ATmega8__
 .equ	RXTXDR0	= UDR
 .equ	UCSR0A	= UCSRA
@@ -288,4 +330,3 @@
 
 ; vim:set ts=8 noet nowrap
 
-