From: Leo <erbl259-lmu@yahoo.de>
Date: Sun, 4 Jul 2010 18:13:12 +0000 (+0000)
Subject: use lookup table for parity flag computation
X-Git-Tag: forum-2010-07-01~4
X-Git-Url: http://cloudbase.mooo.com/gitweb/avrcpm.git/commitdiff_plain/37617bd8cf0870c2b8566694a5038a1d0a2716a2

use lookup table for parity flag computation
as we now have the table, use it for sign and zero flag too
changed flags to 8080 behavior
DRAM read/write routines changed to use A8 to select low/high nibble.
added USART RX buffer with Interrupt
added timer routines
more magic number eliminations

git-svn-id: svn://cu.loc/avr-cpm/trunk@6 57430480-672e-4586-8877-bcf8adbbf3b7
---

diff --git a/avrcpm/avr/z80.asm b/avrcpm/avr/z80.asm
index 9911e8c..873c922 100755
--- a/avrcpm/avr/z80.asm
+++ b/avrcpm/avr/z80.asm
@@ -16,17 +16,23 @@
 ;    You should have received a copy of the GNU General Public License
 ;    along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
-
+;.nolist
 #if defined atmega8
 	.include "m8def.inc"
-
-#elif defined atmega48
-	.include "m48def.inc"
+#elif defined atmega168
+	.include "m8def.inc"
 #else                               /* default */
 	.include "m88def.inc"
 	;FUSE_H=0xDF
 	;FUSE_L=0xF7
 #endif
+.list
+
+
+#ifndef DRAM_DQ_ORDER			/* If this is set to 1, the portbits  */
+	#define DRAM_DQ_ORDER 0		/* for DRAM D1 and WE are swapped.    */
+#endif
+
 
 #ifndef F_CPU
 	#define F_CPU  20000000        /* system clock in Hz; defaults to 20MHz */
@@ -35,10 +41,13 @@
 	#define BAUD   38400           /* console baud rate */
 #endif
  
-; 
-.equ UBRR_VAL   = ((F_CPU+BAUD*8)/(BAUD*16)-1)  ; clever rounding
 
-#define REFR_RATE   64000       /* dram refresh rate. most drams need 1/15.6µs */
+#define UBRR_VAL  ((F_CPU+BAUD*8)/(BAUD*16)-1)  /* clever rounding */
+
+#define	RXBUFSIZE 64		/* USART recieve buffer size. Must be power of 2 */
+
+#define REFR_RATE   64000       /* dram refresh rate in cycles/s. */
+				/* Most drams need 1/15.6µs. */
 #define REFR_PRE    8           /* timer prescale factor */
 #define REFR_CS     0x02        /* timer clock select for 1/8  */
 #define REFR_CNT    F_CPU / REFR_RATE / REFR_PRE
@@ -51,10 +60,12 @@
 #endif
 
 
+#define EM_Z80	0	/* we don't have any z80 instructions yet */
+
 .equ MMC_DEBUG   = 0
 .equ INS_DEBUG   = 0
-.equ MEMTEST     = 0
-.equ BOOTWAIT    = 0
+.equ MEMTEST     = 1
+.equ BOOTWAIT    = 1
 .equ PORT_DEBUG  = 0
 .equ DISK_DEBUG  = 0
 .equ MEMFILL_CB  = 1
@@ -73,26 +84,40 @@
 .equ ram_a6 = 6
 .equ ram_a7 = 7
 
+.equ RAM_AH_MASK = 0xE0             ; ram_a[7..5]
+.equ PD_OUTPUT_MASK = 0xFE
+
 
 ;Port B
-.equ ram_a4	=	0
-.equ ram_a3	=	1
-.equ ram_a2	=	2
-.equ ram_a1	=	3
-.equ mmc_mosi=	3
-.equ ram_a0	=	4
-.equ mmc_miso=	4
-.equ ram_ras=	5
-.equ mmc_sck=	5
+.equ ram_a4 =	0
+.equ ram_a3 =	1
+.equ ram_a2 =	2
+.equ ram_a1 =	3
+.equ mmc_mosi =	3
+.equ ram_a0 =	4
+.equ mmc_miso =	4
+.equ ram_ras =	5
+.equ mmc_sck =	5
+
+.equ RAM_AL_MASK = 0x1F             ; ram_a[4..0]
+.equ PB_OUTPUT_MASK = 0x3F
 
 ;Port C
-.equ ram_d1	=	0
-.equ ram_w	=	1
-.equ ram_d2	=	2
-.equ ram_d4 =	3
-.equ ram_d3	=	4
+#if DRAM_DQ_ORDER == 1
+.equ ram_d1 =	1
+.equ ram_w  =	4
+#else /* original */
+.equ ram_d1 =	4
+.equ ram_w  =	1
+#endif
+.equ ram_d0 =	0
+.equ ram_d2 =	2
+.equ ram_d3 =	3
 .equ ram_cas=	5
 
+.equ RAM_DQ_MASK = (1<<ram_d3)|(1<<ram_d2)|(1<<ram_d1)|(1<<ram_d0)
+.equ PC_OUTPUT_MASK = (1<<ram_cas)|(1<<ram_w)
+
 
 ;Flag bits in z_flags
 .equ ZFL_S	=	7
@@ -118,7 +143,7 @@
 .def dsk_dmah = r13
 .def dsk_dmal = r14
 
-.def parityb  = r15
+;.def parityb  = r15
 
 .def temp     = R16 	;The temp register
 .def temp2    = R17 	;Second temp register
@@ -130,12 +155,28 @@
 .def insdecl  = r23
 .def z_pcl    = r24
 .def z_pch    = r25
+.undef xl
+.undef xh
 .def insdech  = r26
 .def z_flags  = r27
 
 
-;SRAM
-.dseg
+; This is the base z80 port address for clock access
+#define	TIMERPORT 0x40
+#define TIMER_CTL   TIMERPORT
+#define TIMER_MSECS TIMERPORT+1
+#define TIMER_SECS  TIMER_MSECS+2
+
+#define starttimercmd	1
+#define quitTimerCmd	2
+#define printTimerCmd	15
+#define uptimeCmd	16
+
+
+
+	;SRAM
+	.dseg
+	
 ;Sector buffer for 512 byte reads/writes from/to SD-card
 
 sectbuff:
@@ -146,9 +187,16 @@ sectbuff:
 .org 0
 	rjmp start		; reset vector
 .org refr_vect
-	rjmp refrint	; tim2cmpa
-
+	rjmp refrint		; tim2cmpa
+.org OC1Aaddr   		; Timer/Counter1 Compare Match A
+    	rjmp sysclockint	; 1ms system timer
+.org URXCaddr   
+	rjmp rxint		; USART receive int.
+;.org UDREaddr
+;	rjmp txint
+	
 .org INT_VECTORS_SIZE
+
 start:
 	ldi temp,low(RAMEND)	; top of memory
 	out SPL,temp		; init stack pointer
@@ -176,11 +224,11 @@ start:
 #endif
 
 ; - Setup Ports
-	ldi temp,$3F
+	ldi temp,PB_OUTPUT_MASK
 	out DDRB,temp
-	ldi temp,$FE
+	ldi temp,PD_OUTPUT_MASK
 	out DDRD,temp
-	ldi temp,$22
+	ldi temp,PC_OUTPUT_MASK
 	out DDRC,temp
 
 	sbi PORTC,ram_w
@@ -191,8 +239,15 @@ start:
 
 
 ; - Init serial port
+
+	ldi	temp,0		; reset receive buffer
+	sts	rxcount,temp
+	sts	rxidx_r,temp
+	sts	rxidx_w,temp
+	
+
 #if defined __ATmega8__
-	ldi temp, (1<<TXEN) | (1<<RXEN)
+	ldi temp, (1<<TXEN) | (1<<RXEN) | (1<<RXCIE)
 	out UCSRB,temp
 	ldi temp, (1<<URSEL) | (1<<UCSZ1) | (1<<UCSZ0)
 	out UCSRC,temp
@@ -201,7 +256,7 @@ start:
 	ldi temp, LOW(UBRR_VAL)
 	out UBRRL,temp
 #else
-	ldi temp, (1<<TXEN0) | (1<<RXEN0)
+	ldi temp, (1<<TXEN0) | (1<<RXEN0) | (1<<RXCIE0)
 	sts UCSR0B,temp
 	ldi temp, (1<<UCSZ01) | (1<<UCSZ00)
 	sts UCSR0C,temp
@@ -214,14 +269,14 @@ start:
 ;Init timer2. Refresh-call should happen every (8ms/512)=312 cycles.
 
 #ifdef __ATmega8__
-	ldi temp,REFR_CNT
+	ldi temp,REFR_CNT*2             ; 2 cycles per int
 	out OCR2,temp
 	ldi temp,(1<<WGM21) | REFR_CS	;CTC, clk/REFR_PRE
 	out TCCR2,temp
 	ldi temp, (1<<OCIE2)
 	out TIMSK,temp
 #else
-	ldi temp,REFR_CNT ;=312 cycles
+	ldi temp,REFR_CNT 		;=312 cycles
 	sts OCR2A,temp
 	ldi temp, (1<<WGM21)
 	sts TCCR2A,temp
@@ -230,21 +285,56 @@ start:
 	ldi temp,(1<<OCIE2A)
 	sts TIMSK2,temp
 #endif
+
+
+; Init clock/timer system
+
+	ldi	zl,low(timer_base)
+	ldi	zh,high(timer_base)
+	ldi	temp,0
+	ldi	temp2,timer_size
+ti_loop:
+	st	z+,temp
+	dec	temp2
+	brne	ti_loop
+
+; Init timer 1 as 1 ms system clock tick.
+
+#ifdef __ATmega8__
+	ldi	temp,high(F_CPU/1000)
+	out	OCR1AH,temp
+	ldi	temp,low(F_CPU/1000)
+	out	OCR1AL,temp
+	ldi	temp,(1<<WGM12) | (1<<CS10)	;CTC, clk/1
+	out	TCCR1B,temp
+	in	temp,TIMSK
+	ori	temp,(1<<OCIE1A)
+	out	TIMSK,temp
+#else
+	ldi	temp,high(F_CPU/1000)
+	sts	OCR1AH,temp
+	ldi	temp,low(F_CPU/1000)
+	sts	OCR1AL,temp
+	ldi	temp,(1<<WGM12) | (1<<CS10)	;CTC, clk/1
+	sts	TCCR1B,temp
+	lds	temp,TIMSK1
+	ori	temp,(1<<OCIE1A)
+	sts	TIMSK1,temp
+#endif
 	sei
 
 
 .if BOOTWAIT
-	push temp
-	ldi temp,0
-bootwait1:
-	push temp
 	ldi temp,0
-bootwait2:
-	dec temp
-	brne bootwait2
-	pop temp
-	dec temp
-	brne bootwait1
+bootwait1:			
+	push temp		;2
+	ldi temp,0		;1
+bootwait2:			
+	dec temp		;1
+	brne bootwait2		;2
+	pop temp		;2
+	dec temp		;1
+	brne bootwait1		;2   (3*256 + 5) * 256 = 198K cycles
 
 .endif
 
@@ -447,7 +537,6 @@ notrace2:
 	ldi zh,high(fetchjumps*2)
 	add zl,temp
 	adc zh,temp2
-
 	lpm temp,Z+
 	lpm temp2,Z
 	mov zl,temp
@@ -506,7 +595,6 @@ nooper:
 	andi temp,0x0E
 	andi insdech,0x30
 	or temp,insdech
-	cpi temp,0
 	breq nostore
 	ldi zl,low(storejumps*2)
 	ldi zh,high(storejumps*2)
@@ -561,6 +649,15 @@ portRead:
 	breq conStatus
 	cpi temp2,1
 	breq conInp
+
+	cpi	temp2,TIMER_MSECS
+	brlo	pr_noclock
+	cpi	temp2,TIMER_MSECS+6
+	brsh	pr_noclock
+	rjmp	clockget
+
+pr_noclock:
+	ldi	temp,0xFF
 	ret
 
 ;Called with port in temp2 and value in temp.
@@ -579,17 +676,22 @@ portWrite:
 	breq dskDmaH
 	cpi temp2,22
 	breq dskDoIt
+	
+	cpi	temp2,TIMERPORT
+	brlo	pw_noclock
+	cpi	temp2,TIMER_MSECS+6
+	brsh	pw_noclock
+	rjmp	clockput
+
+pw_noclock:
 	ret
 
 
 conStatus:
-	ldi temp,0
-#if defined __ATmega8__
-    sbic  UCSRA,RXC
-#else
-	lds temp2,UCSR0A
-	sbrc temp2,RXC0
-#endif
+
+	lds temp,rxcount
+	tst temp
+	breq PC+2
 	 ldi temp,0xff
 	ret
 
@@ -609,6 +711,8 @@ conOut:
 	rcall uartputc
 	ret
 
+
+
 dskTrackSel:
 	mov dsk_trk,temp
 	ret
@@ -805,6 +909,7 @@ dskDoItWriteMemLoop:
 
 	;All done :)
 	ret
+	
 
 ; ----------------- MMC/SD routines ------------------
 
@@ -1111,63 +1216,84 @@ resetwait:
 
 ; ------------------ DRAM routines -------------
 
+; TODO: 
+
+#if DRAM_DQ_ORDER == 1
+ #define CLASSIC_DRAM 0
+#else
+ #define CLASSIC_DRAM 1		/* Change manualy, if you want new hw w/ old sw */
+#endif
+
+
+#if DRAM_DQ_ORDER == 0
+ #if CLASSIC_DRAM == 1
+   #error "Old harware can not work with new software!"
+ #endif
+#endif
+
+; ****************************************************************************
+
+#if CLASSIC_DRAM
+
+; ********************** DRAM routines from Sprite_tm ************************
+
 ;Sends the address in zh:zl to the ram
 dram_setaddr:
 	push temp
-	in temp,PORTD
+	in temp,portd
 	andi temp,0x17
-	out PORTD,temp
-	in temp,PORTB
+	out portd,temp
+	in temp,portb
 	andi temp,0xE0
-	out PORTB,temp
+	out portb,temp
 	sbrc zl,0
-	 sbi PORTB,ram_a0
+	 sbi portb,ram_a0
 	sbrc zl,1
-	 sbi PORTB,ram_a1
+	 sbi portb,ram_a1
 	sbrc zl,2
-	 sbi PORTB,ram_a2
+	 sbi portb,ram_a2
 	sbrc zl,3
-	 sbi PORTB,ram_a3
+	 sbi portb,ram_a3
 	sbrc zl,4
-	 sbi PORTB,ram_a4
+	 sbi portb,ram_a4
 	sbrc zl,5
-	 sbi PORTD,ram_a5
+	 sbi portd,ram_a5
 	sbrc zl,6
-	 sbi PORTD,ram_a6
+	 sbi portd,ram_a6
 	sbrc zl,7
-	 sbi PORTD,ram_a7
+	 sbi portd,ram_a7
 	sbrc zh,0
-	 sbi PORTD,ram_a8
+	 sbi portd,ram_a8
 	pop temp
 	ret
 
 dram_getnibble:
 	andi temp,0xf0
-	sbic pinc,ram_d1
+	sbic pinc,ram_d0
 	 ori temp,0x1
-	sbic pinc,ram_d2
+	sbic pinc,ram_d1
 	 ori temp,0x2
-	sbic pinc,ram_d3
+	sbic pinc,ram_d2
 	 ori temp,0x4
-	sbic pinc,ram_d4
+	sbic pinc,ram_d3
 	 ori temp,0x8
 	ret
 
 dram_sendnibble:
 	push temp2
-	in temp2,PORTC
-	andi temp2,0xE2
+	in temp2,portc
+	andi temp2,~RAM_DQ_MASK
 
 	sbrc temp,0
-	 ori temp2,(1<<ram_d1)
+	 ori temp2,(1<<ram_d0)
 	sbrc temp,1
-	 ori temp2,(1<<ram_d2)
+	 ori temp2,(1<<ram_d1)
 	sbrc temp,2
-	 ori temp2,(1<<ram_d3)
+	 ori temp2,(1<<ram_d2)
 	sbrc temp,3
-	 ori temp2,(1<<ram_d4)
+	 ori temp2,(1<<ram_d3)
 
-	out PORTC,temp2
+	out portc,temp2
 	pop temp2
 	ret
 
@@ -1183,38 +1309,38 @@ dram_read:
 	rol zh
 	;z=addr[15-7]
 	rcall dram_setaddr
-	cbi PORTB,ram_ras
+	cbi portb,ram_ras
 
 	ldi zh,0
 	mov zl,adrl
 	andi zl,0x7F
 	rcall dram_setaddr
 	nop
-	cbi PORTC,ram_cas
+	cbi portc,ram_cas
 	nop
 	nop
-	cbi PORTD,ram_oe
+	cbi portd,ram_oe
 	nop
 	rcall dram_getnibble	
-	sbi PORTD,ram_oe
+	sbi portd,ram_oe
 	swap temp
-	sbi PORTC,ram_cas
+	sbi portc,ram_cas
 
 	ldi zh,0
 	mov zl,adrl
 	ori zl,0x80
 	rcall dram_setaddr
 	nop
-	cbi PORTC,ram_cas
+	cbi portc,ram_cas
 	nop
-	cbi PORTD,ram_oe
+	cbi portd,ram_oe
 	nop
 	nop
 	rcall dram_getnibble	
 
-	sbi PORTD,ram_oe
-	sbi PORTC,ram_cas
-	sbi PORTB,ram_ras
+	sbi portd,ram_oe
+	sbi portc,ram_cas
+	sbi portb,ram_ras
 	sei
 	ret
 
@@ -1223,7 +1349,7 @@ dram_write:
 	cli
 
 	in temp2,ddrc
-	ori temp2,0x1d
+	ori temp2,RAM_DQ_MASK
 	out ddrc,temp2
 
 	rcall dram_sendnibble
@@ -1238,7 +1364,7 @@ dram_write:
 	rcall dram_setaddr
 	nop
 	nop
-	cbi PORTB,ram_ras
+	cbi portb,ram_ras
 
 	ldi zh,0
 	mov zl,adrl
@@ -1246,15 +1372,15 @@ dram_write:
 	rcall dram_setaddr
 	nop
 	nop
-	cbi PORTC,ram_cas
+	cbi portc,ram_cas
 	nop
 	nop
-	cbi PORTC,ram_w
+	cbi portc,ram_w
 	nop
 	nop
 	nop
-	sbi PORTC,ram_w
-	sbi PORTC,ram_cas
+	sbi portc,ram_w
+	sbi portc,ram_cas
 
 
 	ldi zh,0
@@ -1263,59 +1389,610 @@ dram_write:
 	rcall dram_setaddr
 	swap temp
 	rcall dram_sendnibble
-	cbi PORTC,ram_cas
+	cbi portc,ram_cas
+	nop
 	nop
+	cbi portc,ram_w
 	nop
-	cbi PORTC,ram_w
 	nop
+	sbi portc,ram_w
 	nop
+	nop
+	sbi portc,ram_cas
+	sbi portb,ram_ras
+
+	in temp,ddrc
+	andi temp,~RAM_DQ_MASK
+	out ddrc,temp
+	in temp,portc
+	andi temp,~RAM_DQ_MASK
+	out portc,temp
+	sei
+	ret
+#endif  /* CLASSIC_DRAM == 1 */
+
+; ****************************************************************************
+
+#if ! CLASSIC_DRAM
+
+; ***************************** New DRAM routines ****************************
+
+; Defines how the dram nibbles are arganized.
+; RAMORG == 0 : A7 == 0: low nibble, A7 == 1: high nibble (Original Sprite_tm design)
+; RAMORG == 1 : A8 == 0: low nibble, A8 == 1: high nibble (faster)
+; 
+#define RAMORG 1
+
+#if RAMORG == 0
+;Sends the address in zh:zl to the ram
+dram_setaddr:
+	push temp
+	in temp,PORTB
+	andi temp,~RAM_AL_MASK
+	sbrc zl,0
+	 ori temp,(1<<ram_a0)
+	sbrc zl,1
+	 ori temp,(1<<ram_a1)
+	sbrc zl,2
+	 ori temp,(1<<ram_a2)
+	sbrc zl,3
+	 ori temp,(1<<ram_a3)
+	sbrc zl,4
+	 ori temp,(1<<ram_a4)
+	out PORTB,temp
+
+	in temp,PORTD
+	andi temp,~RAM_AH_MASK
+	sbrc zl,5
+	 ori temp,(1<<ram_a5)
+	sbrc zl,6
+	 ori temp,(1<<ram_a6)
+	sbrc zl,7
+	 ori temp,(1<<ram_a7)
+	sbrc zh,0
+	 ori temp,(1<<ram_a8)
+	out PORTD,temp
+	pop temp
+#else /* RAMORG == 1 */
+.macro DRAM_SETADDR
+	push temp
+	in temp,PORTB
+	andi temp,~RAM_AL_MASK
+	sbrc @0,0
+	 ori temp,(1<<ram_a0)
+	sbrc @0,1
+	 ori temp,(1<<ram_a1)
+	sbrc @0,2
+	 ori temp,(1<<ram_a2)
+	sbrc @0,3
+	 ori temp,(1<<ram_a3)
+	sbrc @0,4
+	 ori temp,(1<<ram_a4)
+	out PORTB,temp
+
+	in temp,PORTD
+	andi temp,~RAM_AH_MASK
+	sbrc @0,5
+	 ori temp,(1<<ram_a5)
+	sbrc @0,6
+	 ori temp,(1<<ram_a6)
+	sbrc @0,7
+	 ori temp,(1<<ram_a7)
+	out PORTD,temp
+	pop temp
+.endm
+	ret
+#endif /* RAMORG */
+
+.macro DRAM_SENDNIBBLE
+	in temp2,PORTC
+	andi temp2,~RAM_DQ_MASK
+	andi temp,RAM_DQ_MASK
+	or  temp2,temp
+	out PORTC,temp2
+.endm
+
+
+;Loads the byte on address adrh:adrl into temp.
+;must not alter adrh:adrl
+
+dram_read:
+	cli
+#if RAMORG == 0
+	mov zl,adrh
+	ldi zh,0
+	mov temp2,adrl
+	lsl temp2
+	rol zl
+	rol zh
+	;z=addr[15-7]
+	rcall dram_setaddr
+	cbi PORTB,ram_ras
+
+	ldi zh,0
+	mov zl,adrl
+	andi zl,0x7F
+	rcall dram_setaddr
+	cbi PORTC,ram_cas
+	cbi PORTD,ram_oe
+	ldi zh,0
+	in  temp,PINC
+	andi temp,0x0f
+	swap temp
+	sbi PORTC,ram_cas
+
+	mov zl,adrl
+	ori zl,0x80
+	rcall dram_setaddr
+	cbi PORTC,ram_cas
+	nop
+	in  temp2,PINC
+	andi temp2,0x0f
+	or  temp,temp2
+
+	sbi PORTD,ram_oe
+	sbi PORTC,ram_cas
+	sbi PORTB,ram_ras
+#else
+	cbi PORTD,ram_a8
+	DRAM_SETADDR adrh
+	cbi PORTB,ram_ras
+
+	DRAM_SETADDR adrl
+	cbi PORTC,ram_cas
+	cbi PORTD,ram_oe
+	nop
+	in  temp,PINC
+	andi temp,0x0f
+	swap temp
+	sbi PORTC,ram_cas
+
+	sbi PORTD,ram_a8
+	cbi PORTC,ram_cas
+	nop
+	in  temp2,PINC
+	andi temp2,0x0f
+	or  temp,temp2
+	swap temp
+
+	sbi PORTD,ram_oe
+	sbi PORTC,ram_cas
+	sbi PORTB,ram_ras
+#endif
+	sei
+	ret
+
+
+;Writes the byte in temp to  adrh:adrl
+;must not alter adrh:adrl
+
+dram_write:
+	cli
+#if RAMORG == 0
+	in temp2,DDRC               ;DRAM data ports as outputs
+	ori temp2,RAM_DQ_MASK
+	out DDRC,temp2
+
+	push temp
+	DRAM_SENDNIBBLE
+	pop temp
+
+	mov zl,adrh
+	ldi zh,0
+	mov temp2,adrl
+	lsl temp2
+	rol zl
+	rol zh
+	;z=addr[15-7]
+	rcall dram_setaddr
+	cbi PORTB,ram_ras
+
+	ldi zh,0
+	mov zl,adrl
+	ori zl,0x80
+	cbi PORTC,ram_w             ;early write
+	rcall dram_setaddr
+	cbi PORTC,ram_cas
+	sbi PORTC,ram_cas
+
+	ldi zh,0
+	mov zl,adrl
+	andi zl,0x7F
+	rcall dram_setaddr
+	swap temp
+
+	DRAM_SENDNIBBLE
+
+	cbi PORTC,ram_cas
+	sbi PORTC,ram_cas
 	sbi PORTC,ram_w
+	sbi PORTB,ram_ras
+
+	in temp,DDRC
+	andi temp,~RAM_DQ_MASK
+	out DDRC,temp
+	in temp,PORTC
+	andi temp,~RAM_DQ_MASK
+	out PORTC,temp
+#else /* RAMORG == 1 */
+	in temp2,DDRC               ;DRAM data ports as outputs
+	ori temp2,RAM_DQ_MASK
+	out DDRC,temp2
+
+	push temp
+	DRAM_SENDNIBBLE
+	pop temp
+
+	cbi PORTD,ram_a8
+	DRAM_SETADDR adrh
+	cbi PORTB,ram_ras
+
+	cbi PORTC,ram_w             ;early write
+	DRAM_SETADDR adrl
+	cbi PORTC,ram_cas
+	sbi PORTC,ram_cas
+
+	sbi PORTD,ram_a8
+	swap temp
+
+	DRAM_SENDNIBBLE
+
+	cbi PORTC,ram_cas
 	nop
+	sbi PORTC,ram_cas
+	sbi PORTC,ram_w
+	sbi PORTB,ram_ras
+
+	in temp,DDRC
+	andi temp,~RAM_DQ_MASK
+	out DDRC,temp
+	in temp,PORTC
+	andi temp,~RAM_DQ_MASK
+	out PORTC,temp
+#endif /* RAMORG */
+	sei
+	ret
+
+#endif  /* CLASSIC_DRAM == 0 */
+
+; ****************************************************************************
+
+; refresh interupt; exec 2 cbr cycles
+refrint:
+	cbi PORTC,ram_cas
+	cbi PORTB,ram_ras
 	nop
+	sbi PORTB,ram_ras
+	cbi PORTB,ram_ras
 	sbi PORTC,ram_cas
 	sbi PORTB,ram_ras
+	reti
+
+; ****************************************************************************
+
+; ------------- system timer 10ms ---------------
+    .dseg
+
+timer_base:
+timer_ms:
+	.byte	2
+timer_s:
+	.byte	4
+; don't change order here, clock put/get depends on it.
+cntms_out:		; register for ms
+	.byte	2
+utime_io:		; register for uptime. 
+	.byte	4	
+cnt_1ms:
+	.byte	2
+uptime:
+	.byte	4
+timer_top:
+	.equ timer_size = timer_top - timer_base
+	
+	.equ clkofs = cnt_1ms-cntms_out
+	.equ timerofs = cnt_1ms-timer_ms
+ 
+    .cseg	
+sysclockint:
+	push    zl
+	in      zl,SREG
+	push    zl
+	push	zh
+	
+	lds     zl,cnt_1ms
+	lds     zh,cnt_1ms+1
+	adiw	z,1
+	
+	sts	cnt_1ms,zl
+	sts	cnt_1ms+1,zh
+	cpi	zl,low(1000)
+	ldi	zl,high(1000)		;doesn't change flags
+	cpc	zh,zl
+	brlo	syscl_end
+	
+	ldi	zl,0
+	sts	cnt_1ms,zl
+	sts	cnt_1ms+1,zl
+
+	lds	zl,uptime+0
+	inc	zl
+	sts	uptime+0,zl
+	brne	syscl_end
+	lds	zl,uptime+1
+	inc	zl
+	sts	uptime+1,zl
+	brne	syscl_end
+	lds	zl,uptime+2
+	inc	zl
+	sts	uptime+2,zl
+	brne	syscl_end
+	lds	zl,uptime+3
+	inc	zl
+	sts	uptime+3,zl
+	
+syscl_end:
+	pop	zh
+	pop     zl
+	out     SREG,zl
+	pop     zl
+	reti
+
+
+clockget:
+	ldi	temp,0xFF
+	subi	temp2,TIMER_MSECS
+	brcs	clkget_end		;Port number in range?
+	ldi	zl,low(cntms_out)
+	ldi	zh,high(cntms_out)
+	breq	clkget_copy		;lowest byte requestet, latch clock
+	cpi	temp2,6
+	brsh	clkget_end		;Port number to high?
+	
+	add	zl,temp2
+	brcc	PC+2
+	 inc	zh
+	ld	temp,z
+clkget_end:
+	ret
+	
+	
+		
+clkget_copy:
+	ldi	temp2,6
+	cli
+clkget_l:
+	ldd	temp,z+clkofs
+	st	z+,temp
+	dec	temp2
+	brne	clkget_l
+	sei
+	lds	temp,cntms_out
+					;req. byte in temp
+	ret
+
+clockput:
+	subi	temp2,TIMERPORT
+	brcs	clkput_end		;Port number in range?
+	brne	clkput_1
+	
+	; clock control
+
+	cpi	temp,starttimercmd
+	breq	timer_start
+	cpi	temp,quitTimerCmd
+	breq	timer_quit
+	cpi	temp,printTimerCmd
+	breq	timer_print
+	cpi	temp,uptimeCmd
+	brne	cp_ex
+	rjmp	uptime_print
+cp_ex:
+	ret	
+	
+timer_quit:
+	rcall	timer_print
+	rjmp	timer_start
+
+clkput_1:
+	dec	temp2
+	ldi	zl,low(cntms_out)
+	ldi	zh,high(cntms_out)
+	breq	clkput_copy		;lowest byte requestet, latch clock
+	cpi	temp2,6
+	brsh	clkput_end		;Port number to high?
+	
+	add	zl,temp2
+	 brcc	PC+2
+	inc	zh
+	st	z,temp
+clkput_end:
+	ret
+		
+clkput_copy:
+	st	z,temp
+	adiw	z,5
+	ldi	temp2,6
+	cli
+clkput_l:
+	ldd	temp,z+clkofs
+	st	z+,temp
+	dec	temp2
+	brne	clkput_l
+	sei
+	ret
+
+; start/reset timer
+;
+timer_start:
+	ldi	zl,low(timer_ms)
+	ldi	zh,high(timer_ms)
+	ldi	temp2,6
+	cli
+ts_loop:
+	ldd	temp,z+timerofs
+	st	z+,temp
+	dec	temp2
+	brne	ts_loop
+	sei
+	ret
+
+
+; print timer
+;
+	
+timer_print:
+	push	adrh
+	push	adrl
+	push	oph
+	push	opl
+	ldi	zl,low(timer_ms)
+	ldi	zh,high(timer_ms)
+
+; put ms on stack (16 bit)
+
+	cli
+	ldd	adrl,z+timerofs
+	ld	temp2,z+
+	sub	adrl,temp2
+	ldd	adrh,z+timerofs
+	ld	temp2,z+
+	sbc	adrh,temp2
+	brsh	tp_s
+	
+	subi	adrl,low(-1000)
+	sbci	adrh,high(-1000)
+	sec	
+tp_s:
+	push	adrh
+	push	adrl
+
+; 
+	
+	ldd	temp,z+timerofs
+	ld	adrl,z+
+	sbc	temp,adrl
+
+	ldd	temp2,z+timerofs
+	ld	adrh,z+
+	sbc	temp2,adrh
+
+	ldd	opl,z+timerofs
+	ld	adrl,z+
+	sbc	opl,adrl
 
-	in temp,ddrc
-	andi temp,0xE2
-	out ddrc,temp
-	in temp,PORTC
-	andi temp,0xE2
-	out PORTC,temp
 	sei
+	ldd	oph,z+timerofs
+	ld	adrh,z+
+	sbc	oph,adrh
+	
+	rcall printstr
+	.db 13,"Timer running. Elapsed: ",0
+	rcall	print_ultoa
+
+	rcall printstr
+	.db ",",0
+	ldi	opl,0
+	ldi	oph,0
+	pop	temp
+	pop	temp2
+	rcall	print_ultoa
+	rcall printstr
+	.db "s. ",0,0
+
+	pop	opl
+	pop	oph
+	pop	adrl
+	pop	adrh
 	ret
+	
+uptime_print:
 
-refrint:
-	nop
-;	nop
-;	nop
-	cbi PORTC,ram_cas
-;	nop
-;	nop
-;	nop
-;	nop
-	cbi PORTB,ram_ras
-	nop
-;	nop
-;	nop
-;	nop
-	sbi PORTC,ram_cas
-;	nop
-;	nop
-;	nop
-;	nop
-	sbi PORTB,ram_ras
-;	nop
-;	nop
-;	nop
-;	nop
-;	nop
-	reti
+	push	oph
+	push	opl
+	ldi	zl,low(cnt_1ms)
+	ldi	zh,high(cnt_1ms)
 	
+	cli
+	ld	temp,z+
+	push	temp
+	ld	temp,z+
+	push	temp
+	
+	ld	temp,z+
+	ld	temp2,z+
+	ld	opl,z+
+	sei
+	ld	oph,z+
+	
+	rcall printstr
+	.db 13,"Uptime: ",0
+	
+	rcall	print_ultoa
+	rcall printstr
+	.db ",",0
+
+	ldi	opl,0
+	ldi	oph,0
+	pop	temp2
+	pop	temp
+	rcall print_ultoa
+	rcall printstr
+	.db "s.",0,0
 
+	pop	opl
+	pop	oph
+	ret
 
 
+	
 ; --------------- Debugging stuff ---------------
 
+;Print a unsigned lonng value to the uart
+; oph:opl:temp2:temp = value
+
+print_ultoa:
+	push	adrh
+	push	adrl
+	push	yl
+				
+	clr	adrl		;adrl = stack level
+
+ultoa1:	ldi	yl, 32		;adrh = oph:temp % 10
+	clr	adrh		;oph:temp /= 10
+ultoa2:	lsl	temp	
+	rol	temp2	
+	rol	opl	
+	rol	oph	
+	rol	adrh	
+	cpi	adrh,10	
+	brcs	ultoa3	
+	subi	adrh,10	
+	inc	temp
+ultoa3:	dec	yl	
+	brne	ultoa2
+	cpi	adrh, 10	;adrh is a numeral digit '0'-'9'
+	subi	adrh, -'0'
+	push	adrh		;Stack it
+	inc	adrl	
+	ldi	yl,0
+	cp	temp,yl		;Repeat until oph:temp gets zero
+	cpc	temp2,yl
+	cpc	opl,yl	
+	cpc	oph,yl	
+	brne	ultoa1	
+
+ultoa6:	pop	temp		;Flush stacked digits
+	rcall	uartputc
+	dec	adrl	
+	brne	ultoa6	
+
+	pop	yl
+	pop	adrl
+	pop	adrh
+	ret
+
+
 ;Prints the lower nibble of temp in hex to the uart
 printhexn:
 	push temp
@@ -1376,22 +2053,92 @@ printstr_end:
 .equ memReadByte	=	dram_read
 .equ memWriteByte	=	dram_write
 
+; --------------------------------------------------------------
 
-
-;Fetches a char from the uart to temp. If none available, waits till one is.
-uartgetc:
-#if defined __ATmega8__
-	sbis UCSRA,RXC
-	 rjmp uartgetc
-    in  temp,UDR
+	.dseg
+	
+#define RXBUFMASK  RXBUFSIZE-1
+
+rxcount:
+	.byte	1
+rxidx_w:
+	.byte	1
+rxidx_r:
+	.byte	1
+rxfifo:
+	.byte	RXBUFSIZE
+	.byte	0
+
+	.cseg
+
+; Save received character in a circular buffer. Do nothing if buffer overflows.
+
+rxint:
+	push	temp
+	in	temp,sreg
+	push	temp
+	push	zh
+	push	zl
+#ifdef __ATmega8__	
+	in	temp,UDR
 #else
-	lds temp,UCSR0A
-	sbrs temp,RXC0
-	 rjmp uartgetc
-	lds temp,UDR0
+	lds	temp,UDR0
 #endif
+	lds	zh,rxcount
+	cpi	zh,RXBUFSIZE
+	brsh	rxi_ov
+	inc	zh
+	sts	rxcount,zh
+
+	ldi	zl,low(rxfifo)
+	lds	zh,rxidx_w
+	add	zl,zh
+	inc	zh
+	andi	zh,RXBUFMASK
+	sts	rxidx_w,zh
+	ldi	zh,high(rxfifo)
+	brcc	PC+2
+	inc	zh
+	st	z,temp
+rxi_ov:
+	pop	zl
+	pop	zh
+	pop	temp
+	out	sreg,temp
+	pop	temp
+	reti
+
+
+;Fetches a char from the buffer to temp. If none available, waits till one is.
+
+uartgetc:
+	lds	temp,rxcount		; Number of characters in buffer
+	tst	temp
+	breq	uartgetc
+	
+	push	zh
+	push	zl
+	ldi	zl,low(rxfifo)
+	ldi	zh,high(rxfifo)
+	lds	temp,rxidx_r
+	add	zl,temp
+	brcc	PC+2
+	inc	zh
+	inc	temp
+	andi	temp,RXBUFMASK
+	sts	rxidx_r,temp
+	cli
+	lds	temp,rxcount
+	dec	temp
+	sts	rxcount,temp
+	sei
+	ld	temp,z		;don't forget to get the char
+	pop	zl
+	pop	zh
 	ret
 
+
+
 ;Sends a char from temp to the uart. 
 uartputc:
 #if defined __ATmega8__
@@ -1491,10 +2238,6 @@ do_fetch_l:
 do_fetch_af:
 	mov opl,z_flags
 	mov oph,z_a
-	rcall do_op_calcparity
-	andi opl,~(1<<ZFL_P)
-	sbrs temp2,0
-	 ori opl,(1<<ZFL_P)
 	ret
 
 do_fetch_bc:
@@ -1544,8 +2287,6 @@ do_fetch_msp:
 	rcall memReadByte
 	mov opl,temp
 
-	mov adrh,z_sph
-	mov adrl,z_spl
 	ldi temp,1
 	ldi temp2,0
 	add adrl,temp
@@ -1578,6 +2319,8 @@ do_fetch_dir16:
 do_fetch_rst:
 	mov adrl,z_pcl
 	mov adrh,z_pch
+	subi adrl,1
+	sbci adrh,0
 	rcall memReadByte
 	andi temp,0x38
 	ldi oph,0
@@ -1669,10 +2412,6 @@ do_store_l:
 do_store_af:
 	mov z_a,oph
 	mov z_flags,opl
-	ldi temp,0
-	mov parityb,temp
-	sbrs z_flags,ZFL_P
-	 inc parityb
 	ret
 
 do_store_bc:
@@ -1717,8 +2456,6 @@ do_store_msp:
 	mov temp,opl
 	rcall memWriteByte
 
-	mov adrh,z_sph
-	mov adrl,z_spl
 	ldi temp,1
 	ldi temp2,0
 	add adrl,temp
@@ -1883,7 +2620,7 @@ opjumps:
 ;|ADD HL,ss |--?-0*|Add                  |HL=HL+ss              |
 ;|ADD IX,pp |--?-0*|Add                  |IX=IX+pp              |
 ;|ADD IY,rr |--?-0*|Add                  |IY=IY+rr              |
-;|AND s     |***P00|Logical AND          |A=A&s                 |
+;|AND s     |**1P00|Logical AND          |A=A&s                 |
 ;|BIT b,m   |?*1?0-|Test Bit             |m&{2^b}               |
 ;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
 ;|CALL nn   |------|Unconditional Call   |-[SP]=PC,PC=nn        |
@@ -1933,7 +2670,7 @@ opjumps:
 ;|LDIR      |--000-|Load, Inc., Repeat   |LDI till BC=0         |
 ;|NEG       |***V1*|Negate               |A=-A                  |
 ;|NOP       |------|No Operation         |                      |
-;|OR s      |***P00|Logical inclusive OR |A=Avs                 |
+;|OR s      |**0P00|Logical inclusive OR |A=Avs                 |
 ;|OTDR      |?1??1-|Output, Dec., Repeat |OUTD till B=0         |
 ;|OTIR      |?1??1-|Output, Inc., Repeat |OUTI till B=0         |
 ;|OUT [C],r |------|Output               |[C]=r                 |
@@ -1953,10 +2690,6 @@ opjumps:
 ;|RLA       |--0-0*|Rotate Left Acc.     |A={CY,A}<-            |
 ;|RLC m     |**0P0*|Rotate Left Circular |m=m<-                 |
 ;|RLCA      |--0-0*|Rotate Left Circular |A=A<-                 |
-;----------------------------------------------------------------
-;----------------------------------------------------------------
-;|Mnemonic  |SZHPNC|Description          |Notes                 |
-;|----------+------+---------------------+----------------------|
 ;|RLD       |**0P0-|Rotate Left 4 bits   |{A,[HL]}={A,[HL]}<- ##|
 ;|RR m      |**0P0*|Rotate Right         |m=->{CY,m}            |
 ;|RRA       |--0-0*|Rotate Right Acc.    |A=->{CY,A}            |
@@ -1972,72 +2705,11 @@ opjumps:
 ;|SRA m     |**0P0*|Shift Right Arith.   |m=m/2                 |
 ;|SRL m     |**0P0*|Shift Right Logical  |m=->{0,m,CY}          |
 ;|SUB s     |***V1*|Subtract             |A=A-s                 |
-;|XOR s     |***P00|Logical Exclusive OR |A=Axs                 |
+;|XOR s     |**0P00|Logical Exclusive OR |A=Axs                 |
 ;|----------+------+--------------------------------------------|
-;| F        |-*01? |Flag unaffected/affected/reset/set/unknown  |
-;| S        |S     |Sign flag (Bit 7)                           |
-;| Z        | Z    |Zero flag (Bit 6)                           |
-;| HC       |  H   |Half Carry flag (Bit 4)                     |
-;| P/V      |   P  |Parity/Overflow flag (Bit 2, V=overflow)    |
-;| N        |    N |Add/Subtract flag (Bit 1)                   |
-;| CY       |     C|Carry flag (Bit 0)                          |
-;|-----------------+--------------------------------------------|
-;| n               |Immediate addressing                        |
-;| nn              |Immediate extended addressing               |
-;| e               |Relative addressing (PC=PC+2+offset)        |
-;| [nn]            |Extended addressing                         |
-;| [xx+d]          |Indexed addressing                          |
-;| r               |Register addressing                         |
-;| [rr]            |Register indirect addressing                |
-;|                 |Implied addressing                          |
-;| b               |Bit addressing                              |
-;| p               |Modified page zero addressing (see RST)     |
-;|-----------------+--------------------------------------------|
-;|DEFB n(,...)     |Define Byte(s)                              |
-;|DEFB 'str'(,...) |Define Byte ASCII string(s)                 |
-;|DEFS nn          |Define Storage Block                        |
-;|DEFW nn(,...)    |Define Word(s)                              |
-;|-----------------+--------------------------------------------|
-;| A  B  C  D  E   |Registers (8-bit)                           |
-;| AF  BC  DE  HL  |Register pairs (16-bit)                     |
-;| F               |Flag register (8-bit)                       |
-;| I               |Interrupt page address register (8-bit)     |
-;| IX IY           |Index registers (16-bit)                    |
-;| PC              |Program Counter register (16-bit)           |
-;| R               |Memory Refresh register                     |
-;| SP              |Stack Pointer register (16-bit)             |
-;|-----------------+--------------------------------------------|
-;| b               |One bit (0 to 7)                            |
-;| cc              |Condition (C,M,NC,NZ,P,PE,PO,Z)             |
-;| d               |One-byte expression (-128 to +127)          |
-;| dst             |Destination s, ss, [BC], [DE], [HL], [nn]   |
-;| e               |One-byte expression (-126 to +129)          |
-;| m               |Any register r, [HL] or [xx+d]              |
-;| n               |One-byte expression (0 to 255)              |
-;| nn              |Two-byte expression (0 to 65535)            |
-;| pp              |Register pair BC, DE, IX or SP              |
-;| qq              |Register pair AF, BC, DE or HL              |
-;| qq'             |Alternative register pair AF, BC, DE or HL  |
-;| r               |Register A, B, C, D, E, H or L              |
-;| rr              |Register pair BC, DE, IY or SP              |
-;| s               |Any register r, value n, [HL] or [xx+d]     |
-;| src             |Source s, ss, [BC], [DE], [HL], nn, [nn]    |
-;| ss              |Register pair BC, DE, HL or SP              |
-;| xx              |Index register IX or IY                     |
-;|-----------------+--------------------------------------------|
-;| +  -  *  /  ^   |Add/subtract/multiply/divide/exponent       |
-;| &  ~  v  x      |Logical AND/NOT/inclusive OR/exclusive OR   |
-;| <-  ->          |Rotate left/right                           |
-;| [ ]             |Indirect addressing                         |
-;| [ ]+  -[ ]      |Indirect addressing auto-increment/decrement|
-;| { }             |Combination of operands                     |
-;| #               |Also BC=BC-1,DE=DE-1                        |
-;| ##              |Only lower 4 bits of accumulator A used     |
-;----------------------------------------------------------------
-
-
-;ToDo: Parity at more instructions...
 
+
+.equ AVR_T = 6
 .equ AVR_H = 5
 .equ AVR_S = 4
 .equ AVR_V = 3
@@ -2045,6 +2717,81 @@ opjumps:
 .equ AVR_Z = 1
 .equ AVR_C = 0
 
+;------------------------------------------------;
+; Move single bit between two registers
+;
+;	bmov	dstreg,dstbit,srcreg.srcbit
+
+.macro	bmov
+	bst	@2,@3
+	bld	@0,@1
+.endm
+
+
+;------------------------------------------------;
+; Load table value from flash indexed by source reg.
+;
+;	ldpmx	dstreg,tablebase,indexreg
+;
+; (6 words, 8 cycles)
+
+.macro	ldpmx
+	ldi	zl,low (@1*2)
+	ldi	zh,high(@1*2)
+	add	zl,@2		       
+	brcc	PC+2
+	inc	zh		       
+	lpm	@0,z	
+.endm
+
+.macro	do_z80_flags_HP
+#if EM_Z80
+	bmov	z_flags, ZFL_P, temp, AVR_V
+	bmov	z_flags, ZFL_H, temp, AVR_H
+#endif
+.endm
+
+.macro	do_z80_flags_set_N
+#if EM_Z80
+	ori	z_flags, (1<<ZFL_N)       ; Negation auf 1
+#endif
+.endm
+
+.macro	do_z80_flags_set_HN
+#if EM_Z80
+	ori 	z_flags,(1<<ZFL_N)|(1<<ZFL_H)
+#endif
+.endm
+
+.macro	do_z80_flags_clear_N
+#if EM_Z80
+	andi	z_flags,~(1<<ZFL_N)
+#endif
+.endm
+
+.macro	do_z80_flags_op_rotate
+	; must not change avr carry flag!
+#if EM_Z80
+	andi   z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
+#else
+	andi   z_flags, ~( (1<<ZFL_C) )
+#endif
+.endm
+
+.macro	do_z80_flags_op_and
+#if EM_Z80
+	ori	z_flags,(1<<ZFL_H)
+#else
+	ori	z_flags,(1<<ZFL_H)
+#endif
+.endm
+
+.macro	do_z80_flags_op_or
+#if EM_Z80
+#endif
+.endm
+
+
 do_op_nop:
 	ret
 
@@ -2054,45 +2801,40 @@ do_op_nop:
 ;|INC r     |***V0-|Increment            |r=r+1                 |
 ;|INC [HL]  |***V0-|Increment            |[HL]=[HL]+1           |
 ;|INC [xx+d]|***V0-|Increment            |[xx+d]=[xx+d]+1       |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|INC r     |**-P0-|Increment            |r=r+1                 |
+;|INC [HL]  |**-P0-|Increment            |[HL]=[HL]+1           |
 ;
-; OK
+; 
 do_op_inc:
-	andi  z_flags, (1<<ZFL_C)       ; bis auf Carry alles auf 0
-	ldi   temp, 1
-	add   opl, temp
-	in    temp, sreg
-	mov   parityb, opl
-	bst   temp, AVR_Z               ; Zero
-	bld   z_flags, ZFL_Z
-	sbrc  opl, 7                    ; Sign
-	ori   z_flags, (1<<ZFL_S)       
-	bst   temp, AVR_H               ; Half Sign
-	bld   z_flags, ZFL_H
-  bst   temp, AVR_C               ; Overflow
-  bld   z_flags, ZFL_P
+	ldi	temp,1
+	add	opl,temp
+	in	temp, sreg
+	andi	z_flags,(1<<ZFL_H)|(1<<ZFL_C)	; preserve C-, and H-flag
+	ldpmx	temp2, sz53p_tab, opl
+	or	z_flags,temp2		;
+	do_z80_flags_HP
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
-;|DEC s     |***V1-|Decrement            |s=s-1                 |
+;|DEC r     |***V1-|Decrement            |s=s-1                 |
+;|INC [HL]  |***V0-|Increment            |[HL]=[HL]+1           |
+;|INC [xx+d]|***V0-|Increment            |[xx+d]=[xx+d]+1       |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|DEC r     |**-P -|Increment            |r=r+1                 |
+;|DEC [HL]  |**-P -|Increment            |[HL]=[HL]+1           |
+;
 ;
-; OK
 do_op_dec:
-	andi  z_flags, (1<<ZFL_C)       ; bis auf Carry alles auf 0
-	ori   z_flags, (1<<ZFL_N)       ; Negation auf 1
-	ldi   temp, 1
-	sub   opl, temp
+	subi	opl,1
 	in    temp, sreg
-	mov   parityb, opl
-	bst   temp, AVR_Z               ; Zero
-	bld   z_flags, ZFL_Z
-	bst   temp, AVR_S               ; Sign
-	bld   z_flags, ZFL_S
-	bst   temp, AVR_H               ; Half Sign
-	bld   z_flags, ZFL_H
-  bst   temp, AVR_C               ; Underflow
-  bld   z_flags, ZFL_P
+	andi	z_flags,(1<<ZFL_H)|(1<<ZFL_C)	; preserve C-, and H-flag
+	ldpmx	temp2, sz53p_tab, opl
+	or	z_flags,temp2		;
+	do_z80_flags_HP
+	do_z80_flags_set_N
 	ret
 
 
@@ -2102,12 +2844,12 @@ do_op_dec:
 ;|INC xx    |------|Increment            |xx=xx+1               |
 ;|INC ss    |------|Increment            |ss=ss+1               |
 ;
-; OK
+; 
 do_op_inc16:
-	ldi   temp, 1
-	ldi   temp2, 0
-	add   opl, temp
-	adc   oph, temp2
+	inc	opl
+	brne	op_i16x
+	inc	oph
+op_i16x:
 	ret
 
 ;----------------------------------------------------------------
@@ -2116,24 +2858,24 @@ do_op_inc16:
 ;|DEC xx    |------|Decrement            |xx=xx-1               |
 ;|DEC ss    |------|Decrement            |ss=ss-1               |
 ;
-; OK
+; 
 do_op_dec16:
-	ldi   temp, 1
-	ldi   temp2, 0
-	sub   opl, temp
-	sbc   oph, temp2
+	subi   opl, 1
+	sbci   oph, 0
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
 ;|RLCA      |--0-0*|Rotate Left Circular |A=A<-                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|RLCA      |---- *|Rotate Left Circular |A=A<-                 |
+;
 ;
-; OK
 do_op_rlc:
 	;Rotate Left Cyclical. All bits move 1 to the 
 	;left, the msb becomes c and lsb.
-	andi   z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
+	do_z80_flags_op_rotate
 	lsl    opl
 	brcc   do_op_rlc_noc
 	ori    opl, 1
@@ -2145,12 +2887,14 @@ do_op_rlc_noc:
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
 ;|RRCA      |--0-0*|Rotate Right Circular|A=->A                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|RRCA      |---- *|Rotate Right Circular|A=->A                 |
+;
 ;
-; OK
 do_op_rrc: 
 	;Rotate Right Cyclical. All bits move 1 to the 
 	;right, the lsb becomes c and msb.
-	andi   z_flags, ~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
+	do_z80_flags_op_rotate
 	lsr    opl
 	brcc   do_op_rrc_noc
 	ori    opl, 0x80
@@ -2162,116 +2906,104 @@ do_op_rrc_noc:
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
 ;|RRA       |--0-0*|Rotate Right Acc.    |A=->{CY,A}            |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|RRA       |---- *|Rotate Right Acc.    |A=->{CY,A}            |
 ;
-; OK
+; 
 do_op_rr: 
 	;Rotate Right. All bits move 1 to the right, the lsb 
 	;becomes c, c becomes msb.
-	clc
+	clc				; get z80 carry to avr carry
 	sbrc    z_flags,ZFL_C
 	sec
+	do_z80_flags_op_rotate		; (clear ZFL_C, doesn't change AVR_C)
+	bmov	z_flags,ZFL_C, opl,0	; Bit 0 --> CY
 	ror     opl
-	in      temp,sreg
-	andi    z_flags,~( (1<<ZFL_H) | (1<<ZFL_N) | (1<<ZFL_C) )
-	bst     temp,AVR_C
-	bld     z_flags,ZFL_C
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|RLA       |--0-0*|Rotate Left Acc.     |A={CY,A}<-            |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|RLA       |---- *|Rotate Left Acc.     |A={CY,A}<-            |
 ;
-; Not yet checked
+; 
 do_op_rl:
 	;Rotate Left. All bits move 1 to the left, the msb 
 	;becomes c, c becomes lsb.
 	clc
 	sbrc z_flags,ZFL_C
 	 sec
+	do_z80_flags_op_rotate		; (clear ZFL_C, doesn't change AVR_C)
+	bmov	z_flags,ZFL_C, opl,7	; Bit 7 --> CY
 	rol opl
-	in temp,sreg
-	andi z_flags,0b11101100
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|ADD A,s   |***V0*|Add                  |A=A+s                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|ADD A,s   |***P *|Add                  |A=A+s                 |
+;
 ;
-; Not yet checked
 do_op_adda:
-	ldi z_flags,0
 	add opl,z_a
 	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	bst temp,AVR_S
-	cpi opl,$80
-	brne adda_no_s
-	ori z_flags,(1<<ZFL_S)
-adda_no_s:
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	bst temp,AVR_V
-	bld z_flags,ZFL_P
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,P flag
+	bmov	z_flags,ZFL_C, temp,AVR_C
+	do_z80_flags_HP
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|ADC A,s   |***V0*|Add with Carry       |A=A+s+CY              |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|ADC A,s   |***P *|Add with Carry       |A=A+s+CY              |
+;
 ;
-; Not yet checked
 do_op_adca:
 	clc
 	sbrc z_flags,ZFL_C
 	 sec
 	adc opl,z_a
 	in temp,sreg
-	ldi z_flags,0
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	sbrc opl,7
-	 ori z_flags,(1<<ZFL_S)
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	bst temp,AVR_V
-	bld z_flags,ZFL_P
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
-	andi z_flags,~(1<<ZFL_N)
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,P
+	bmov	z_flags,ZFL_C, temp,AVR_C
+	do_z80_flags_HP
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|SUB s     |***V1*|Subtract             |A=A-s                 |
+;|CP s      |***V1*|Compare              |A-s                   |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|SUB s     |***P *|Subtract             |A=A-s                 |
+;|CP s      |***P *|Compare              |A-s                   |
+
 ;
-; Not yet checked
 do_op_subfa:
 	mov temp,z_a
 	sub temp,opl
 	mov opl,temp
 	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	bst temp,AVR_S
-	bld z_flags,ZFL_S
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	bst temp,AVR_V
-	bld z_flags,ZFL_P
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
-	ori z_flags,(1<<ZFL_N)
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,P
+	bmov	z_flags,ZFL_C, temp,AVR_C
+	do_z80_flags_HP
+	do_z80_flags_set_N
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|SBC A,s   |***V1*|Subtract with Carry  |A=A-s-CY              |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|SBC A,s   |***P *|Subtract with Carry  |A=A-s-CY              |
+;
 ;
-; Not yet checked
 do_op_sbcfa:
 	mov temp,z_a
 	clc
@@ -2280,106 +3012,88 @@ do_op_sbcfa:
 	sbc temp,opl
 	mov opl,temp
 	in temp,sreg
-	bst temp,AVR_S
-	bld z_flags,ZFL_S
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	bst temp,AVR_V
-	bld z_flags,ZFL_P
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
-	cpi opl,0	;AVR doesn't set Z?
-	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	ori z_flags,(1<<ZFL_N)
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,P
+	bmov	z_flags,ZFL_C, temp,AVR_C
+	do_z80_flags_HP
+	do_z80_flags_set_N
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|AND s     |**1P00|Logical AND          |A=A&s                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|AND s     |**-P 0|Logical AND          |A=A&s                 |
 ;
-; Not yet checked
+; TODO H-Flag
 do_op_anda:
-	ldi z_flags,0
-	and opl,z_a
-	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	bst temp,AVR_S
-	bld z_flags,ZFL_S
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	mov temp,opl
+	and opl,z_a				;
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,P,N,C
+	do_z80_flags_op_and
 	ret
 
+
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|OR s      |**0P00|Logical inclusive OR |A=Avs                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|OR s      |**-P00|Logical inclusive OR |A=Avs                 |
 ;
-; Not yet checked
+; TODO: H-Flag
 do_op_ora:
-	ldi z_flags,0
 	or opl,z_a
-	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	bst temp,AVR_S
-	bld z_flags,ZFL_S
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	mov temp,opl
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,H,P,N,C
+	do_z80_flags_op_or
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|XOR s     |**0P00|Logical Exclusive OR |A=Axs                 |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|XOR s     |**-P 0|Logical Exclusive OR |A=Axs                 |
 ;
-; Not yet checked
+; TODO: H-Flag
 do_op_xora:
-	ldi z_flags,0
 	eor opl,z_a
-	in temp,sreg
-	bst temp,AVR_Z
-	bld z_flags,ZFL_Z
-	bst temp,AVR_S
-	bld z_flags,ZFL_S
-	bst temp,AVR_H
-	bld z_flags,ZFL_H
-	mov temp,opl
+	ldpmx	z_flags,sz53p_tab,opl		;S,Z,H,P,N,C
+	do_z80_flags_op_or
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|ADD HL,ss |--?-0*|Add                  |HL=HL+ss              |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|ADD HL,ss |---- *|Add                  |HL=HL+ss              |
+;
 ;
-; Not yet checked
 do_op_addhl:
 	add opl,z_l
 	adc oph,z_h
 	in temp,sreg
-	bst temp,AVR_C
-	bld z_flags,ZFL_C
-	andi z_flags,~(1<<ZFL_N)
+	bmov	z_flags,ZFL_H, temp,AVR_H
+	bmov	z_flags,ZFL_C, temp,AVR_C
+	do_z80_flags_clear_N
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
 ;
-; Not yet checked
-do_op_sthl: ;store hl to mem loc in opl
-	;ToDo: check flags
+;
+do_op_sthl: ;store hl to mem loc in opl:h
 	mov adrl,opl
 	mov adrh,oph
 	mov temp,z_l
 	rcall memWriteByte
 
-	ldi temp,1
-	ldi temp2,0
-	add opl,temp
-	adc oph,temp2
-
+	inc	opl
+	brne	op_sthlx
+	inc	oph
+op_sthlx:
 	mov adrl,opl
 	mov adrh,oph
 	mov temp,z_h
@@ -2390,8 +3104,9 @@ do_op_sthl: ;store hl to mem loc in opl
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
 ;
-; Not yet checked
+; 
 do_op_rmem16:
 	mov adrl,opl
 	mov adrh,oph
@@ -2408,8 +3123,9 @@ do_op_rmem16:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|LD dst,src|------|Load                 |dst=src               |
+;
 ;
-; Not yet checked
 do_op_rmem8:
 	mov adrl,opl
 	mov adrh,oph
@@ -2420,30 +3136,157 @@ do_op_rmem8:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|DAA       |***P-*|Decimal Adjust Acc.  |                      |
+;|----------|SZHP C|---------- 8080 ----------------------------|
 ;
 ; Not yet checked
+
+; Description (http://www.z80.info/z80syntx.htm#DAA):
+;  This instruction conditionally adjusts the accumulator for BCD addition
+;  and subtraction operations. For addition (ADD, ADC, INC) or subtraction
+;  (SUB, SBC, DEC, NEC), the following table indicates the operation performed:
+;
+; -------------------------------------------------------------------------------
+; |          | C Flag  | HEX value in | H Flag | HEX value in | Number  | C flag|
+; | Operation| Before  | upper digit  | Before | lower digit  | added   | After |
+; |          | DAA     | (bit 7-4)    | DAA    | (bit 3-0)    | to byte | DAA   |
+; |-----------------------------------------------------------------------------|
+; |          |    0    |     0-9      |   0    |     0-9      |   00    |   0   |
+; |   ADD    |    0    |     0-8      |   0    |     A-F      |   06    |   0   |
+; |          |    0    |     0-9      |   1    |     0-3      |   06    |   0   |
+; |   ADC    |    0    |     A-F      |   0    |     0-9      |   60    |   1   |
+; |          |    0    |     9-F      |   0    |     A-F      |   66    |   1   |
+; |   INC    |    0    |     A-F      |   1    |     0-3      |   66    |   1   |
+; |          |    1    |     0-2      |   0    |     0-9      |   60    |   1   |
+; |          |    1    |     0-2      |   0    |     A-F      |   66    |   1   |
+; |          |    1    |     0-3      |   1    |     0-3      |   66    |   1   |
+; |-----------------------------------------------------------------------------|
+; |   SUB    |    0    |     0-9      |   0    |     0-9      |   00    |   0   |
+; |   SBC    |    0    |     0-8      |   1    |     6-F      |   FA    |   0   |
+; |   DEC    |    1    |     7-F      |   0    |     0-9      |   A0    |   1   |
+; |   NEG    |    1    |     6-F      |   1    |     6-F      |   9A    |   1   |
+; |-----------------------------------------------------------------------------|
+;
+; Flags:
+;     C:   See instruction.
+;     N:   Unaffected.
+;     P/V: Set if Acc. is even parity after operation, reset otherwise.
+;     H:   See instruction.
+;     Z:   Set if Acc. is Zero after operation, reset otherwise.
+;     S:   Set if most significant bit of Acc. is 1 after operation, reset otherwise.
+
+
+
+#if 1
 do_op_da:
-	;DAA -> todo
-	rcall do_op_inv
-	mov temp,opl
+	ldi 	oph,0				; what to add
+	sbrc	z_flags,ZFL_H			; if H-Flag
+	rjmp	op_da_06
+	mov	temp,opl
+	andi	temp,0x0f			; ... or lower digit > 9
+	cpi	temp,0x0a
+	brlo	op_da_06n
+op_da_06:				
+	ori	oph,0x06
+op_da_06n:				
+	sbrc	z_flags,(1<<ZFL_C)
+	rjmp	op_da_60
+	cpi	opl,0xa0
+	brlo	op_da_60n
+op_da_60:				
+	ori	oph,0x60
+op_da_60n:				
+	cpi	opl,0x9a
+	brlo	op_da_99n
+	ori	z_flags,(1<<ZFL_C); set C
+op_da_99n:
+	sbrs	z_flags,ZFL_N			; if sub-op
+	rjmp	op_da_add			; then
+	sub	opl,oph
+	rjmp	op_da_ex
+op_da_add:					; else add-op
+	cpi	opl,0x91
+	brlo	op_da_60n2
+	mov	temp,opl
+	andi	temp,0x0f
+	cpi	temp,0x0a
+	brlo	op_da_60n2
+	ori	oph,0x60
+op_da_60n2:
+	add	opl,oph
+op_da_ex:
+	in	temp,SREG	
+	sbrc	temp,AVR_H
+	ori	z_flags,(1<<ZFL_C)
+	andi	z_flags,(1<<ZFL_N)|(1<<ZFL_C)	; preserve C,N
+	ldpmx	temp2, sz53p_tab, opl		; get S,Z,P
+	or	z_flags,temp2
+	bmov	z_flags,ZFL_H, temp,AVR_H	; H  (?)
 	ret
+#else
 
+do_op_da:
+	sbrc	z_flags,ZFL_N			; if add-op	
+	rjmp	do_op_da_sub			; then
+	ldi		temp2,0			;
+	mov		temp,opl		;
+	andi	temp,0x0f			;
+	cpi		temp,0x0a		;	if lower digit > 9
+	brlo	do_op_da_h			;
+	ori		temp2,0x06		;		add 6 to lower digit
+do_op_da_h:					;
+	sbrc	z_flags,ZFL_H			;   ... or H-Flag
+	ori		temp2,0x06		;
+	add		opl,temp2		;
+
+	ldi		temp2,0			;
+	mov		temp,opl		;
+	andi	temp,0xf0			;
+	cpi		temp,0xa0		;
+	brlo	do_op_da_c			;
+	ori		temp2,0x60		;
+do_op_da_c:					; else sub-op
+	sbrc	z_flags,ZFL_C			;
+	ori		temp2,0x60		;
+	andi	z_flags, ~( (1<<ZFL_S) | (1<<ZFL_Z) | (1<<ZFL_H) )
+	add		opl,temp2		;
+	in		temp,SREG		;
+	bst		temp,AVR_Z		;Z-Flag
+	bld		z_flags,ZFL_Z		;
+	bst		temp,AVR_N		;S-Flag
+	bst		z_flags,ZFL_S		;
+	sbrc	temp2,5				;C-Flag, set if 0x06 added
+	ori		z_flags,(1<<ZFL_C)	;
+						;H-Flag?
+	ret
+	
+do_op_da_sub:					;TODO:
+	rcall do_op_inv
+	ret
+#endif
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|SCF       |--0-01|Set Carry Flag       |CY=1                  |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;
 ;
-; Not yet checked
 do_op_scf:
-	ori z_flags,(1<<ZFL_C)
+	andi	z_flags,~((1<<ZFL_H)|(1<<ZFL_N))
+	ori 	z_flags,(1<<ZFL_C)
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CCF       |--?-0*|Complement Carry Flag|CY=~CY                |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|SCF       |---- 1|Set Carry Flag       |CY=1                  |
 ;
-; Not yet checked
+;TODO: H-Flag
 do_op_ccf:
+	do_z80_flags_clear_N
 	ldi temp,(1<<ZFL_C)
 	eor z_flags,temp
 	ret
@@ -2451,19 +3294,26 @@ do_op_ccf:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CPL       |--1-1-|Complement           |A=~A                  |
+;|----------|SZHP C|---------- 8080 ----------------------------|
+;|CPL       |---- -|Complement           |A=~A                  |
+;
 ;
-; Not yet checked
 do_op_cpl:
 	com opl
-	ori z_flags,(1<<ZFL_N)|(1<<ZFL_H)
+	do_z80_flags_set_HN
 	ret
 
+
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|PUSH xx   |------|Push                 |-[SP]=xx              |
+;|PUSH qq   |------|Push                 |-[SP]=qq              |
+;
 ;
-; Not yet checked
 do_op_push16:
+#if 1
 	ldi temp,1
 	ldi temp2,0
 	sub z_spl,temp
@@ -2483,6 +3333,23 @@ do_op_push16:
 	mov adrh,z_sph
 	mov temp,opl
 	rcall memWriteByte
+#else
+	subi z_spl,1
+	sbci z_sph,0
+
+	mov adrl,z_spl
+	mov adrh,z_sph
+	mov temp,oph
+	rcall memWriteByte
+
+	subi z_spl,1
+	sbci z_sph,0
+
+	mov adrl,z_spl
+	mov adrh,z_sph
+	mov temp,opl
+	rcall memWriteByte
+#endif
 
 .if STACK_DBG
 	rcall printstr
@@ -2506,8 +3373,10 @@ do_op_push16:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|POP xx    |------|Pop                  |xx=[SP]+              |
+;|POP qq    |------|Pop                  |qq=[SP]+              |
+;
 ;
-; Not yet checked
 do_op_pop16:
 	mov adrl,z_spl
 	mov adrh,z_sph
@@ -2550,8 +3419,10 @@ do_op_pop16:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|EX [SP],HL|------|Exchange             |[SP]<->HL             |
+;|EX DE,HL  |------|Exchange             |DE<->HL               |
 ;
-; Not yet checked
+; 
 do_op_exhl:
 	mov temp,z_h
 	mov z_h,oph
@@ -2565,7 +3436,7 @@ do_op_exhl:
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
 ;
-; Not yet checked
+; TODO: Implement IFF1, IFF2
 do_op_di:
 	ret
 
@@ -2573,15 +3444,18 @@ do_op_di:
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
 ;
-; Not yet checked
+; TODO: Implement IFF1, IFF2
 do_op_ei:
 	ret
 
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifnz:
 	sbrs z_flags, ZFL_Z
 	ret
@@ -2592,8 +3466,11 @@ do_op_ifnz:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifz:
 	sbrc z_flags, ZFL_Z
 	ret
@@ -2604,11 +3481,14 @@ do_op_ifz:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifnc:
 	sbrs z_flags, ZFL_C
-  ret
+	ret
 	ldi insdech, 0
 	ldi insdecl, 0
 	ret
@@ -2616,8 +3496,11 @@ do_op_ifnc:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifc:
 	sbrc z_flags, ZFL_C
 	ret
@@ -2628,11 +3511,13 @@ do_op_ifc:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifpo:
-	rcall do_op_calcparity
-	sbrs temp2, 0
+	sbrs z_flags, ZFL_P
 	ret
 	ldi insdech, 0
 	ldi insdecl, 0
@@ -2641,11 +3526,13 @@ do_op_ifpo:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifpe:
-	rcall do_op_calcparity	
-	sbrc temp2, 0
+	sbrc z_flags, ZFL_P
 	ret
 	ldi insdech, 0
 	ldi insdecl, 0
@@ -2654,8 +3541,11 @@ do_op_ifpe:
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifp: ;sign positive, aka s=0
 	sbrs z_flags, ZFL_S
 	 ret
@@ -2666,8 +3556,11 @@ do_op_ifp: ;sign positive, aka s=0
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|CALL cc,nn|------|Conditional Call     |If cc CALL            |
+;|JP cc,nn  |------|Conditional Jump     |If cc JP              |
+;|RET cc    |------|Conditional Return   |If cc RET             |
+;
 ;
-; Not yet checked
 do_op_ifm: ;sign negative, aka s=1
 	sbrc z_flags, ZFL_S
 	 ret
@@ -2678,8 +3571,9 @@ do_op_ifm: ;sign negative, aka s=1
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|OUT [n],A |------|Output               |[n]=A                 |
+;
 ;
-; Not yet checked
 ;Interface with peripherials goes here :)
 do_op_outa: ; out (opl),a
 .if PORT_DEBUG
@@ -2702,8 +3596,9 @@ do_op_outa: ; out (opl),a
 ;----------------------------------------------------------------
 ;|Mnemonic  |SZHPNC|Description          |Notes                 |
 ;----------------------------------------------------------------
+;|IN A,[n]  |------|Input                |A=[n]                 |
+;
 ;
-; Not yet checked
 do_op_in:	; in a,(opl)
 .if PORT_DEBUG
 	rcall printstr
@@ -2726,6 +3621,8 @@ do_op_in:	; in a,(opl)
 	ret
 
 ;----------------------------------------------------------------
+
+#if 0
 do_op_calcparity:
 	ldi temp2,1
 	sbrc parityb,0
@@ -2746,6 +3643,7 @@ do_op_calcparity:
 	 inc temp2
 	andi temp2,1
 	ret
+#endif
 
 ;----------------------------------------------------------------
 do_op_inv:
@@ -2760,6 +3658,45 @@ do_op_inv:
 haltinv:
 	rjmp haltinv
 	 
+;----------------------------------------------------------------
+; Lookup table, stolen from z80ex, Z80 emulation library.
+; http://z80ex.sourceforge.net/
+
+; The S, Z, 5 and 3 bits and the parity of the lookup value 
+sz53p_tab:
+	.db 0x44,0x00,0x00,0x04,0x00,0x04,0x04,0x00
+	.db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
+	.db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
+	.db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
+	.db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
+	.db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
+	.db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
+	.db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
+	.db 0x00,0x04,0x04,0x00,0x04,0x00,0x00,0x04
+	.db 0x0c,0x08,0x08,0x0c,0x08,0x0c,0x0c,0x08
+	.db 0x04,0x00,0x00,0x04,0x00,0x04,0x04,0x00
+	.db 0x08,0x0c,0x0c,0x08,0x0c,0x08,0x08,0x0c
+	.db 0x24,0x20,0x20,0x24,0x20,0x24,0x24,0x20
+	.db 0x28,0x2c,0x2c,0x28,0x2c,0x28,0x28,0x2c
+	.db 0x20,0x24,0x24,0x20,0x24,0x20,0x20,0x24
+	.db 0x2c,0x28,0x28,0x2c,0x28,0x2c,0x2c,0x28
+	.db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
+	.db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
+	.db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
+	.db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
+	.db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
+	.db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
+	.db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
+	.db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
+	.db 0x84,0x80,0x80,0x84,0x80,0x84,0x84,0x80
+	.db 0x88,0x8c,0x8c,0x88,0x8c,0x88,0x88,0x8c
+	.db 0x80,0x84,0x84,0x80,0x84,0x80,0x80,0x84
+	.db 0x8c,0x88,0x88,0x8c,0x88,0x8c,0x8c,0x88
+	.db 0xa0,0xa4,0xa4,0xa0,0xa4,0xa0,0xa0,0xa4
+	.db 0xac,0xa8,0xa8,0xac,0xa8,0xac,0xac,0xa8
+	.db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0
+	.db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac
+	
 
 ; ----------------------- Opcode decoding -------------------------
 
@@ -3026,3 +3963,6 @@ inst_table:
 .dw (FETCH_NOP	| OP_INV	| STORE_NOP)	 ; FD 		(Z80 specific)
 .dw (FETCH_DIR8	| OP_SUBFA	| STORE_NOP)	 ; FE nn	CP n
 .dw (FETCH_RST	| OP_NOP	| STORE_CALL)	 ; FF		RST 38H
+
+; vim:set ts=8 noet nowrap
+
diff --git a/avrcpm/avr/z80.hex b/avrcpm/avr/z80.hex
deleted file mode 100644
index 63a0a3f..0000000
--- a/avrcpm/avr/z80.hex
+++ /dev/null
@@ -1,201 +0,0 @@
-:020000020000FC
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