From f1deeee3217eb8143c1754ce60c1f015a5a47b57 Mon Sep 17 00:00:00 2001 From: Leo Date: Sat, 10 Mar 2012 13:43:34 +0000 Subject: [PATCH] * avr/8080int-*.asm - DAA algorithm changes git-svn-id: svn://cu.loc/avr-cpm/avrcpm/trunk@169 57430480-672e-4586-8877-bcf8adbbf3b7 --- avr/8080int-jmp.asm | 2 - avr/8080int-t3-jmp.asm | 63 ++++++- avr/8080int-t3.asm | 61 ++++++- avr/8080int.asm | 53 +++++- avr/macros.inc | 10 +- avr/z80int.asm | 397 ++++++++++++++++++++++------------------- 6 files changed, 380 insertions(+), 206 deletions(-) diff --git a/avr/8080int-jmp.asm b/avr/8080int-jmp.asm index e21d703..afa6291 100644 --- a/avr/8080int-jmp.asm +++ b/avr/8080int-jmp.asm @@ -33,7 +33,6 @@ z_e: .byte 1 z_h: .byte 1 z_l: .byte 1 - .cseg ;Init z80 @@ -594,7 +593,6 @@ do_store_am: .equ ZFL_N = 1 .equ ZFL_C = 0 - .equ AVR_T = SREG_T .equ AVR_H = SREG_H .equ AVR_S = SREG_S diff --git a/avr/8080int-t3-jmp.asm b/avr/8080int-t3-jmp.asm index bc1d748..2bcf3f1 100644 --- a/avr/8080int-t3-jmp.asm +++ b/avr/8080int-t3-jmp.asm @@ -33,7 +33,6 @@ z_e: .byte 1 z_h: .byte 1 z_l: .byte 1 - .cseg ;Init z80 @@ -57,7 +56,6 @@ main: notraceon: .endif - .if PRINT_PC cpi z_pch,DBG_TRACE_BOTTOM brlo noprintpc @@ -416,10 +414,10 @@ opjumps: gen_opjmp op_dec gen_opjmp op_inc16 gen_opjmp op_dec16 - gen_opjmp op_rlc - gen_opjmp op_rrc - gen_opjmp op_rr - gen_opjmp op_rl + gen_opjmp op_rlca + gen_opjmp op_rrca + gen_opjmp op_rra + gen_opjmp op_rla gen_opjmp op_adda gen_opjmp op_adca gen_opjmp op_subfa @@ -646,7 +644,6 @@ opjumps: .equ ZFL_N = 1 .equ ZFL_C = 0 - .equ AVR_T = SREG_T .equ AVR_H = SREG_H .equ AVR_S = SREG_S @@ -1205,6 +1202,53 @@ do_op_rmem8: ; Z: Set if Acc. is Zero after operation, reset otherwise. ; S: Set if most significant bit of Acc. is 1 after operation, reset otherwise. +#if 1 + +do_op_da: + +#if EM_Z80 + sbrc z_flags,ZFL_N ;if add-op + rjmp op_da_sub ;then +#endif + +op_da_add: + ldi temp2,0 ; new C and H flag + sbrc z_flags,ZFL_H ; | + rjmp op_da_a01 ; if (H flag ... + mov temp,opl ; | + andi temp,0x0f ; | + cpi temp,0x0a ; or (lower nibble >= 0x0A)) + brlo op_da_a10 ; | +op_da_a01: ; then + ldi oph,0x06 ; add 6 to lower nibble + add opl,oph ; + brhc op_da_02 ; if + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: ; + ldi oph,0x60 ; add 6 to lower nibble + add opl,oph ; + ori temp2,(1<= 0x0A)) + brlo op_da_a10 ; | +op_da_a01: ; then + ldi oph,0x06 ; add 6 to lower nibble + add opl,oph ; + brhc op_da_02 ; if + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: ; + ldi oph,0x60 ; add 6 to lower nibble + add opl,oph ; + ori temp2,(1<= 0x0A)) + brlo op_da_a10 ; | +op_da_a01: ; then + ldi oph,0x06 ; add 6 to lower nibble + add opl,oph ; + brhc op_da_02 ; if + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: ; + ldi oph,0x60 ; add 6 to lower nibble + add opl,oph ; + ori temp2,(1< 0x0fff + .ifdef @0 + .if abs(PC - @0) > 2047 + jmp @0 + .else + rjmp @0 + .endif + .else jmp @0 + .endif .else rjmp @0 .endif @@ -132,8 +140,6 @@ ; .macro lcall .if FLASHEND > 0x0fff -; call @0 - .ifdef @0 .if abs(PC - @0) > 2047 call @0 diff --git a/avr/z80int.asm b/avr/z80int.asm index d9cd4a0..18f2c1e 100644 --- a/avr/z80int.asm +++ b/avr/z80int.asm @@ -56,7 +56,6 @@ main: notraceon: .endif - .if PRINT_PC cpi z_pch,DBG_TRACE_BOTTOM brlo noprintpc @@ -298,13 +297,13 @@ do_fetch_sp: do_fetch_mbc: lds xh,z_b lds xl,z_c - mem_read_d opl + mem_read_d z_a ret do_fetch_mde: lds xh,z_d lds xl,z_e - mem_read_d opl + mem_read_d z_a ret do_fetch_mhl: @@ -340,8 +339,6 @@ do_fetch_rst: ldi oph,0 ret - - ; ------------ Store phase stuff ----------------- .equ STORE_NOP = (0<<5) @@ -445,13 +442,13 @@ do_store_hl: do_store_mbc: lds xh,z_b lds xl,z_c - mem_write_s opl + mem_write_s z_a ret do_store_mde: lds xh,z_d lds xl,z_e - mem_write_s opl + mem_write_s z_a ret do_store_mhl: @@ -525,34 +522,34 @@ do_store_am: ; ------------ Operation phase stuff ----------------- -.equ OP_NOP = (0<<10) -.equ OP_INC = (1<<10) -.equ OP_DEC = (2<<10) +.equ OP_NOP = (0<<10) +.equ OP_INC = (1<<10) +.equ OP_DEC = (2<<10) .equ OP_INC16 = (3<<10) .equ OP_DEC16 = (4<<10) -.equ OP_RLC = (5<<10) -.equ OP_RRC = (6<<10) -.equ OP_RR = (7<<10) -.equ OP_RL = (8<<10) +.equ OP_RLCA = (5<<10) +.equ OP_RRCA = (6<<10) +.equ OP_RRA = (7<<10) +.equ OP_RLA = (8<<10) .equ OP_ADDA = (9<<10) .equ OP_ADCA = (10<<10) .equ OP_SUBFA = (11<<10) .equ OP_SBCFA = (12<<10) .equ OP_ANDA = (13<<10) -.equ OP_ORA = (14<<10) +.equ OP_ORA = (14<<10) .equ OP_XORA = (15<<10) .equ OP_ADDHL = (16<<10) .equ OP_STHL = (17<<10) ;store HL in fetched address .equ OP_RMEM16 = (18<<10) ;read mem at fetched address .equ OP_RMEM8 = (19<<10) ;read mem at fetched address -.equ OP_DA = (20<<10) -.equ OP_SCF = (21<<10) -.equ OP_CPL = (22<<10) -.equ OP_CCF = (23<<10) +.equ OP_DA = (20<<10) +.equ OP_SCF = (21<<10) +.equ OP_CPL = (22<<10) +.equ OP_CCF = (23<<10) .equ OP_POP16 = (24<<10) .equ OP_PUSH16 = (25<<10) .equ OP_IFNZ = (26<<10) -.equ OP_IFZ = (27<<10) +.equ OP_IFZ = (27<<10) .equ OP_IFNC = (28<<10) .equ OP_IFC = (29<<10) .equ OP_IFPO = (30<<10) @@ -575,10 +572,10 @@ opjumps: rjmp do_op_dec rjmp do_op_inc16 rjmp do_op_dec16 - rjmp do_op_rlc - rjmp do_op_rrc - rjmp do_op_rr - rjmp do_op_rl + rjmp do_op_rlca + rjmp do_op_rrca + rjmp do_op_rra + rjmp do_op_rla rjmp do_op_adda rjmp do_op_adca rjmp do_op_subfa @@ -825,10 +822,9 @@ opjumps: lpm @0,z .endm -.macro do_z80_flags_HP +.macro do_z80_flags_V #if EM_Z80 bmov z_flags, ZFL_P, temp, AVR_V - bmov z_flags, ZFL_H, temp, AVR_H #endif .endm @@ -850,6 +846,19 @@ opjumps: #endif .endm +.macro do_z80_flags_clear_HN +#if EM_Z80 + andi z_flags,~((1<A | ; ; -do_op_rrc: +do_op_rrca: ;Rotate Right Cyclical. All bits move 1 to the ;right, the lsb becomes c and msb. do_z80_flags_op_rotate - lsr opl + lsr z_a brcc do_op_rrc_noc - ori opl, 0x80 + ldi temp,0x80 + or z_a,temp ori z_flags, (1<{CY,A} | ; ; -do_op_rr: +do_op_rra: ;Rotate Right. All bits move 1 to the right, the lsb ;becomes c, c becomes msb. clc ; get z80 carry to avr carry sbrc z_flags,ZFL_C sec do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C) - bmov z_flags,ZFL_C, opl,0 ; Bit 0 --> CY - ror opl + bmov z_flags,ZFL_C, z_a,0 ; Bit 0 --> CY + ror z_a ret ;---------------------------------------------------------------- @@ -1089,15 +1100,15 @@ do_op_rr: ;|RLA |---- *|Rotate Left Acc. |A={CY,A}<- | ; ; -do_op_rl: +do_op_rla: ;Rotate Left. All bits move 1 to the left, the msb ;becomes c, c becomes lsb. clc sbrc z_flags,ZFL_C sec do_z80_flags_op_rotate ; (clear ZFL_C, doesn't change AVR_C) - bmov z_flags,ZFL_C, opl,7 ; Bit 7 --> CY - rol opl + bmov z_flags,ZFL_C, z_a,7 ; Bit 7 --> CY + rol z_a ret ;---------------------------------------------------------------- @@ -1113,7 +1124,8 @@ do_op_adda: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P flag bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V ret ;---------------------------------------------------------------- @@ -1132,7 +1144,8 @@ do_op_adca: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V ret ;---------------------------------------------------------------- @@ -1148,7 +1161,8 @@ do_op_subfa: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -1161,13 +1175,13 @@ do_op_subfa: ; do_op_cpfa: - mov temp,z_a - sub temp,opl - mov opl,temp + mov temp2,z_a + sub temp2,opl in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,P + ldpmx z_flags,sz53p_tab,temp2 ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -1187,7 +1201,8 @@ do_op_sbcfa: in temp,sreg ldpmx z_flags,sz53p_tab,z_a ;S,Z,P bmov z_flags,ZFL_C, temp,AVR_C - do_z80_flags_HP + bmov z_flags,ZFL_H, temp,AVR_H + do_z80_flags_V do_z80_flags_set_N ret @@ -1198,7 +1213,7 @@ do_op_sbcfa: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|AND s |**-P 0|Logical AND |A=A&s | ; -; TODO H-Flag +; do_op_anda: and z_a,opl ; ldpmx z_flags,sz53p_tab,z_a ;S,Z,P,N,C @@ -1213,7 +1228,7 @@ do_op_anda: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|OR s |**-P00|Logical inclusive OR |A=Avs | ; -; TODO: H-Flag +; do_op_ora: or z_a,opl ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C @@ -1227,7 +1242,7 @@ do_op_ora: ;|----------|SZHP C|---------- 8080 ----------------------------| ;|XOR s |**-P 0|Logical Exclusive OR |A=Axs | ; -; TODO: H-Flag +; do_op_xora: eor z_a,opl ldpmx z_flags,sz53p_tab,z_a ;S,Z,H,P,N,C @@ -1304,11 +1319,11 @@ do_op_rmem8: ; and subtraction operations. For addition (ADD, ADC, INC) or subtraction ; (SUB, SBC, DEC, NEC), the following table indicates the operation performed: ; -; ------------------------------------------------------------------------------- -; | | C Flag | HEX value in | H Flag | HEX value in | Number | C flag| -; | Operation| Before | upper digit | Before | lower digit | added | After | -; | | DAA | (bit 7-4) | DAA | (bit 3-0) | to byte | DAA | -; |-----------------------------------------------------------------------------| +; ------------------------------------------------------------------- +; | |C Flag |HEX value in|H Flag |HEX val in | Number |C flag | +; | Oper |Before |upper digit |Before |lower digit| added |After | +; | |DAA |(bit 7-4) |DAA |(bit 3-0) | to A |DAA | +; |-------+-------+------------+-------+-----------+--------+-------| ; | | 0 | 0-9 | 0 | 0-9 | 00 | 0 | ; | ADD | 0 | 0-8 | 0 | A-F | 06 | 0 | ; | | 0 | 0-9 | 1 | 0-3 | 06 | 0 | @@ -1318,15 +1333,27 @@ do_op_rmem8: ; | | 1 | 0-2 | 0 | 0-9 | 60 | 1 | ; | | 1 | 0-2 | 0 | A-F | 66 | 1 | ; | | 1 | 0-3 | 1 | 0-3 | 66 | 1 | -; |-----------------------------------------------------------------------------| +; |-------+-------+------------+-------+-----------+--------+-------| ; | SUB | 0 | 0-9 | 0 | 0-9 | 00 | 0 | ; | SBC | 0 | 0-8 | 1 | 6-F | FA | 0 | ; | DEC | 1 | 7-F | 0 | 0-9 | A0 | 1 | ; | NEG | 1 | 6-F | 1 | 6-F | 9A | 1 | -; |-----------------------------------------------------------------------------| -; -; Flags: -; C: See instruction. +; ------------------------------------------------------------------- +; +; The H flag is affected as follows: +; +; --------------------- +; | N | H | low |H' | +; | | |nibble | | +; |---+---+-------+---| +; | 0 | * | 0-9 | 0 | +; | 0 | * | a-f | 1 | +; | 1 | 0 | * | 0 | +; | 1 | 1 | 6-f | 0 | +; | 1 | 1 | 0-5 | 1 | +; --------------------- +; +; Ohter flags: ; N: Unaffected. ; P/V: Set if Acc. is even parity after operation, reset otherwise. ; H: See instruction. @@ -1336,93 +1363,107 @@ do_op_rmem8: #if 1 + do_op_da: - ldi oph,0 ; what to add - sbrc z_flags,ZFL_H ; if H-Flag - rjmp op_da_06 - mov temp,opl - andi temp,0x0f ; ... or lower digit > 9 - cpi temp,0x0a - brlo op_da_06n -op_da_06: - ori oph,0x06 -op_da_06n: - sbrc z_flags,(1<= 0x0A)) + brlo op_da_a10 ; | +op_da_a01: ; then + ldi oph,0x06 ; add 6 to lower nibble + add opl,oph ; + brhc op_da_02 ; if + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: ; + ldi oph,0x60 ; add 6 to lower nibble + add opl,oph ; + ori temp2,(1< 9 - brlo do_op_da_h ; - ori temp2,0x06 ; add 6 to lower digit -do_op_da_h: ; - sbrc z_flags,ZFL_H ; ... or H-Flag - ori temp2,0x06 ; - add opl,temp2 ; - - ldi temp2,0 ; - mov temp,opl ; - andi temp,0xf0 ; - cpi temp,0xa0 ; - brlo do_op_da_c ; - ori temp2,0x60 ; -do_op_da_c: ; else sub-op - sbrc z_flags,ZFL_C ; - ori temp2,0x60 ; - andi z_flags, ~( (1<= 0x0A) + brlo op_da_a10 ; | + ori oph,0x06 ; add 6 + ori temp2,(1<= 0x90) + brlo op_da_a03 ; | +op_da_a02: + ori oph,0x60 ; add 0x60 + ori temp2,(1<= 0xA0) + brlo op_da_a13 ; +op_da_a12: + ori oph,0x60 ; add 0x60 + ori temp2,(1<= 0x0A) + brsh op_da_ae ; | + ori temp2,(1<HL | ;|EX DE,HL |------|Exchange |DE<->HL | -; +;-----------------------------Z80-------------------------------- ; do_op_exhl: lds temp,z_l @@ -1682,36 +1722,36 @@ do_op_ifm: ;sign negative, aka s=1 inst_table: .dw (FETCH_NOP | OP_NOP | STORE_NOP) ; 00 NOP .dw (FETCH_DIR16| OP_NOP | STORE_BC ) ; 01 nn nn LD BC,nn -.dw (FETCH_A | OP_NOP | STORE_MBC) ; 02 LD (BC),A +.dw (FETCH_NOP | OP_NOP | STORE_MBC) ; 02 LD (BC),A .dw (FETCH_BC | OP_INC16 | STORE_BC ) ; 03 INC BC .dw (FETCH_B | OP_INC | STORE_B ) ; 04 INC B .dw (FETCH_B | OP_DEC | STORE_B ) ; 05 DEC B .dw (FETCH_DIR8 | OP_NOP | STORE_B ) ; 06 nn LD B,n -.dw (FETCH_A | OP_RLC | STORE_A ) ; 07 RLCA +.dw (FETCH_NOP | OP_RLCA | STORE_NOP) ; 07 RLCA .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 08 EX AF,AF' (Z80) .dw (FETCH_BC | OP_ADDHL | STORE_HL ) ; 09 ADD HL,BC -.dw (FETCH_MBC | OP_NOP | STORE_A ) ; 0A LD A,(BC) +.dw (FETCH_MBC | OP_NOP | STORE_NOP) ; 0A LD A,(BC) .dw (FETCH_BC | OP_DEC16 | STORE_BC ) ; 0B DEC BC .dw (FETCH_C | OP_INC | STORE_C ) ; 0C INC C .dw (FETCH_C | OP_DEC | STORE_C ) ; 0D DEC C .dw (FETCH_DIR8 | OP_NOP | STORE_C ) ; 0E nn LD C,n -.dw (FETCH_A | OP_RRC | STORE_A ) ; 0F RRCA +.dw (FETCH_NOP | OP_RRCA | STORE_NOP) ; 0F RRCA .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 10 oo DJNZ o (Z80) .dw (FETCH_DIR16| OP_NOP | STORE_DE ) ; 11 nn nn LD DE,nn -.dw (FETCH_A | OP_NOP | STORE_MDE) ; 12 LD (DE),A +.dw (FETCH_NOP | OP_NOP | STORE_MDE) ; 12 LD (DE),A .dw (FETCH_DE | OP_INC16 | STORE_DE ) ; 13 INC DE .dw (FETCH_D | OP_INC | STORE_D ) ; 14 INC D .dw (FETCH_D | OP_DEC | STORE_D ) ; 15 DEC D .dw (FETCH_DIR8 | OP_NOP | STORE_D ) ; 16 nn LD D,n -.dw (FETCH_A | OP_RL | STORE_A ) ; 17 RLA +.dw (FETCH_NOP | OP_RLA | STORE_NOP) ; 17 RLA .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 18 oo JR o (Z80) .dw (FETCH_DE | OP_ADDHL | STORE_HL ) ; 19 ADD HL,DE -.dw (FETCH_MDE | OP_NOP | STORE_A ) ; 1A LD A,(DE) +.dw (FETCH_MDE | OP_NOP | STORE_NOP) ; 1A LD A,(DE) .dw (FETCH_DE | OP_DEC16 | STORE_DE ) ; 1B DEC DE .dw (FETCH_E | OP_INC | STORE_E ) ; 1C INC E .dw (FETCH_E | OP_DEC | STORE_E ) ; 1D DEC E .dw (FETCH_DIR8 | OP_NOP | STORE_E ) ; 1E nn LD E,n -.dw (FETCH_A | OP_RR | STORE_A ) ; 1F RRA +.dw (FETCH_NOP | OP_RRA | STORE_NOP) ; 1F RRA .dw (FETCH_NOP | OP_INV | STORE_NOP) ; 20 oo JR NZ,o (Z80) .dw (FETCH_DIR16| OP_NOP | STORE_HL ) ; 21 nn nn LD HL,nn .dw (FETCH_DIR16| OP_STHL | STORE_NOP) ; 22 nn nn LD (nn),HL @@ -1978,6 +2018,5 @@ sz53p_tab: .db 0xa4,0xa0,0xa0,0xa4,0xa0,0xa4,0xa4,0xa0 .db 0xa8,0xac,0xac,0xa8,0xac,0xa8,0xa8,0xac - ; vim:set ts=8 noet nowrap -- 2.39.2