From fb05009566d5acd9cdc22e02d2035ae848cc777c Mon Sep 17 00:00:00 2001 From: Leo Date: Fri, 27 Apr 2012 19:12:15 +0000 Subject: [PATCH] * avr/timer.asm - Added a wall clock * new files: - cpm/CPM63.SYS - cpm/CPM64.SYS git-svn-id: svn://cu.loc/avr-cpm/avrcpm/trunk@192 57430480-672e-4586-8877-bcf8adbbf3b7 --- avr/Z80int-jmp.asm | 1413 +++++++++++++++++++----------------- avr/config.inc | 3 +- avr/timer.asm | 183 ++++- avr/virt_ports.asm | 10 +- cpm/BIOS.MAC | 16 +- cpm/{CPM.SYS => CPM62.SYS} | Bin cpm/CPM63.SYS | Bin 0 -> 5632 bytes cpm/CPM64.SYS | Bin 0 -> 5632 bytes cpm/Makefile | 8 +- 9 files changed, 913 insertions(+), 720 deletions(-) rename cpm/{CPM.SYS => CPM62.SYS} (100%) create mode 100644 cpm/CPM63.SYS create mode 100644 cpm/CPM64.SYS diff --git a/avr/Z80int-jmp.asm b/avr/Z80int-jmp.asm index a5733ad..8214156 100644 --- a/avr/Z80int-jmp.asm +++ b/avr/Z80int-jmp.asm @@ -130,7 +130,7 @@ noprintpc: ;TODO: hier kommt die Interruptbehandlung rein - cpse intstat,_0 ;fast path if no trace, int, break, ... + cpse intstat,_0 ;Fast path if no trace, int, break, ... rjmp int_test int_instr: @@ -158,7 +158,7 @@ int_notrace: mov z_pch,_0 int_nobreak: - rjmp int_instr ;continue with normal instruction interpretation + rjmp int_instr ;Continue with normal instruction interpretation ;-------------------------------------------------- @@ -976,11 +976,15 @@ do_op_outa: ; out (opl),a ; do_op_ina: ; in a,(opl) .if PORT_DEBUG + push opl + cp opl,_0 ; don't debug port 0 (con stat) + breq dbg_op_ina_1 printnewline printstring "Port read: (" mov temp,opl lcall printhex printstring ") -> " +dbg_op_ina_1: .endif mov temp2,opl @@ -988,8 +992,12 @@ do_op_ina: ; in a,(opl) mov z_a,temp .if PORT_DEBUG + pop temp + cp temp,_0 + breq dbg_op_ina_2 lcall printhex printstring " " +dbg_op_ina_2: .endif ret @@ -1480,7 +1488,7 @@ op_da_a13: ; #if EM_Z80 -op_da_sub: ;else (sub-op) +op_da_sub: ;Else (sub-op) ldi temp2,(1< " +dbg_op_in_1: .endif mov temp2,opl @@ -2326,8 +2338,12 @@ do_op_in: ; in opl,(opl) bld z_flags,ZFL_C .if PORT_DEBUG - rcall printhex + pop temp + cp temp,_0 + breq dbg_op_in_2 + lcall printhex printstring " " +dbg_op_in_2: .endif ret @@ -2778,10 +2794,10 @@ opadx_e: op_LDxx_common: ldd zh,y+oz_h ;H ldd zl,y+oz_l ;L - ldd xh,y+oz_d ;D - ldd xl,y+oz_e ;E - ldd oph,y+oz_b ;B - ldd opl,y+oz_c ;C + ldd xh,y+oz_d ;D + ldd xl,y+oz_e ;E + ldd oph,y+oz_b ;B + ldd opl,y+oz_c ;C mem_read_ds temp, z mem_write_ds x, temp cbr z_flags,(1<m | -;|RL m |**0P0*|Rotate Left |m={CY,m}<- | -;|RR m |**0P0*|Rotate Right |m=->{CY,m} | -;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 | -;|SRA m |**0P0*|Shift Right Arith. |m=m/2 | -;|SLL m |**0P0*|Shift Right Logical | -;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} | - - -do_op_rlc: - ;Rotate Left Cyclical. All bits move 1 to the - ;left, the msb becomes c and lsb. - clr temp - lsl opl - adc temp,_0 - or opl,temp - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - or z_flags,temp - ret - -do_op_rrc: - ;Rotate Right Cyclical. All bits move 1 to the - ;right, the lsb becomes c and msb. - lsr opl - brcc PC+2 - ori opl,0x80 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, opl,7 - ret - - -do_op_rl: - ;Rotate Left. All bits move 1 to the left, the msb - ;becomes c, c becomes lsb. - clc - sbrc z_flags,ZFL_C - sec - rol opl - in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C - ret - - -do_op_rr: - ;Rotate Right. All bits move 1 to the right, the lsb - ;becomes c, c becomes msb. - - ror opl - in temp,sreg ;CY - bmov opl,7, z_flags,ZFL_C ;old CY --> Bit 7 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; - ret - -do_op_sla: - lsl opl - in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; - ret - -do_op_sra: - lsr opl - in temp,sreg - bmov opl,7, opl,6 ;old CY --> Bit 7 - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; - ret - -do_op_sll: - sec - rol opl - in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; - ret - -do_op_srl: - lsr opl - in temp,sreg - ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N - bmov z_flags,ZFL_C, temp,AVR_C ; - ret - -;---------------------------------------------------------------- -;|Mnemonic |SZHPNC|Description |Notes | -;---------------------------------------------------------------- -;|BIT b,m |?*1?0-|Test Bit |m&{2^b} | -;|RES b,m |------|Reset bit |m=m&{~2^b} | -;|SET b,m |------|Set bit |m=mv{2^b} | - - -do_op_BIT7: - ldi temp,0x80 - rjmp opbit -do_op_BIT6: - ldi temp,0x40 - rjmp opbit -do_op_BIT5: - ldi temp,0x20 - rjmp opbit -do_op_BIT4: - ldi temp,0x10 - rjmp opbit -do_op_BIT3: - ldi temp,0x08 - rjmp opbit -do_op_BIT2: - ldi temp,0x04 - rjmp opbit -do_op_BIT1: - ldi temp,0x02 - rjmp opbit -do_op_BIT0: - ldi temp,0x01 -opbit: - and temp,opl - in temp,sreg - ori z_flags,(1<m | +;|RL m |**0P0*|Rotate Left |m={CY,m}<- | +;|RR m |**0P0*|Rotate Right |m=->{CY,m} | +;|SLA m |**0P0*|Shift Left Arithmetic|m=m*2 | +;|SRA m |**0P0*|Shift Right Arith. |m=m/2 | +;|SLL m |**0P0*|Shift Right Logical | +;|SRL m |**0P0*|Shift Right Logical |m=->{0,m,CY} | + + +do_op_rlc: + ;Rotate Left Cyclical. All bits move 1 to the + ;left, the msb becomes c and lsb. + clr temp + lsl opl + adc temp,_0 + or opl,temp + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + or z_flags,temp + ret + +do_op_rrc: + ;Rotate Right Cyclical. All bits move 1 to the + ;right, the lsb becomes c and msb. + lsr opl + brcc PC+2 + ori opl,0x80 + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, opl,7 + ret + + +do_op_rl: + ;Rotate Left. All bits move 1 to the left, the msb + ;becomes c, c becomes lsb. + clc + sbrc z_flags,ZFL_C + sec + rol opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C + ret + + +do_op_rr: + ;Rotate Right. All bits move 1 to the right, the lsb + ;becomes c, c becomes msb. + + ror opl + in temp,sreg ;CY + bmov opl,7, z_flags,ZFL_C ;old CY --> Bit 7 + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; + ret + +do_op_sla: + lsl opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; + ret + +do_op_sra: + lsr opl + in temp,sreg + bmov opl,7, opl,6 ;old CY --> Bit 7 + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; + ret + +do_op_sll: + sec + rol opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; + ret + +do_op_srl: + lsr opl + in temp,sreg + ldpmx z_flags,sz53p_tab,opl ;S,Z,H,P,N + bmov z_flags,ZFL_C, temp,AVR_C ; + ret + +;---------------------------------------------------------------- +;|Mnemonic |SZHPNC|Description |Notes | +;---------------------------------------------------------------- +;|BIT b,m |?*1?0-|Test Bit |m&{2^b} | +;|RES b,m |------|Reset bit |m=m&{~2^b} | +;|SET b,m |------|Set bit |m=mv{2^b} | + + +do_op_BIT7: + ldi temp,0x80 + rjmp opbit +do_op_BIT6: + ldi temp,0x40 + rjmp opbit +do_op_BIT5: + ldi temp,0x20 + rjmp opbit +do_op_BIT4: + ldi temp,0x10 + rjmp opbit +do_op_BIT3: + ldi temp,0x08 + rjmp opbit +do_op_BIT2: + ldi temp,0x04 + rjmp opbit +do_op_BIT1: + ldi temp,0x02 + rjmp opbit +do_op_BIT0: + ldi temp,0x01 +opbit: + and temp,opl + in temp,sreg + ori z_flags,(1< Bad Sector) ; ;40 64-71 in/out - Timer/Clock control. -;46 +;41-46 +; +;47-4C clock - Binary format: y, m, d, h, m, s ; ---------------------------------------------- Start of Code Segment @@ -76,7 +78,7 @@ vport_tbl: .dw uartin .dw uartout - .db 13,9 ; Port 13-21, (lenth 9) + .db 13,9 ; Port 13-21, (length 9) .dw dsk_param_get .dw dsk_param_set .db 22,1 @@ -84,6 +86,10 @@ vport_tbl: .dw dskDoIt .db TIMERPORT,7 + .dw utimeget + .dw utimeput + + .db CLOCKPORT,6 ;Clock format (bin): y, m, d, h, m, s .dw clockget .dw clockput diff --git a/cpm/BIOS.MAC b/cpm/BIOS.MAC index f7bbbe0..d1f2c33 100644 --- a/cpm/BIOS.MAC +++ b/cpm/BIOS.MAC @@ -51,8 +51,8 @@ wboote: ;Drive A B C D E F G H I J K L ;drvtbl:dtbl ;drvtbl:dtbl -drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl> -;drvtbl:dtbl < , , , , , , , ,dphi> +;drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl> +drvtbl:dtbl < , , , , , , , ,dphi> ; Name spt bls dks dir cks off ; dpb dpb243, 26, 1024, 243, 64, 64, 2 @@ -60,9 +60,9 @@ drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl> ; dpb dp8192, 32, 4096,2046,1024,1024, 2 ; dpb dpbrd, 32, 1024, 56, 32, 0, 2 dpb rd192, 32, 1024, 192, 32, 0, 0 - dpb rd1016, 32, 2048, 508, 192, 0, 2 - dpb rd1024, 32, 2048, 512, 192, 0, 0 - dpb rd0960, 32, 2048, 480, 192, 0, 0 +; dpb rd1016, 32, 2048, 508, 192, 0, 2 +; dpb rd1024, 32, 2048, 512, 192, 0, 0 +; dpb rd0960, 32, 2048, 480, 192, 0, 0 ;dpha: dph dpb243 ;dphb: dph dpb243 @@ -74,9 +74,9 @@ drvtbl: dtbl < , , , , , , , ,dphi,dphj,dphk,dphl> ;dphd: dph dp8192 ;dphi: dph rd1016 dphi: dph rd192 -dphj: dph rd1024 -dphk: dph rd1024 -dphl: dph rd0960 +;dphj: dph rd1024 +;dphk: dph rd1024 +;dphl: dph rd0960 .z80 diff --git a/cpm/CPM.SYS b/cpm/CPM62.SYS similarity index 100% rename from cpm/CPM.SYS rename to cpm/CPM62.SYS diff --git a/cpm/CPM63.SYS b/cpm/CPM63.SYS new file mode 100644 index 0000000000000000000000000000000000000000..16cadc09cf12ec7ff041acc9bf017afb4c103e29 GIT binary patch literal 5632 zcmb_geQ;aVm4AwDIr7J|9TS4hHrBH|lqe8D5O)x^f}J={3W>l@q1j<^yBo@MV96I< zNhFpHv=Au6!U7)3rVIrF(@9u0TM`knxYm0SqxYK2+9rm?U5K9KCs}%uW!buJDZ}&r zt{j-1?SGv*qxTXwsvpXVZD0e8tV-=f9K|F zteduWZ{5*xyS1mQx2vOP;})xx`*Bs5kuVe)cR z^#>z14XdhjEXr4dw2$Y}k}}RQlWddu8cB)<9NA_3D%O6LQIuj#5r`=927V{P4VSU^LMuJC7!V z%8-ibpo=^6LA35zlKei(W=<#D9cPnl{6$n8QtQg2!XRfJB%M>j`^i?$ww^6b7D=%g zTZQFOax6+jRe4(_pQ+MgakQjS1;~(d$Lf+~jlqavowURvMtj8Qix}%7hBIQ^5;58$hASc$ zmq+R)ckE}oM_XhUCy*rB8Pl|YV>W3&6xE44rZ+zw)z!wJ@>J~eTf6HU4X5&4>`F-H zk%nSk(Cw)=FDKW>lv6RAVHbZLYuz9njd|+J#Ft}idL&ja1!A^VYngZ|W-c+-iK$pU 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