; - Use Digital Research Link-80 to generate a .PRL file (op switch).\r
; - Cut the .PRL header (first 256 byte) end rename the result to DDTZ.COM.\r
\r
-;-------------------------------------------------------------------------------\r
-; Relocation loader\r
-;\r
-TPA equ 0100h\r
- cseg\r
- .phase TPA\r
\r
- jp start\r
- ds 3\r
-\r
-ldr_end:\r
-ldr_size equ $ - TPA\r
-current_phase defl $\r
-\r
- .dephase\r
-current_cseg defl $\r
-\r
-;-------------------------------------------------------------------------------\r
-; DDT/Z core\r
-;\r
+ maclib config.inc\r
\r
; Some greneral definitions\r
\r
BDOS equ 5\r
TPA equ 0100h\r
\r
-; BDOS function calls\r
-\r
-BDOS_PSTR equ 9 ;Print String\r
-\r
; ddtz specific definitions\r
\r
STACK_SIZE equ 80 ;ddtz internal stack\r
CONBUF_SIZE equ 80 ;Size of console input buffer\r
-EXPR_BUF_SIZE equ 128 ;expressen buffer for conditional breakpoints\r
BP_CNT equ 12 ;Number of breakpoints\r
BP_SIZE equ 4 ;Size of a breakpoint record\r
\r
+bitmap_size equ (prog_size+7)/8\r
+\r
;-------------------------------------------------------------------------------\r
\r
+ cseg\r
+start:\r
ddtz_base:\r
- jp ddtz_bdos\r
+ jr reloc\r
+ nop\r
l0003h:\r
- rst 30h\r
-di_or_ei:\r
+ rst 30h ;rst used by ddtz\r
+di_or_ei: ;ints enabled/disabled while ddtz is running\r
nop\r
ret\r
-ddtz_bdos:\r
- jp 0\r
\r
-current_cseg defl $ - current_cseg\r
- .phase current_phase + current_cseg\r
+;-------------------------------------------------------------------------------\r
+\r
signon:\r
db 'DDTZ/180'\r
db ' - Version '\r
maclib version.inc\r
defvers\r
- db CR,LF,'$'\r
-msgz80:\r
- db 'Z80 or better required!',cr,lf,'$'\r
-\r
-current_phase defl $\r
- .dephase\r
-current_cseg defl $\r
- ds STACK_SIZE - (current_phase - signon)\r
+ dc ' ('\r
\r
+;-------------------------------------------------------------------------------\r
\r
-stack:\r
-reg.l2: db 000h\r
-reg.h2: db 000h\r
-reg.e2: db 000h\r
-reg.d2: db 000h\r
-reg.c2: db 000h\r
-reg.b2: db 000h\r
-reg.f2: db 000h\r
-reg.a2: db 000h\r
- db 000h\r
-reg.i: db 000h\r
-reg.iy: dw 0000h\r
-reg.ix: dw 0000h\r
-reg.f: db 000h\r
-reg.a: db 000h\r
-reg.c: db 000h\r
-reg.b: db 000h\r
-reg.e: db 000h\r
-reg.d: db 000h\r
-reg.l: db 000h\r
-reg.h: db 000h\r
-reg_sp: dw TPA\r
-reg.iff:\r
- db 0f3h\r
- db 0c3h\r
-reg.pc: dw TPA\r
-\r
-cmd_rpt:dw mainloop\r
+reloc_getbit macro\r
+ local nextbit\r
+ exx\r
+ djnz nextbit\r
+ ld b,8 ;reload bit counter\r
+ ld e,(hl) ;get next 8 relocation bits\r
+ inc hl\r
+nextbit:\r
+ sla e\r
+ exx\r
+ endm\r
\r
;-------------------------------------------------------------------------------\r
+; Clear old position\r
\r
-conbuf:\r
- db CONBUF_SIZE\r
+cmde_clr:\r
+ ld (hl),0\r
+ inc hl\r
+ dec bc\r
+ ld a,b\r
+ or c\r
+ jr nz,cmde_clr\r
\r
- ld sp,stack\r
+; Determine current position\r
+\r
+reloc:\r
+ ld bc,(028h-2)\r
+ ld de,(028h)\r
+ ld a,i ;get iff2\r
+ ex af,af'\r
+ di\r
+ ld sp,028h ;rst instr needs a minimal stack\r
+ ld hl,0e9e1h ;opcpdes pop hl/jp (hl)\r
+ ld (028h),hl\r
+ rst 028h\r
+wearehere:\r
+ ld (028h-2),bc\r
+ ld (028h),de\r
+ ld de,-(wearehere-ddtz_base)\r
+ add hl,de ; hl:\r
+\r
+ ld de,ddtz_base ; de:\r
+ or a\r
+ sbc hl,de\r
+ ex de,hl ; de: reloc offset\r
+ ld hl,stack\r
+ add hl,de\r
+ ld sp,hl\r
+ ex af,af'\r
+ push af\r
+ pop bc\r
+ bit 2,c\r
+ jr z,$+3\r
+ ei\r
+ ld hl,ddtz_end ;start of reloc bitmap\r
+ add hl,de\r
+ push hl\r
+ exx\r
+ pop hl\r
+ ld b,1 ;init bit counter b\r
exx\r
- ld de,ddtz_base\r
- call cp_hl_de\r
- jr c,l0079h\r
- ex de,hl\r
-l0079h:\r
- ld de,TPA\r
-l007ch:\r
- dec hl\r
- ld (hl),000h\r
- ld a,h\r
- sub d\r
- ld b,a\r
- ld a,l\r
- sub e\r
- or b\r
- jr nz,l007ch\r
- ld a,i\r
- ld (reg.i),a\r
- ld a,0f3h\r
- jp po,l0093h\r
- ld a,0fbh\r
-l0093h:\r
- ld (reg.iff),a\r
- call di_or_ei\r
- ld hl,ddtz_base\r
- ld l,000h\r
- ld (reg_sp),hl\r
\r
- ld hl,(1) ;wboot addr\r
- ld de,?const\r
- ld b,6\r
-vini_l:\r
- inc hl\r
- inc hl\r
+ LD HL,ddtz_base\r
+ add hl,de ;--> ddtz_base\r
+\r
+reloc_lp:\r
+ push de\r
+ push hl\r
+\r
+ ld de,4\r
+ ld a,2\r
+ ld hl,0\r
+reloc_l:\r
+ reloc_getbit\r
+ jr nc,reloc_got\r
+ cp 16\r
+ jr z,reloc_done\r
+ add hl,de\r
+ ld b,a\r
+ ex de,hl\r
+reloc_l1:\r
+ add hl,hl\r
+ djnz reloc_l1\r
+ ex de,hl\r
+ add a,a\r
+ jr reloc_l\r
+reloc_got:\r
+ ex de,hl\r
+ ld hl,0\r
+ ld b,a\r
+reloc_bitloop:\r
+ reloc_getbit\r
+ adc hl,hl\r
+ djnz reloc_bitloop\r
+ add hl,de\r
+ pop de\r
+ add hl,de\r
+ pop de\r
+\r
+ LD A,(HL)\r
+ ADD A,E\r
+ LD (HL),A\r
+ INC HL\r
+ LD A,(HL)\r
+ ADC A,D\r
+ LD (HL),A\r
inc hl\r
+ jr reloc_lp\r
+reloc_done:\r
+ exx\r
+ ld (bitmap_end),hl\r
+;-------------------------------------------------------------------------------\r
+\r
+\r
+init:\r
+ LD SP,stack\r
+\r
+ if CPM\r
+\r
+ ld hl,(1) ;wboot addr\r
+ ld de,convec\r
ex de,hl\r
+ ld b,3\r
+vini_l:\r
+ inc de\r
+ inc de\r
+ inc de\r
inc hl\r
ld (hl),e\r
inc hl\r
ld (hl),d\r
inc hl\r
- ex de,hl\r
djnz vini_l\r
+ else\r
+ xor a\r
+ dec a\r
+ daa ; Z80: 099H, x180+: 0F9H\r
+ cp 99h ; Result on 180 type cpus is F9 here. Thanks Hitachi\r
+ jr z,ini_z80\r
+\r
+ xor a\r
+ call cinit\r
+ ld a,1\r
+ call cinit\r
+ jr ini_sign\r
+ini_z80:\r
+; if ...\r
+; .printx Error: Not yet implemented!\r
+; db "Stop\r
+; endif\r
+ endif ; CPM\r
+\r
+ini_sign:\r
+ ld hl,signon\r
+ call pstr\r
+ ld hl,ddtz_base\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ' - '\r
+ ld hl,(bitmap_end)\r
+ dec hl\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ')',CR,LF\r
\r
- jr mainloop\r
+ ld a,i\r
+ ld (reg.i),a\r
+ ld a,0f3h\r
+ jp po,l0093h\r
+ ld a,0fbh\r
+l0093h:\r
+ ld (reg.iff),a\r
+ call di_or_ei\r
+ ld hl,ddtz_base\r
+ ld l,000h\r
+ ld (reg_sp),hl\r
\r
- ds CONBUF_SIZE + 3 - ($ - conbuf)\r
+ jp mainloop\r
\r
;-------------------------------------------------------------------------------\r
\r
-?const: jp 0 ; return console input status\r
-?conin: jp 0 ; return console input character\r
-?cono: jp 0 ; send console output character\r
-?list: jp 0 ; send list output character\r
-?auxo: jp 0 ; send auxiliary output character\r
-?auxi: jp 0 ; return auxiliary input character\r
+ if CPM\r
+\r
+convec:\r
+const: jp 0 ; return console input status\r
+conin: jp 0 ; return console input character\r
+conout: jp 0 ; send console output character\r
+\r
+ else\r
+\r
+ include z180reg.inc\r
+\r
+iobyte equ 3\r
+\r
+max_device equ 3\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+; init device\r
+cinit: ; a = device\r
+ call vector_io_0\r
+ dw as0init\r
+ dw rret\r
+ dw rret\r
+ dw rret\r
+\r
+; character input status\r
+const: ; return a != 0 if character waiting\r
+ call vector_io\r
+ dw as0ista\r
+ dw null$status\r
+ dw csio_ista\r
+ dw null$status\r
+\r
+; character input\r
+conin: ; return a = input char\r
+ call vector_io\r
+ dw as0inp\r
+ dw null$input\r
+ dw csio_inp\r
+ dw null$input\r
+\r
+; character output\r
+conout: ; c = output char\r
+ call vector_io\r
+ dw as0out\r
+ dw rret\r
+ dw csio_out\r
+ dw rret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+vector_io:\r
+ ld a,(iobyte)\r
+vector_io_0:\r
+ pop hl\r
+ cp max_device\r
+ jr c,exist\r
+ ld a,max_device ; use null device if a >= max$device\r
+exist:\r
+ call add_hl_a2\r
+ ld a,(hl)\r
+ inc hl\r
+ ld h,(hl)\r
+ ld l,a\r
+ jp (hl)\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+null$input:\r
+ ld a,1Ah\r
+rret:\r
+ ret\r
+ret$true:\r
+ or 0FFh\r
+ ret\r
+\r
+null$status:\r
+ xor a\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+;\r
+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+;\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+; Init Serial I/O for console input and output (ASCI1)\r
+;\r
+\r
+\r
+\r
+as0init:\r
+ ld hl,initab0\r
+ jp ioiniml\r
+\r
+as1init:\r
+ ld hl,initab1\r
+ jp ioiniml\r
+\r
+\r
+ ld a,M_MPBT\r
+ out0 (cntlb1),a\r
+ ld a,M_RE + M_TE + M_MOD2 ;Rx/Tx enable\r
+ out0 (cntla1),a\r
+ ld a,M_RIE\r
+ out0 (stat1),a ;Enable rx interrupts\r
+\r
+ ret ;\r
+\r
+\r
+initab0:\r
+ db 1,stat0,0 ;Disable rx/tx interrupts\r
+ ;Enable baud rate generator\r
+ db 1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS\r
+ db 2,astc0l,low 28, high 28\r
+ db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+initab1:\r
+ db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
+ db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
+ db 2,astc1l,low 3, high 3\r
+ db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ioiniml:\r
+ push bc\r
+ xor a\r
+ioml_lp:\r
+ ld b,(hl)\r
+ inc hl\r
+ cp b\r
+ jr z,ioml_e\r
+\r
+ ld c,(hl)\r
+ inc hl\r
+ otimr\r
+ jr ioml_lp\r
+ioml_e:\r
+ pop bc\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+as0ista:\r
+ in0 a,(stat0)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as1ista:\r
+ in0 a,(stat1)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as0inp:\r
+ in0 a,(stat0)\r
+ rlca\r
+ jr nc,as0inp\r
+ in0 a,rdr0\r
+ ret\r
+\r
+as1inp:\r
+ in0 a,(stat1)\r
+ rlca\r
+ jr nc,as1inp\r
+ in0 a,rdr1\r
+ ret\r
+\r
+as0out:\r
+ in0 a,(stat0)\r
+ and M_TDRE\r
+ jr z,as0out\r
+ out0 (tdr0),c\r
+ ld a,c\r
+ ret\r
+\r
+as1out:\r
+ in0 a,(stat1)\r
+ and M_TDRE\r
+ jr z,as1out\r
+ out0 (tdr1),c\r
+ ld a,c\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+\r
+csio_rx_tmp: db 0ffh\r
+\r
+csio_ista:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ cp 0ffh\r
+ jr nz,csist_1\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ ld (hl),a\r
+ sub a,0ffh\r
+ ret z\r
+csist_1:\r
+ or 0ffh\r
+ ret\r
+\r
+csio_inp:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ ld (hl),0ffh\r
+ cp 0ffh\r
+ ret nz\r
+csin_1:\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ cp 0ffh\r
+ jr z,csin_1\r
+ ret\r
+\r
+csio_rd:\r
+ ld a,M_CSIO_RE\r
+ call csio_cmd_wait\r
+ in0 a,(trdr)\r
+ ret\r
+\r
+csio_out:\r
+ ld a,02\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ or a\r
+ jr z,csio_out\r
+\r
+ ld a,c\r
+ inc a ;ff..02 --> 00..03\r
+ cp 04h\r
+ jr nc,csout_1\r
+ ld a,00h\r
+ call csio_wr\r
+csout_1:\r
+ ld a,c\r
+csio_wr:\r
+ out0 (trdr),a\r
+ ld a,M_CSIO_TE\r
+csio_cmd_wait:\r
+ out0 (cntr),a\r
+cswr_wait:\r
+ in0 a,(cntr)\r
+ and M_CSIO_TE+M_CSIO_RE\r
+ jr nz,cswr_wait\r
+ ret\r
+\r
+ endif ; CPM\r
+\r
+;-------------------------------------------------------------------------------\r
\r
CMDTAB:\r
- dw ERROR ;cmd_@ ;examine/substitute the displacement register @\r
- dw ERROR ;cmd_A ;Assemble\r
+; dw ERROR ;cmd_@ ;examine/substitute the displacement register @\r
+; dw ERROR ;cmd_A ;Assemble\r
dw cmd_B ;Breakpoints display/set/clear\r
dw ERROR ;cmd_C ;trace over Calls\r
dw cmd_D ;Display memory in hex and ascii\r
- dw ERROR ;\r
+ dw cmd_E ;rElocate debugger\r
dw ERROR ;cmd_F ;specify Filename and command line\r
dw cmd_G ;Go\r
dw cmd_H ;compute Hex and other expressions\r
push hl\r
ld (cmd_rpt),hl\r
inc de\r
- sub '@'\r
+ sub 'B'\r
jr c,ERROR\r
cp 'Z'+1-'@'\r
jr nc,ERROR\r
sub_01d9h:\r
call pstr_inl\r
dc '-'\r
- dec hl\r
- jp cpl.hl\r
+ jp neg.hl\r
\r
out_hl_dec_neg:\r
push hl\r
l01c9h:\r
rlca\r
push af\r
- ld a,'0'/2\r
- adc a,a\r
- call outchar\r
+ and 1\r
+ call out_dgt\r
pop af\r
djnz l01c9h\r
ld a,'"'\r
push af\r
and 07fh\r
ld c,a\r
- call ?cono\r
+ call conout\r
ld hl,con_col\r
inc (hl)\r
pop af\r
push hl\r
push de\r
push bc\r
- call ?const\r
+ call const\r
and a\r
jr z,inch1\r
- call ?conin\r
+ call conin\r
scf\r
inch1:\r
pop bc\r
call DELC1\r
dec hl\r
dec b\r
- inc c\r
ld a,(hl)\r
cp ' '\r
ret nc\r
get_line:\r
push hl ;\r
ld hl,conbuf ;\r
- ld c,(hl) ;\r
- inc hl ;\r
- ld b,000h ;\r
- inc hl ;\r
+ ld b,0 ;\r
inlnxtch:\r
- ld a,c ;\r
- or a ;\r
+ ld a,b ;\r
+ cp CONBUF_SIZE ;\r
jr z,inl_e ;\r
call incharw ;\r
cp CR ;\r
call outchar ;\r
inc hl ;\r
inc b ;\r
- dec c ;\r
jr inlnxtch ;\r
\r
inl_e:\r
ld (hl),0\r
- ld hl,conbuf+1 ;\r
- ld (hl),b ;\r
call CRLF ;\r
- inc hl\r
- ex de,hl\r
+ ld de,conbuf ;\r
pop hl ;\r
ret ;\r
\r
ret m\r
jr l0348h\r
\r
-sub_034eh:\r
+get_arg_range_target:\r
call get_arg_range\r
push hl\r
push bc\r
call next_arg\r
- call sub_0363h\r
+ call get_arg_final\r
ex de,hl\r
pop bc\r
pop hl\r
jr c,error0\r
ret\r
\r
-sub_0363h:\r
+get_arg_final:\r
call sub_035dh\r
l0366h:\r
jp assert_eol\r
ld hl,TPA\r
cp 'L'\r
ret z\r
+ ld hl,(reg.pc)\r
+ cp '$'\r
+ ret z\r
cp '-'\r
jr z,fact_factneg\r
cp '~'\r
ld h,000h\r
ret\r
\r
+fact_factinv:\r
+ call fact_factor\r
+ jr cpl.hl\r
+\r
fact_factneg:\r
call fact_factor\r
+neg.hl:\r
dec hl\r
cpl.hl:\r
ld a,h\r
ld l,a\r
ret\r
\r
-fact_factinv:\r
- call fact_factor\r
- jr cpl.hl\r
-\r
fact_mem:\r
call expr1\r
jr c,error1\r
db 000h\r
db 000h\r
\r
+;-------------------------------------------------------------------------------\r
+; > E addr\r
+; relocate debugger to addr\r
+; > ER addr\r
+; relocate just below addr\r
+;\r
+; Move debugger to given address and restart.\r
+; New location must not overlap with current location.\r
+\r
+\r
+cmd_E:\r
+ call skipbl\r
+ sub 'R'\r
+ jr nz,$+3\r
+ inc de\r
+ push af\r
+ call get_arg_final\r
+\r
+ ex de,hl\r
+ ld hl,(bitmap_end)\r
+ ld bc,ddtz_base\r
+ or a\r
+ sbc hl,bc\r
+ ld b,h\r
+ ld c,l\r
+ ex de,hl\r
+ pop af\r
+ jr nz,cmde_bottom\r
+ sbc hl,bc\r
+cmde_bottom:\r
+ ld ix,cmde_clr-ddtz_base\r
+ ex de,hl ;de = dst\r
+ add ix,de\r
+ ld hl,ddtz_base ;hl = src\r
+\r
+ push hl\r
+ or a\r
+ sbc hl,de\r
+ call c,neg.hl ;abs(distance)\r
+ or a\r
+ sbc hl,bc\r
+ jp c,error\r
+ pop hl\r
+ push hl\r
+ push bc\r
+ ldir\r
+ pop bc\r
+ pop hl\r
+ jp (ix)\r
+\r
;-------------------------------------------------------------------------------\r
; > G [startaddr] [;breakp..]\r
; Go [to start] [with temporary breakpoints]\r
call get_line\r
call skipbl\r
jr z,l0c30h\r
- call sub_0363h\r
+ call get_arg_final\r
ex de,hl\r
pop bc\r
pop hl\r
ret\r
\r
;-------------------------------------------------------------------------------\r
-; > Vstartaddr endaddr targetaddr\r
+; > V startaddr endaddr targetaddr\r
; Verify (compare) two memory areas\r
\r
cmd_V:\r
- call sub_034eh\r
+ call get_arg_range_target\r
l0dedh:\r
push bc\r
ld a,(de)\r
; Move memory\r
\r
cmd_M:\r
- call sub_034eh\r
+ call get_arg_range_target\r
call cp_hl_de\r
jr nc,cmdm_up\r
add hl,bc\r
dec hl\r
dec de\r
lddr\r
- db 01h ;swallow ldir instruction (ld bc,...)\r
+ ret\r
cmdm_up:\r
ldir\r
ret\r
ret\r
\r
sub_0ee6h:\r
- ld hl,conbuf+1\r
+ ld hl,conbuf\r
call sub_0ef7h\r
- ld de,conbuf+1\r
+ ld de,conbuf\r
and a\r
sbc hl,de\r
ld b,l\r
i.storebyte:\r
push af\r
push de\r
- ld de,TPA ;lowest allowed load address\r
+ ld de,ddtz_base ;don't load over ddtz\r
call cp_hl_de\r
- jr c,error2\r
- ld de,(BDOS+1) ;highest allowed load address\r
+ jr nc,ist_1\r
+\r
+ ld de,(bitmap_end)\r
call cp_hl_de\r
jr nc,error2\r
+ist_1:\r
ld de,(high_load)\r
call cp_hl_de\r
jr c,l1157h\r
endm\r
endm\r
\r
-expr_buf:\r
-current_cseg defl $ - current_cseg\r
- .phase current_phase + current_cseg\r
-\r
-start:\r
- LD SP,ldr_end+(stack-ddtz_base)\r
- LD DE,signon ;ldr_end+(expr_buf-ddtz_base)\r
- LD C,BDOS_PSTR\r
- CALL BDOS\r
-\r
- xor a\r
- dec a\r
- jp po,reloc\r
- ld de,msgz80\r
- LD C,BDOS_PSTR\r
- CALL BDOS\r
- jp 0\r
-\r
-reloc:\r
- LD HL,ldr_end+ddtz_size ;start of reloc bitmap\r
- ld bc,0108h ;init bit counter\r
-\r
- EXX\r
- LD HL,(BDOS+1)\r
- LD (ldr_end+(ddtz_bdos+1-ddtz_base)),HL\r
- LD BC,ddtz_size-1\r
- LD D,B\r
- LD E,0FFH\r
- INC DE ;size rounded up to next page boundary\r
- INC BC ;ddtz_size\r
- OR A\r
- SBC HL,DE ;BDOS - size\r
- LD (BDOS+1),HL ;-> new BDOS entry\r
-\r
- push hl\r
- PUSH BC\r
- ld de,ldr_end\r
- sbc hl,de\r
- EX DE,HL ;-> DE\r
- LD HL,ldr_size\r
- add hl,bc\r
- ld b,h\r
- ld c,l\r
- LD HL,TPA\r
-reloc_lp:\r
- EXX\r
- djnz reloc_nl\r
- ld b,c ;reload bit counter\r
- LD e,(HL) ;get next 8 relocation bits\r
- INC HL\r
-reloc_nl:\r
- sla e\r
- EXX\r
- JR NC,reloc_next\r
- DEC HL\r
- LD A,(HL)\r
- ADD A,E\r
- LD (HL),A\r
- INC HL\r
- LD A,(HL)\r
- ADC A,D\r
- LD (HL),A\r
-reloc_next:\r
- cpi\r
- jp pe,reloc_lp\r
- dec hl\r
-\r
- POP BC\r
- pop de\r
- EX DE,HL\r
- ADD HL,BC\r
- EX DE,HL\r
- DEC DE\r
- LDDR\r
- LD HL,conbuf+2-ddtz_base\r
- ADD HL,DE\r
- JP (HL)\r
-\r
-current_phase defl $\r
- .dephase\r
-current_cseg defl $\r
-\r
- ds EXPR_BUF_SIZE - ($ - expr_buf)\r
-expr_bufe:\r
-\r
;-------------------------------------------------------------------------------\r
\r
last_S:\r
dw TPA\r
\r
pbl_loop_adr:\r
+ dw 0addeh\r
+\r
+bitmap_end:\r
dw 0\r
\r
+;-------------------------------------------------------------------------------\r
+\r
+conbuf:\r
+ ds CONBUF_SIZE+1\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ rept (STACK_SIZE+3)/4\r
+ db 0deh,0adh,0beh,0efh\r
+ endm\r
+stack:\r
+reg.l2: db 000h\r
+reg.h2: db 000h\r
+reg.e2: db 000h\r
+reg.d2: db 000h\r
+reg.c2: db 000h\r
+reg.b2: db 000h\r
+reg.f2: db 000h\r
+reg.a2: db 000h\r
+ db 000h\r
+reg.i: db 000h\r
+reg.iy: dw 0000h\r
+reg.ix: dw 0000h\r
+reg.f: db 000h\r
+reg.a: db 000h\r
+reg.c: db 000h\r
+reg.b: db 000h\r
+reg.e: db 000h\r
+reg.d: db 000h\r
+reg.l: db 000h\r
+reg.h: db 000h\r
+reg_sp: dw TPA\r
+reg.iff:\r
+ db 0f3h\r
+ db 0c3h\r
+reg.pc: dw TPA\r
+\r
+cmd_rpt:dw mainloop\r
+ db 0ffh,0ffh,0ffh\r
+;-------------------------------------------------------------------------------\r
+\r
ddtz_size equ $-ddtz_base\r
+prog_size equ $-start\r
ddtz_end:\r
\r
;-------------------------------------------------------------------------------\r
projects / ddt180.git / blobdiff