; - Use Digital Research Link-80 to generate a .PRL file (op switch).\r
; - Cut the .PRL header (first 256 byte) end rename the result to DDTZ.COM.\r
\r
-;-------------------------------------------------------------------------------\r
-; Relocation loader\r
-;\r
-TPA equ 0100h\r
- cseg\r
- .phase TPA\r
-\r
- jp start\r
- ds 3\r
\r
-ldr_end:\r
-ldr_size equ $ - TPA\r
-current_phase defl $\r
-\r
- .dephase\r
-current_cseg defl $\r
-\r
-;-------------------------------------------------------------------------------\r
-; DDT/Z core\r
-;\r
+ maclib config.inc\r
\r
; Some greneral definitions\r
\r
BDOS equ 5\r
TPA equ 0100h\r
\r
-; BDOS function calls\r
-\r
-BDOS_PSTR equ 9 ;Print String\r
-\r
; ddtz specific definitions\r
\r
STACK_SIZE equ 80 ;ddtz internal stack\r
CONBUF_SIZE equ 80 ;Size of console input buffer\r
-EXPR_BUF_SIZE equ 128 ;expressen buffer for conditional breakpoints\r
BP_CNT equ 12 ;Number of breakpoints\r
BP_SIZE equ 4 ;Size of a breakpoint record\r
\r
+bitmap_size equ (prog_size+7)/8\r
+\r
;-------------------------------------------------------------------------------\r
\r
-ddtz_base:\r
- jp ddtz_bdos\r
+ cseg\r
+start::\r
+ddtz_base::\r
+ jr reloc\r
+ nop\r
l0003h:\r
- rst 30h\r
-di_or_ei:\r
+ rst 30h ;rst used by ddtz\r
+di_or_ei: ;ints enabled/disabled while ddtz is running\r
nop\r
ret\r
-ddtz_bdos:\r
- jp 0\r
\r
-current_cseg defl $ - current_cseg\r
- .phase current_phase + current_cseg\r
+;-------------------------------------------------------------------------------\r
+\r
signon:\r
db 'DDTZ/180'\r
db ' - Version '\r
maclib version.inc\r
defvers\r
- db CR,LF,'$'\r
-msgz80:\r
- db 'Z80 or better required!',cr,lf,'$'\r
+ dc ' ('\r
\r
-current_phase defl $\r
- .dephase\r
-current_cseg defl $\r
- ds STACK_SIZE - (current_phase - signon)\r
+;-------------------------------------------------------------------------------\r
+; Clear old position\r
\r
+cmde_clr:\r
+ ld (hl),0\r
+ inc hl\r
+ dec bc\r
+ ld a,b\r
+ or c\r
+ jr nz,cmde_clr\r
\r
-stack:\r
-reg.l2: db 000h\r
-reg.h2: db 000h\r
-reg.e2: db 000h\r
-reg.d2: db 000h\r
-reg.c2: db 000h\r
-reg.b2: db 000h\r
-reg.f2: db 000h\r
-reg.a2: db 000h\r
- db 000h\r
-reg.i: db 000h\r
-reg.iy: dw 0000h\r
-reg.ix: dw 0000h\r
-reg.f: db 000h\r
-reg.a: db 000h\r
-reg.c: db 000h\r
-reg.b: db 000h\r
-reg.e: db 000h\r
-reg.d: db 000h\r
-reg.l: db 000h\r
-reg.h: db 000h\r
-reg_sp: dw TPA\r
-reg.iff:\r
- db 0f3h\r
- db 0c3h\r
-reg.pc: dw TPA\r
+; Determine current position\r
\r
-cmd_rpt:dw mainloop\r
+reloc:\r
+ ld bc,(028h-2)\r
+ ld de,(028h)\r
+ ld a,i ;get iff2\r
+ ex af,af'\r
+ di\r
+ ld sp,028h ;rst instr needs a minimal stack\r
+ ld hl,0e9e1h ;opcpdes pop hl/jp (hl)\r
+ ld (028h),hl\r
+ rst 028h\r
+wearehere:\r
+ ld (028h-2),bc\r
+ ld (028h),de\r
+ ld de,-(wearehere-ddtz_base)\r
+ add hl,de ; hl:\r
+\r
+ ld de,ddtz_base ; de:\r
+ or a\r
+ sbc hl,de\r
+ ex de,hl ; de: reloc offset\r
+ ld hl,stack\r
+ add hl,de\r
+ ld sp,hl\r
+ ex af,af'\r
+ push af\r
+ pop bc\r
+ bit 2,c\r
+ jr z,$+3\r
+ ei\r
+ ld hl,ddtz_end ;start of reloc bitmap\r
+ add hl,de\r
+\r
+ push hl\r
+ exx\r
+ pop hl\r
+ ld bc,0108h ;init bit counter b (c==reload val)\r
+ exx\r
+\r
+ LD HL,ddtz_base\r
+ add hl,de ;--> ddtz_base\r
+ ld bc,prog_size\r
+reloc_lp:\r
+ EXX\r
+ djnz reloc_nl\r
+ ld b,c ;reload bit counter\r
+ LD e,(HL) ;get next 8 relocation bits\r
+ INC HL\r
+reloc_nl:\r
+ sla e\r
+ EXX\r
+ JR NC,reloc_next\r
+ DEC HL\r
+ LD A,(HL)\r
+ ADD A,E\r
+ LD (HL),A\r
+ INC HL\r
+ LD A,(HL)\r
+ ADC A,D\r
+ LD (HL),A\r
+reloc_next:\r
+ inc hl\r
+ dec bc\r
+ ld a,b\r
+ or c\r
+ jr nz,reloc_lp\r
\r
;-------------------------------------------------------------------------------\r
\r
-conbuf:\r
- db CONBUF_SIZE\r
\r
- ld sp,stack\r
- exx\r
- ld de,ddtz_base\r
- call cp_hl_de\r
- jr c,l0079h\r
- ex de,hl\r
-l0079h:\r
- ld de,TPA\r
-l007ch:\r
- dec hl\r
- ld (hl),000h\r
- ld a,h\r
- sub d\r
- ld b,a\r
- ld a,l\r
- sub e\r
- or b\r
- jr nz,l007ch\r
- ld a,i\r
- ld (reg.i),a\r
- ld a,0f3h\r
- jp po,l0093h\r
- ld a,0fbh\r
-l0093h:\r
- ld (reg.iff),a\r
- call di_or_ei\r
- ld hl,ddtz_base\r
- ld l,000h\r
- ld (reg_sp),hl\r
+init::\r
+ LD SP,stack\r
\r
- ld hl,(1) ;wboot addr\r
- ld de,?const\r
- ld b,6\r
-vini_l:\r
- inc hl\r
- inc hl\r
- inc hl\r
+ if CPM\r
+\r
+ ld hl,(1) ;wboot addr\r
+ ld de,convec\r
ex de,hl\r
+ ld b,3\r
+vini_l:\r
+ inc de\r
+ inc de\r
+ inc de\r
inc hl\r
ld (hl),e\r
inc hl\r
ld (hl),d\r
inc hl\r
- ex de,hl\r
djnz vini_l\r
+ else\r
+ xor a\r
+ dec a\r
+ daa ; Z80: 099H, x180+: 0F9H\r
+ cp 99h ; Result on 180 type cpus is F9 here. Thanks Hitachi\r
+ jr z,ini_z80\r
+\r
+ xor a\r
+ call cinit\r
+ ld a,1\r
+ call cinit\r
+ jr ini_sign\r
+ini_z80:\r
+; if ...\r
+; .printx Error: Not yet implemented!\r
+; db "Stop\r
+; endif\r
+ endif ; CPM\r
+\r
+ini_sign:\r
+ ld hl,signon\r
+ call pstr\r
+ ld hl,ddtz_base\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ' - '\r
+ ld de,prog_size+bitmap_size-1\r
+ add hl,de\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ')',CR,LF\r
+\r
+ ld a,i\r
+ ld (reg.i),a\r
+ ld a,0f3h\r
+ jp po,l0093h\r
+ ld a,0fbh\r
+l0093h:\r
+ ld (reg.iff),a\r
+ call di_or_ei\r
+ ld hl,ddtz_base\r
+ ld l,000h\r
+ ld (reg_sp),hl\r
+\r
+ jp mainloop\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ if CPM\r
+\r
+convec:\r
+const: jp 0 ; return console input status\r
+conin: jp 0 ; return console input character\r
+conout: jp 0 ; send console output character\r
+\r
+ else\r
+\r
+ include z180reg.inc\r
+\r
+iobyte equ 3\r
+\r
+max_device equ 3\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+; init device\r
+cinit: ; a = device\r
+ call vector_io_0\r
+ dw as0init\r
+ dw rret\r
+ dw rret\r
+ dw rret\r
+\r
+; character input status\r
+const: ; return a != 0 if character waiting\r
+ call vector_io\r
+ dw as0ista\r
+ dw null$status\r
+ dw csio_ista\r
+ dw null$status\r
+\r
+; character input\r
+conin: ; return a = input char\r
+ call vector_io\r
+ dw as0inp\r
+ dw null$input\r
+ dw csio_inp\r
+ dw null$input\r
\r
- jr mainloop\r
+; character output\r
+conout: ; c = output char\r
+ call vector_io\r
+ dw as0out\r
+ dw rret\r
+ dw csio_out\r
+ dw rret\r
\r
- ds CONBUF_SIZE + 3 - ($ - conbuf)\r
+;-------------------------------------------------------------------------------\r
+\r
+vector_io:\r
+ ld a,(iobyte)\r
+vector_io_0:\r
+ pop hl\r
+ cp max_device\r
+ jr c,exist\r
+ ld a,max_device ; use null device if a >= max$device\r
+exist:\r
+ call add_hl_a2\r
+ ld a,(hl)\r
+ inc hl\r
+ ld h,(hl)\r
+ ld l,a\r
+ jp (hl)\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+null$input:\r
+ ld a,1Ah\r
+rret:\r
+ ret\r
+ret$true:\r
+ or 0FFh\r
+ ret\r
+\r
+null$status:\r
+ xor a\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+;\r
+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+;\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+; Init Serial I/O for console input and output (ASCI1)\r
+;\r
+\r
+\r
+\r
+as0init:\r
+ ld hl,initab0\r
+ jp ioiniml\r
+\r
+as1init:\r
+ ld hl,initab1\r
+ jp ioiniml\r
+\r
+\r
+ ld a,M_MPBT\r
+ out0 (cntlb1),a\r
+ ld a,M_RE + M_TE + M_MOD2 ;Rx/Tx enable\r
+ out0 (cntla1),a\r
+ ld a,M_RIE\r
+ out0 (stat1),a ;Enable rx interrupts\r
+\r
+ ret ;\r
+\r
+\r
+initab0:\r
+ db 1,stat0,0 ;Disable rx/tx interrupts\r
+ ;Enable baud rate generator\r
+ db 1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS\r
+ db 2,astc0l,low 28, high 28\r
+ db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+initab1:\r
+ db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
+ db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
+ db 2,astc1l,low 3, high 3\r
+ db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ioiniml:\r
+ push bc\r
+ xor a\r
+ioml_lp:\r
+ ld b,(hl)\r
+ inc hl\r
+ cp b\r
+ jr z,ioml_e\r
+\r
+ ld c,(hl)\r
+ inc hl\r
+ otimr\r
+ jr ioml_lp\r
+ioml_e:\r
+ pop bc\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+as0ista:\r
+ in0 a,(stat0)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as1ista:\r
+ in0 a,(stat1)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as0inp:\r
+ in0 a,(stat0)\r
+ rlca\r
+ jr nc,as0inp\r
+ in0 a,rdr0\r
+ ret\r
+\r
+as1inp:\r
+ in0 a,(stat1)\r
+ rlca\r
+ jr nc,as1inp\r
+ in0 a,rdr1\r
+ ret\r
+\r
+as0out:\r
+ in0 a,(stat0)\r
+ and M_TDRE\r
+ jr z,as0out\r
+ out0 (tdr0),c\r
+ ld a,c\r
+ ret\r
+\r
+as1out:\r
+ in0 a,(stat1)\r
+ and M_TDRE\r
+ jr z,as1out\r
+ out0 (tdr1),c\r
+ ld a,c\r
+ ret\r
\r
;-------------------------------------------------------------------------------\r
\r
-?const: jp 0 ; return console input status\r
-?conin: jp 0 ; return console input character\r
-?cono: jp 0 ; send console output character\r
-?list: jp 0 ; send list output character\r
-?auxo: jp 0 ; send auxiliary output character\r
-?auxi: jp 0 ; return auxiliary input character\r
\r
-CMDTAB:\r
- dw ERROR ;cmd_@ ;examine/substitute the displacement register @\r
- dw ERROR ;cmd_A ;Assemble\r
+csio_rx_tmp: db 0ffh\r
+\r
+csio_ista:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ cp 0ffh\r
+ jr nz,csist_1\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ ld (hl),a\r
+ sub a,0ffh\r
+ ret z\r
+csist_1:\r
+ or 0ffh\r
+ ret\r
+\r
+csio_inp:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ ld (hl),0ffh\r
+ cp 0ffh\r
+ ret nz\r
+csin_1:\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ cp 0ffh\r
+ jr z,csin_1\r
+ ret\r
+\r
+csio_rd:\r
+ ld a,M_CSIO_RE\r
+ call csio_cmd_wait\r
+ in0 a,(trdr)\r
+ ret\r
+\r
+csio_out:\r
+ ld a,02\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ or a\r
+ jr z,csio_out\r
+\r
+ ld a,c\r
+ inc a ;ff..02 --> 00..03\r
+ cp 04h\r
+ jr nc,csout_1\r
+ ld a,00h\r
+ call csio_wr\r
+csout_1:\r
+ ld a,c\r
+csio_wr:\r
+ out0 (trdr),a\r
+ ld a,M_CSIO_TE\r
+csio_cmd_wait:\r
+ out0 (cntr),a\r
+cswr_wait:\r
+ in0 a,(cntr)\r
+ and M_CSIO_TE+M_CSIO_RE\r
+ jr nz,cswr_wait\r
+ ret\r
+\r
+ endif ; CPM\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+CMDTAB::\r
+; dw ERROR ;cmd_@ ;examine/substitute the displacement register @\r
+; dw ERROR ;cmd_A ;Assemble\r
dw cmd_B ;Breakpoints display/set/clear\r
dw ERROR ;cmd_C ;trace over Calls\r
dw cmd_D ;Display memory in hex and ascii\r
- dw ERROR ;\r
+ dw cmd_E ;rElocate debugger\r
dw ERROR ;cmd_F ;specify Filename and command line\r
dw cmd_G ;Go\r
dw cmd_H ;compute Hex and other expressions\r
call pstr_inl\r
dc '?',CR,LF\r
;fall thru\r
-mainloop:\r
+mainloop::\r
ld sp,stack\r
ld hl,(reg.pc)\r
call bp_clr_temporary\r
push hl\r
ld (cmd_rpt),hl\r
inc de\r
- sub '@'\r
+ sub 'B'\r
jr c,ERROR\r
cp 'Z'+1-'@'\r
jr nc,ERROR\r
sub_01d9h:\r
call pstr_inl\r
dc '-'\r
- dec hl\r
- jp cpl.hl\r
+ jp neg.hl\r
\r
out_hl_dec_neg:\r
push hl\r
l01c9h:\r
rlca\r
push af\r
- ld a,'0'/2\r
- adc a,a\r
- call outchar\r
+ and 1\r
+ call out_dgt\r
pop af\r
djnz l01c9h\r
ld a,'"'\r
push af\r
and 07fh\r
ld c,a\r
- call ?cono\r
+ call conout\r
ld hl,con_col\r
inc (hl)\r
pop af\r
pop ix\r
ret\r
\r
-pstr_sel:\r
- inc b\r
- jr pstr_sel2\r
-pstr_sel1:\r
- call sub_0345h\r
-pstr_sel2:\r
- djnz pstr_sel1\r
- ;fall thru\r
-pstr:\r
- ld a,(hl)\r
- inc hl\r
- and a\r
- ret z\r
- call outchar\r
- ret m\r
- jr pstr\r
-\r
-pstr_inl:\r
- ex (sp),hl\r
- call pstr\r
- ex (sp),hl\r
- ret\r
-\r
p_goto_col:\r
ld a,(con_col)\r
cp c\r
push hl\r
push de\r
push bc\r
- call ?const\r
+ call const\r
and a\r
jr z,inch1\r
- call ?conin\r
+ call conin\r
scf\r
inch1:\r
pop bc\r
call DELC1\r
dec hl\r
dec b\r
- inc c\r
ld a,(hl)\r
cp ' '\r
ret nc\r
get_line:\r
push hl ;\r
ld hl,conbuf ;\r
- ld c,(hl) ;\r
- inc hl ;\r
- ld b,000h ;\r
- inc hl ;\r
+ ld b,0 ;\r
inlnxtch:\r
- ld a,c ;\r
- or a ;\r
+ ld a,b ;\r
+ cp CONBUF_SIZE ;\r
jr z,inl_e ;\r
call incharw ;\r
cp CR ;\r
call outchar ;\r
inc hl ;\r
inc b ;\r
- dec c ;\r
jr inlnxtch ;\r
\r
inl_e:\r
ld (hl),0\r
- ld hl,conbuf+1 ;\r
- ld (hl),b ;\r
call CRLF ;\r
- inc hl\r
- ex de,hl\r
+ ld de,conbuf ;\r
pop hl ;\r
ret ;\r
\r
pop bc\r
ret\r
l0336h:\r
- call sub_0345h\r
+ call str_sel_next\r
l0339h:\r
pop de\r
and a\r
pop bc\r
ret\r
\r
-sub_0345h:\r
+str_sel:\r
+ inc b\r
+ jr str_sel2\r
+str_sel1:\r
+ call str_sel_next\r
+str_sel2:\r
+ djnz str_sel1\r
+ ret\r
+\r
+str_sel_next:\r
ld a,(hl)\r
and a\r
ret z\r
ret m\r
jr l0348h\r
\r
-sub_034eh:\r
+get_arg_range_target:\r
call get_arg_range\r
push hl\r
push bc\r
call next_arg\r
- call sub_0363h\r
+ call get_arg_final\r
ex de,hl\r
pop bc\r
pop hl\r
jr c,error0\r
ret\r
\r
-sub_0363h:\r
+get_arg_final:\r
call sub_035dh\r
l0366h:\r
jp assert_eol\r
ld hl,TPA\r
cp 'L'\r
ret z\r
+ ld hl,(reg.pc)\r
+ cp '$'\r
+ ret z\r
cp '-'\r
jr z,fact_factneg\r
cp '~'\r
ld h,000h\r
ret\r
\r
+fact_factinv:\r
+ call fact_factor\r
+ jr cpl.hl\r
+\r
fact_factneg:\r
call fact_factor\r
+neg.hl:\r
dec hl\r
cpl.hl:\r
ld a,h\r
ld l,a\r
ret\r
\r
-fact_factinv:\r
- call fact_factor\r
- jr cpl.hl\r
-\r
fact_mem:\r
call expr1\r
jr c,error1\r
db 000h\r
\r
;-------------------------------------------------------------------------------\r
-; > G [startaddr] [;breakp..]\r
-; Go [to start] [with temporary breakpoints]\r
+; > E addr\r
+; relocate debugger to addr\r
+; > ER addr\r
+; relocate just below addr\r
+;\r
+; Move debugger to given address and restart.\r
+; New location must not overlap with current location.\r
\r
-cmd_G:\r
- sub a\r
- ld (bp_p_cpu_flag),a\r
- call expr\r
- jr c,l0740h\r
+\r
+cmd_E:\r
+ call skipbl\r
+ sub 'R'\r
+ jr nz,$+3\r
+ inc de\r
+ push af\r
+ call get_arg_final\r
+\r
+ ld bc,prog_size+bitmap_size\r
+ pop af\r
+ jr nz,cmde_bottom\r
+ sbc hl,bc\r
+cmde_bottom:\r
+ ld ix,cmde_clr-ddtz_base\r
+ ex de,hl ;de = dst\r
+ add ix,de\r
+ ld hl,ddtz_base ;hl = src\r
+\r
+ push hl\r
+ or a\r
+ sbc hl,de\r
+ call c,neg.hl ;abs(distance)\r
+ or a\r
+ sbc hl,bc\r
+ jp c,error\r
+ pop hl\r
+ push hl\r
+ push bc\r
+ ldir\r
+ pop bc\r
+ pop hl\r
+ jp (ix)\r
+\r
+;-------------------------------------------------------------------------------\r
+; > G [startaddr] [;breakp..]\r
+; Go [to start] [with temporary breakpoints]\r
+\r
+cmd_G:\r
+ sub a\r
+ ld (bp_p_cpu_flag),a\r
+ call expr\r
+ jr c,l0740h\r
ld (reg.pc),hl\r
l0740h:\r
call skipbl\r
call get_line\r
call skipbl\r
jr z,l0c30h\r
- call sub_0363h\r
+ call get_arg_final\r
ex de,hl\r
pop bc\r
pop hl\r
ret\r
\r
;-------------------------------------------------------------------------------\r
-; > Vstartaddr endaddr targetaddr\r
+; > V startaddr endaddr targetaddr\r
; Verify (compare) two memory areas\r
\r
cmd_V:\r
- call sub_034eh\r
+ call get_arg_range_target\r
l0dedh:\r
push bc\r
ld a,(de)\r
; Move memory\r
\r
cmd_M:\r
- call sub_034eh\r
+ call get_arg_range_target\r
call cp_hl_de\r
jr nc,cmdm_up\r
add hl,bc\r
dec hl\r
dec de\r
lddr\r
- db 01h ;swallow ldir instruction (ld bc,...)\r
+ ret\r
cmdm_up:\r
ldir\r
ret\r
ret\r
\r
sub_0ee6h:\r
- ld hl,conbuf+1\r
+ ld hl,conbuf\r
call sub_0ef7h\r
- ld de,conbuf+1\r
+ ld de,conbuf\r
and a\r
sbc hl,de\r
ld b,l\r
\r
disas_pfx.ED:\r
inc iy\r
- ld hl,b_1bc9_start ;1 byte opcode, no arguments\r
- call lookup_op\r
- ld b,2\r
- ret c\r
- ld hl,b_1bf4_start\r
- call lookup_op_arg\r
- ld b,2\r
- ret c\r
-\r
ld hl,l228bh\r
call lookup_op_arg\r
ld b,3\r
ld hl,b_1c40_start\r
call lookup_op_arg\r
ld b,4\r
+ ret c\r
+\r
+ ld hl,b_1bc9_start ;1 byte opcode, no arguments\r
+ call lookup_op\r
+ jr c,da_ed1\r
+\r
+ ld hl,b_1bf4_start\r
+ call lookup_op_arg\r
+ ret nc\r
+\r
+ ld a,e\r
+ cp a_noarg\r
+ jr nz,da_ed0\r
+ ld c,(iy+0)\r
+ ld a,c\r
+ rra\r
+ and 0ch\r
+ ld b,a\r
+ ld a,c\r
+ and 03h\r
+ call str_sel_ab\r
+\r
+da_ed0:\r
+ scf\r
+da_ed1:\r
+ ld b,2\r
ret\r
\r
;-------------------------------------------------------------------------------\r
\r
;-------------------------------------------------------------------------------\r
\r
-lookup_op:\r
- ld a,(hl)\r
- cp 0ffh\r
- ret z\r
- cp (iy+000h)\r
- jr z,l1a7fh\r
- inc hl\r
- inc hl\r
- jr lookup_op\r
-l1a7fh:\r
- ld e,a_noarg\r
- inc hl\r
- ld c,(hl)\r
- jr get_mnemonic\r
-\r
-\r
test_DDFD:\r
ld a,(hl)\r
and a\r
scf\r
ret\r
\r
-lookup_op_arg:\r
- ld a,(iy+000h)\r
- and (hl)\r
- inc hl\r
- cp (hl)\r
- jr z,l1aa8h\r
- inc hl\r
+lookup_op:\r
+ ld a,(hl)\r
inc hl\r
+ cp 0ffh\r
+ ret z\r
+ cp (iy+000h)\r
+ jr z,l1a7fh\r
inc hl\r
- ld a,(hl)\r
- and a\r
- jr nz,lookup_op_arg\r
- ret\r
+ jr lookup_op\r
+l1a7fh:\r
+ ld b,(hl)\r
+ ld e,a_noarg\r
+ jr get_mnemonic\r
\r
-l1aa8h:\r
- inc hl\r
- ld c,(hl)\r
- inc c\r
+lookup_op_arg:\r
+ call lookup_branch_op\r
+ ret nc\r
+ ld a,e\r
+ ld e,d\r
+ cp a,0ffh\r
ret z ;carry clear\r
- dec c\r
- inc hl\r
- ld e,(hl)\r
+ ld b,a\r
+\r
get_mnemonic:\r
ld hl,t_MNEMONICS\r
- ld b,0\r
- add hl,bc\r
+ bit 7,b\r
+ jr z,get_m1\r
+ res 7,b\r
+ ld a,(iy+000h)\r
+ rra\r
+ rra\r
+ rra\r
+ and 07h\r
+str_sel_ab:\r
+ add b\r
+ ld b,a\r
+get_m1:\r
+ call str_sel\r
scf\r
ret\r
\r
lookup_branch_op ;TODO\r
- ld a,(iy+000h)\r
- and (hl)\r
+ ld a,(hl)\r
+ and a\r
+ ret z\r
inc hl\r
+ and (iy+000h)\r
cp (hl)\r
- jr z,l1aa8_br\r
inc hl\r
+ jr z,l1aa8_br\r
inc hl\r
inc hl\r
- ld a,(hl)\r
- and a\r
- jr nz,lookup_branch_op\r
- ret\r
+ jr lookup_branch_op\r
\r
l1aa8_br:\r
- inc hl\r
ld e,(hl)\r
inc hl\r
ld d,(hl)\r
; 1 byte opcodes (no parameters)\r
; Format: db opcode, t_MNEMONICS-index\r
b_1ab6_start:\r
- db 076h,o_HALT ;halt\r
- db 0d9h,o_EXX ;exx\r
- db 0f3h,o_DI ;di\r
- db 0fbh,o_EI ;ei\r
- db 000h,o_NOP ;nop\r
- db 007h,o_RLCA ;rlca\r
- db 00fh,o_RRCA ;rrca\r
- db 017h,o_RLA ;rla\r
- db 01fh,o_RRA ;rra\r
- db 027h,o_DAA ;daa\r
- db 02fh,o_CPL ;cpl\r
- db 037h,o_SCF ;scf\r
- db 03fh,o_CCF ;ccf\r
- db 0c9h,o_RET ;ret\r
+ db 076h,i_HALT ;halt\r
+ db 0d9h,i_EXX ;exx\r
+ db 0f3h,i_DI ;di\r
+ db 0fbh,i_EI ;ei\r
+ db 000h,i_NOP ;nop\r
+; db 007h,i_RLCA ;rlca\r
+; db 00fh,i_RRCA ;rrca\r
+; db 017h,i_RLA ;rla\r
+; db 01fh,i_RRA ;rra\r
+; db 027h,i_DAA ;daa\r
+; db 02fh,i_CPL ;cpl\r
+; db 037h,i_SCF ;scf\r
+; db 03fh,i_CCF ;ccf\r
+ db 0c9h,i_RET ;ret\r
db 0ffh\r
\r
\r
; Format: db mask, match, t_MNEMONICS-index\r
; dw argument formating function\r
b_1ad1_start:\r
- db 0c0h,040h,o_LD ;ld r[y],r[z]\r
+ db 0c0h,040h,i_LD ;ld r[y],r[z]\r
db a_rr\r
- db 0f8h,080h,o_ADD ;add a,r[z]\r
- db a_ar\r
- db 0f8h,088h,o_ADC ;adc a,r[z]\r
- db a_ar\r
- db 0f8h,090h,o_SUB ;sub r[z]\r
- db a_r\r
- db 0f8h,098h,o_SBC ;sbc a,r[z]\r
- db a_ar\r
- db 0f8h,0a0h,o_AND ;and r[z]\r
- db a_r\r
- db 0f8h,0a8h,o_XOR ;xor r[z]\r
- db a_r\r
- db 0f8h,0b0h,o_OR ;or r[z]\r
- db a_r\r
- db 0f8h,0b8h,o_CP ;cp r[z]\r
+\r
+ db 0c0h,080h,i_ADD+080h ;add a,r[z]\r
db a_r\r
- db 0c7h,0c0h,o_RET ;ret cc\r
+\r
+; db 0f8h,080h,i_ADD ;add a,r[z]\r
+; db a_ar\r
+; db 0f8h,088h,i_ADC ;adc a,r[z]\r
+; db a_ar\r
+; db 0f8h,090h,i_SUB ;sub r[z]\r
+; db a_r\r
+; db 0f8h,098h,i_SBC ;sbc a,r[z]\r
+; db a_ar\r
+; db 0f8h,0a0h,i_AND ;and r[z]\r
+; db a_r\r
+; db 0f8h,0a8h,i_XOR ;xor r[z]\r
+; db a_r\r
+; db 0f8h,0b0h,i_OR ;or r[z]\r
+; db a_r\r
+; db 0f8h,0b8h,i_CP ;cp r[z]\r
+; db a_r\r
+\r
+ db 0c7h,0c0h,i_RET ;ret cc\r
db a_cc\r
- db 0c7h,0c7h,o_RST ;rst\r
+ db 0c7h,0c7h,i_RST ;rst\r
db a_rst\r
- db 0cfh,0c1h,o_POP ;pop rp2\r
+ db 0cfh,0c1h,i_POP ;pop rp2\r
db a_p2\r
- db 0cfh,0c5h,o_PUSH ;push rp2\r
+ db 0cfh,0c5h,i_PUSH ;push rp2\r
db a_p2\r
- db 0ffh,0e3h,o_EX ;ex (sp),hl\r
+ db 0ffh,0e3h,i_EX ;ex (sp),hl\r
db a_esphl\r
- db 0ffh,0e9h,o_JP ;jp (hl)\r
+ db 0ffh,0e9h,i_JP ;jp (hl)\r
db a_hl\r
- db 0ffh,0ebh,o_EX ;ex de,hl\r
+ db 0ffh,0ebh,i_EX ;ex de,hl\r
db a_dehl\r
- db 0ffh,0f9h,o_LD ;ld sp,hl\r
+ db 0ffh,0f9h,i_LD ;ld sp,hl\r
db a_lsphl\r
- db 0cfh,003h,o_INC ;inc rp\r
+ db 0cfh,003h,i_INC ;inc rp\r
db a_p\r
- db 0cfh,00bh,o_DEC ;dec rp\r
+ db 0cfh,00bh,i_DEC ;dec rp\r
db a_p\r
- db 0c7h,004h,o_INC ;inc r[y]\r
+ db 0c7h,004h,i_INC ;inc r[y]\r
db a_ry\r
- db 0c7h,005h,o_DEC ;dec r[y]\r
+ db 0c7h,005h,i_DEC ;dec r[y]\r
db a_ry\r
- db 0ffh,008h,o_EX ;ex af,af'\r
+ db 0ffh,008h,i_EX ;ex af,af'\r
db a_eaf\r
- db 0cfh,009h,o_ADD ;add hl,rp\r
+ db 0cfh,009h,i_ADD ;add hl,rp\r
db a_hlp\r
- db 0efh,002h,o_LD ;ld (rp),a ;rp=bc,de\r
+ db 0efh,002h,i_LD ;ld (rp),a ;rp=bc,de\r
db a_pa\r
- db 0efh,00ah,o_LD ;ld a,(rp) ;rp=bc,de\r
+ db 0efh,00ah,i_LD ;ld a,(rp) ;rp=bc,de\r
db a_ap\r
+\r
+ db 0c7h,007h,i_RLCA+080h;rlca\r
+ db a_noarg\r
+\r
db 0\r
\r
; 2 byte opcodes\r
b_1b54_start:\r
- db 0c7h,006h,o_LD ;ld r[y],nn\r
+ db 0c7h,006h,i_LD ;ld r[y],nn\r
db a_rn\r
- db 0ffh,0c6h,o_ADD ;add a,nn\r
- db a_an\r
- db 0ffh,0ceh,o_ADC ;adc a,nn\r
- db a_an\r
- db 0ffh,0d6h,o_SUB ;sub nn\r
- db a_n\r
- db 0ffh,0deh,o_SBC ;sbc a,nn\r
- db a_an\r
- db 0ffh,0e6h,o_AND ;and nn\r
- db a_n\r
- db 0ffh,0eeh,o_XOR ;xor nn\r
- db a_n\r
- db 0ffh,0f6h,o_OR ;or nn\r
- db a_n\r
- db 0ffh,0feh,o_CP ;cp nn\r
+\r
+ db 0c7h,0c6h,i_ADD+080h ;add a,r[z]\r
db a_n\r
- db 0ffh,010h,o_DJNZ ;djnz\r
+\r
+; db 0ffh,0c6h,i_ADD ;add a,nn\r
+; db a_an\r
+; db 0ffh,0ceh,i_ADC ;adc a,nn\r
+; db a_an\r
+; db 0ffh,0d6h,i_SUB ;sub nn\r
+; db a_n\r
+; db 0ffh,0deh,i_SBC ;sbc a,nn\r
+; db a_an\r
+; db 0ffh,0e6h,i_AND ;and nn\r
+; db a_n\r
+; db 0ffh,0eeh,i_XOR ;xor nn\r
+; db a_n\r
+; db 0ffh,0f6h,i_OR ;or nn\r
+; db a_n\r
+; db 0ffh,0feh,i_CP ;cp nn\r
+; db a_n\r
+\r
+ db 0ffh,010h,i_DJNZ ;djnz\r
db a_j\r
- db 0ffh,018h,o_JR ;jr\r
+ db 0ffh,018h,i_JR ;jr\r
db a_j\r
- db 0e7h,020h,o_JR ;jr cc,\r
+ db 0e7h,020h,i_JR ;jr cc,\r
db a_ccj\r
- db 0ffh,0d3h,o_OUT ;out (nn),a\r
+ db 0ffh,0d3h,i_OUT ;out (nn),a\r
db a_ma\r
- db 0ffh,0dbh,o_IN ;in a,(nn)\r
+ db 0ffh,0dbh,i_IN ;in a,(nn)\r
db a_am\r
db 0\r
\r
; 3 byte opcodes\r
b_1b9b_start:\r
- db 0c7h,0c2h,o_JP ;jp cc,mn\r
+ db 0c7h,0c2h,i_JP ;jp cc,mn\r
db a_ccnn\r
- db 0c7h,0c4h,o_CALL ;call cc,mn\r
+ db 0c7h,0c4h,i_CALL ;call cc,mn\r
db a_ccnn\r
- db 0cfh,001h,o_LD ;ld ww,mn\r
+ db 0cfh,001h,i_LD ;ld ww,mn\r
db a_rnn\r
- db 0ffh,0c3h,o_JP ;jp mn\r
+ db 0ffh,0c3h,i_JP ;jp mn\r
db a_nn\r
- db 0ffh,0cdh,o_CALL ;call mn\r
+ db 0ffh,0cdh,i_CALL ;call mn\r
db a_nn\r
- db 0ffh,022h,o_LD ;ld (mn),hl\r
+ db 0ffh,022h,i_LD ;ld (mn),hl\r
db a_mmhl\r
- db 0ffh,02ah,o_LD ;ld hl,(mn)\r
+ db 0ffh,02ah,i_LD ;ld hl,(mn)\r
db a_hlmm\r
- db 0ffh,032h,o_LD ;ld (mn),a\r
+ db 0ffh,032h,i_LD ;ld (mn),a\r
db a_mma\r
- db 0ffh,03ah,o_LD ;ld a,(mn)\r
+ db 0ffh,03ah,i_LD ;ld a,(mn)\r
db a_amm\r
db 0\r
\r
; Prefix ED + 1 byte opcode, no arguments\r
; Format: opcode, t_MNEMONICS index\r
b_1bc9_start:\r
- db 044h,o_NEG ;neg\r
- db 045h,o_RETN ;retn\r
- db 04dh,o_RETI ;reti\r
- db 067h,o_RRD ;rrd\r
- db 06fh,o_RLD ;rld\r
- db 0a0h,o_LDI ;ldi\r
- db 0a1h,o_CPI ;cpi\r
- db 0a2h,o_INI ;ini\r
- db 0a3h,o_OUTI ;outi\r
- db 0a8h,o_LDD ;ldd\r
- db 0a9h,o_CPD ;cpd\r
- db 0aah,o_IND ;ind\r
- db 0abh,o_OUTD ;outd\r
- db 0b0h,o_LDIR ;ldir\r
- db 0b1h,o_CPIR ;cpir\r
- db 0b2h,o_INIR ;inir\r
- db 0b3h,o_OTIR ;otir\r
- db 0b8h,o_LDDR ;lddr\r
- db 0b9h,o_CPDR ;cpdr\r
- db 0bah,o_INDR ;indr\r
- db 0bbh,o_OTDR ;otdr\r
- db 08bh,o_OTDM ;otdm\r
- db 09bh,o_OTDMR ;otdmr\r
- db 083h,o_OTIM ;otim\r
- db 093h,o_OTIMR ;otimr\r
- db 076h,o_SLP ;slp\r
+ db 044h,i_NEG ;neg\r
+ db 045h,i_RETN ;retn\r
+ db 04dh,i_RETI ;reti\r
+ db 067h,i_RRD ;rrd\r
+ db 06fh,i_RLD ;rld\r
+; db 0a0h,i_LDI ;ldi\r
+; db 0a1h,i_CPI ;cpi\r
+; db 0a2h,i_INI ;ini\r
+; db 0a3h,i_OUTI ;outi\r
+; db 0a8h,i_LDD ;ldd\r
+; db 0a9h,i_CPD ;cpd\r
+; db 0aah,i_IND ;ind\r
+; db 0abh,i_OUTD ;outd\r
+; db 0b0h,i_LDIR ;ldir\r
+; db 0b1h,i_CPIR ;cpir\r
+; db 0b2h,i_INIR ;inir\r
+; db 0b3h,i_OTIR ;otir\r
+; db 0b8h,i_LDDR ;lddr\r
+; db 0b9h,i_CPDR ;cpdr\r
+; db 0bah,i_INDR ;indr\r
+; db 0bbh,i_OTDR ;otdr\r
+ db 08bh,i_OTDM ;otdm\r
+ db 09bh,i_OTDMR ;otdmr\r
+ db 083h,i_OTIM ;otim\r
+ db 093h,i_OTIMR ;otimr\r
+ db 076h,i_SLP ;slp\r
db 0ffh ;<end mark>\r
\r
b_1bf4_start:\r
- db 0ffh,070h,o_IN ;in (c) ;\r
+ db 0e4h,0a0h,i_LDI\r
+ db a_noarg\r
+ db 0ffh,070h,i_IN ;in (c) ;\r
db a_c\r
- db 0c7h,040h,o_IN ;in r,(c) ;r=b,c,d,e,h,l,a\r
+ db 0c7h,040h,i_IN ;in r,(c) ;r=b,c,d,e,h,l,a\r
db a_rc\r
db 0ffh,071h,0ffh ;out (c),0 ;\r
db a_cr\r
- db 0c7h,041h,o_OUT ;out (c),r ;r=b,c,d,e,h,l,a\r
+ db 0c7h,041h,i_OUT ;out (c),r ;r=b,c,d,e,h,l,a\r
db a_cr\r
- db 0cfh,042h,o_SBC ;sbc hl,rp\r
+ db 0cfh,042h,i_SBC ;sbc hl,rp\r
db a_hlp\r
- db 0cfh,04ah,o_ADC ;adc hl,rp\r
+ db 0cfh,04ah,i_ADC ;adc hl,rp\r
db a_hlp\r
- db 0ffh,046h,o_IM ;im 0\r
+ db 0ffh,046h,i_IM ;im 0\r
db a_im0\r
- db 0ffh,056h,o_IM ;im 1\r
+ db 0ffh,056h,i_IM ;im 1\r
db a_im1\r
- db 0ffh,05eh,o_IM ;im 2\r
+ db 0ffh,05eh,i_IM ;im 2\r
db a_im2\r
- db 0e7h,047h,o_LD ;ld i,a ... ld a,r\r
+ db 0e7h,047h,i_LD ;ld i,a ... ld a,r\r
db a_ai\r
- db 0cfh,04ch,o_MLT ;mlt rr\r
+ db 0cfh,04ch,i_MLT ;mlt rr\r
db a_p\r
- db 0c7h,004h,o_TST ;tst r\r
+ db 0c7h,004h,i_TST ;tst r\r
db a_ry\r
db 0\r
\r
l228bh:\r
- db 0ffh,030h,o_IN0 ;in0 (m)\r
+ db 0ffh,030h,i_IN0 ;in0 (m)\r
db a_m\r
- db 0c7h,000h,o_IN0 ;in0 r,(m) ;r=b,c,d,e,h,l,a\r
+ db 0c7h,000h,i_IN0 ;in0 r,(m) ;r=b,c,d,e,h,l,a\r
db a_rm\r
db 0ffh,031h,0ffh ;out0 (m),0\r
db a_mr\r
- db 0c7h,001h,o_OUT0 ;out0 (m),r ;r=b,c,d,e\r
+ db 0c7h,001h,i_OUT0 ;out0 (m),r ;r=b,c,d,e\r
db a_mr\r
- db 0ffh,064h,o_TST ;tst m\r
+ db 0ffh,064h,i_TST ;tst m\r
db a_n\r
- db 0ffh,074h,o_TSTIO ;tstio m\r
+ db 0ffh,074h,i_TSTIO ;tstio m\r
db a_n\r
db 0\r
\r
; Format: db mask, match, t_MNEMONICS-index\r
; dw argument formating function\r
b_1c40_start:\r
- db 0cfh,043h,o_LD ;ld (mn),ww ;ww=bc,de,hl,sp\r
+ db 0cfh,043h,i_LD ;ld (mn),ww ;ww=bc,de,hl,sp\r
db a_mmp\r
- db 0cfh,04bh,o_LD ;ld ww,(mn) ;ww=bc,de,hl,sp\r
+ db 0cfh,04bh,i_LD ;ld ww,(mn) ;ww=bc,de,hl,sp\r
db a_pmm\r
db 0\r
\r
; CB\r
b_1c55_start:\r
- db 0f8h,000h,o_RLC ;rlc g\r
- db a_cbr\r
- db 0f8h,008h,o_RRC ;rrc g\r
- db a_cbr\r
- db 0f8h,010h,o_RL ;rl g\r
+ db 0c0h,000h,i_RLC+080h ;rlc g\r
db a_cbr\r
- db 0f8h,018h,o_RR ;rr g\r
- db a_cbr\r
- db 0f8h,020h,o_SLA ;sla g\r
- db a_cbr\r
- db 0f8h,028h,o_SRA ;sra g\r
- db a_cbr\r
- db 0f8h,038h,o_SRL ;srl g\r
- db a_cbr\r
- db 0c0h,040h,o_BIT ;bit b,g\r
+\r
+; db 0f8h,000h,i_RLC ;rlc g\r
+; db a_cbr\r
+; db 0f8h,008h,i_RRC ;rrc g\r
+; db a_cbr\r
+; db 0f8h,010h,i_RL ;rl g\r
+; db a_cbr\r
+; db 0f8h,018h,i_RR ;rr g\r
+; db a_cbr\r
+; db 0f8h,020h,i_SLA ;sla g\r
+; db a_cbr\r
+; db 0f8h,028h,i_SRA ;sra g\r
+; db a_cbr\r
+; db 0f8h,038h,i_SRL ;srl g\r
+; db a_cbr\r
+ db 0c0h,040h,i_BIT ;bit b,g\r
db a_bcbr\r
- db 0c0h,080h,o_RES ;res b,g\r
+ db 0c0h,080h,i_RES ;res b,g\r
db a_bcbr\r
- db 0c0h,0c0h,o_SET ;set b,g\r
+ db 0c0h,0c0h,i_SET ;set b,g\r
db a_bcbr\r
db 0\r
\r
inc hl\r
ld h,(hl)\r
ld l,a\r
+ ld a,(iy+000h)\r
call CALL_HL\r
pop hl\r
jr pria_l\r
db fi_ry,',' ;ld r[y],r[z]\r
a_r equ $-t_argf\r
db fi_rz,0 ;op r[z]\r
-a_ar equ $-t_argf\r
- db 'A,',fi_rz,0 ;op A,r[z]\r
+;a_ar equ $-t_argf\r
+; db 'A,',fi_rz,0 ;op A,r[z]\r
a_cc equ $-t_argf\r
db fi_ccy,0 ;op cc[y]\r
a_rst equ $-t_argf\r
; 2 byte opcodes\r
a_rn equ $-t_argf\r
db fi_ry,',',fi_n,0 ;ld r[y],n\r
-a_an equ $-t_argf\r
- db 'A,' ;op a,n\r
+;a_an equ $-t_argf\r
+; db 'A,' ;op a,n\r
a_n equ $-t_argf\r
db fi_n,0 ;op n\r
a_ccj equ $-t_argf\r
argpf y\r
\r
\r
+p_n:\r
+ ld a,(isprefix_ixiy)\r
+ and a\r
+ ld a,(iy+001h)\r
+ jr z,out_hex_0\r
+ ld a,(iy+002h)\r
+ jr out_hex_0\r
+\r
+p_rst:\r
+ and 038h\r
+out_hex_0:\r
+ jp out_hex\r
+\r
+\r
+p_j:\r
+ ld c,(iy+001h)\r
+ ld a,c\r
+ rla\r
+ sbc a,a\r
+ ld b,a\r
+ push iy\r
+ pop hl\r
+ add hl,bc\r
+ inc hl\r
+ inc hl\r
+ jr out_hl_0\r
+\r
+p_nn:\r
+ ld l,(iy+001h)\r
+ ld h,(iy+002h)\r
+out_hl_0:\r
+ jp out_hl\r
+\r
p_ir:\r
- ld a,(iy+000h)\r
rra\r
rra\r
rra\r
and 03\r
ld hl,t_arg_IR\r
- jp p_arg\r
+ jr p_arg\r
\r
\r
get_cb_opc:\r
\r
p_rz_cb:\r
call get_cb_opc\r
- jr p_r0\r
+ jr p_rz\r
\r
p_ry:\r
- ld a,(iy+000h)\r
rra\r
rra\r
rra\r
- jr p_r0\r
p_rz:\r
- ld a,(iy+000h)\r
-p_r0:\r
and 007h\r
cp 006h\r
ld b,a\r
\r
p_rp2:\r
ld hl,t_arg_rp2\r
- jr l1e8eh\r
+ db 0ddh ;swallow t_arg_rp in ix\r
p_rp:\r
ld hl,t_arg_rp\r
-l1e8eh:\r
- ld a,(iy+000h)\r
rra\r
rra\r
rra\r
jr p_arg\r
\r
p_ccy2:\r
- ld a,(iy+000h)\r
and 018h\r
- jr p_cc0\r
p_ccy:\r
- ld a,(iy+000h)\r
-p_cc0:\r
rra\r
rra\r
rra\r
p_arg:\r
ld b,a\r
p_arg0:\r
- jp pstr_sel\r
-\r
-\r
-p_n:\r
- ld a,(isprefix_ixiy)\r
- and a\r
- ld a,(iy+001h)\r
- jr z,out_hex_0\r
- ld a,(iy+002h)\r
- jr out_hex_0\r
-\r
-p_rst:\r
- ld a,(iy+000h)\r
- and 038h\r
-out_hex_0:\r
- jp out_hex\r
-\r
+ ;fall thru\r
\r
-p_j:\r
- ld c,(iy+001h)\r
- ld a,c\r
- rla\r
- sbc a,a\r
- ld b,a\r
- push iy\r
- pop hl\r
- add hl,bc\r
- inc hl\r
+pstr_sel:\r
+ call str_sel\r
+ ;fall thru\r
+pstr:\r
+ ld a,(hl)\r
inc hl\r
- jr out_hl_0\r
+ and a\r
+ ret z\r
+ call outchar\r
+ ret m\r
+ jr pstr\r
\r
-p_nn:\r
- ld l,(iy+001h)\r
- ld h,(iy+002h)\r
-out_hl_0:\r
- jp out_hl\r
+pstr_inl:\r
+ ex (sp),hl\r
+ call pstr\r
+ ex (sp),hl\r
+ ret\r
\r
;-------------------------------------------------------------------------------\r
\r
opc macro x\r
\r
i_&x equ opc_index\r
-o_&x equ $-opc_tabstart\r
+;o_&x equ $-opc_tabstart\r
dc '&x'\r
opc_index defl opc_index+1\r
endm\r
\r
-opc1 macro x,y\r
-\r
-i_&x&y equ opc_index\r
-o_&x&y equ $-opc_tabstart\r
- db '&x'\r
-i_&y equ opc_index+1\r
-o_&y equ $-opc_tabstart\r
- dc '&y'\r
-opc_index defl opc_index+2\r
- endm\r
-\r
-\r
t_MNEMONICS:\r
-opc_tabstart defl $\r
+;opc_tabstart defl $\r
opc_index defl 0\r
; 1-byte other\r
opc NOP\r
- opc1 R,LD\r
+ opc LD\r
opc INC\r
opc DEC\r
opc DJNZ\r
opc SUB\r
opc SBC\r
opc AND\r
-; opc XOR\r
- opc1 X,OR\r
+ opc XOR\r
+ opc OR\r
opc CP\r
\r
opc RET\r
opc EXX\r
opc IN\r
opc EX\r
- opc1 L,DI\r
+ opc DI\r
opc EI\r
; CB\r
opc RLC\r
opc RRC\r
- opc1 S,RL\r
+ opc RL\r
opc RR\r
opc SLA\r
opc SRA\r
-; SLL\r
-; opc SRL\r
+ opc SLL\r
+ opc SRL\r
opc BIT\r
opc RES\r
opc SET\r
opc NEG\r
opc RETN\r
opc RETI\r
- opc1 OT,IM\r
+ opc IM\r
opc RRD\r
-; opc RLD\r
+ opc RLD\r
\r
-;Block instructions\r
-t_mn_bli:\r
-; opc LDI\r
+; Block instructions\r
+ opc LDI\r
opc CPI\r
opc INI\r
opc OUTI\r
opc INDR\r
opc OTDR\r
\r
-;Z180\r
+; Z180\r
opc IN0\r
opc OUT0\r
opc TST\r
opc MLT\r
opc TSTIO\r
opc SLP\r
-; opc OTIM\r
+ opc OTIM\r
opc OTDM\r
opc OTIMR\r
opc OTDMR\r
dw l20ach\r
db 0ffh,0edh ;Prefix ED\r
dw l20b8h\r
-t_op_branch0:\r
+\r
db 0ffh,0cdh ;call mn\r
dw l2080h\r
db 0ffh,0c3h ;jp mn\r
endm\r
endm\r
\r
-expr_buf:\r
-current_cseg defl $ - current_cseg\r
- .phase current_phase + current_cseg\r
-\r
-start:\r
- LD SP,ldr_end+(stack-ddtz_base)\r
- LD DE,signon ;ldr_end+(expr_buf-ddtz_base)\r
- LD C,BDOS_PSTR\r
- CALL BDOS\r
-\r
- xor a\r
- dec a\r
- jp po,reloc\r
- ld de,msgz80\r
- LD C,BDOS_PSTR\r
- CALL BDOS\r
- jp 0\r
-\r
-reloc:\r
- LD HL,ldr_end+ddtz_size ;start of reloc bitmap\r
- ld bc,0108h ;init bit counter\r
-\r
- EXX\r
- LD HL,(BDOS+1)\r
- LD (ldr_end+(ddtz_bdos+1-ddtz_base)),HL\r
- LD BC,ddtz_size-1\r
- LD D,B\r
- LD E,0FFH\r
- INC DE ;size rounded up to next page boundary\r
- INC BC ;ddtz_size\r
- OR A\r
- SBC HL,DE ;BDOS - size\r
- LD (BDOS+1),HL ;-> new BDOS entry\r
-\r
- push hl\r
- PUSH BC\r
- ld de,ldr_end\r
- sbc hl,de\r
- EX DE,HL ;-> DE\r
- LD HL,ldr_size\r
- add hl,bc\r
- ld b,h\r
- ld c,l\r
- LD HL,TPA\r
-reloc_lp:\r
- EXX\r
- djnz reloc_nl\r
- ld b,c ;reload bit counter\r
- LD e,(HL) ;get next 8 relocation bits\r
- INC HL\r
-reloc_nl:\r
- sla e\r
- EXX\r
- JR NC,reloc_next\r
- DEC HL\r
- LD A,(HL)\r
- ADD A,E\r
- LD (HL),A\r
- INC HL\r
- LD A,(HL)\r
- ADC A,D\r
- LD (HL),A\r
-reloc_next:\r
- cpi\r
- jp pe,reloc_lp\r
- dec hl\r
-\r
- POP BC\r
- pop de\r
- EX DE,HL\r
- ADD HL,BC\r
- EX DE,HL\r
- DEC DE\r
- LDDR\r
- LD HL,conbuf+2-ddtz_base\r
- ADD HL,DE\r
- JP (HL)\r
-\r
-current_phase defl $\r
- .dephase\r
-current_cseg defl $\r
-\r
- ds EXPR_BUF_SIZE - ($ - expr_buf)\r
-expr_bufe:\r
-\r
;-------------------------------------------------------------------------------\r
\r
last_S:\r
dw TPA\r
\r
pbl_loop_adr:\r
- dw 0\r
+ dw 0addeh\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+conbuf::\r
+ ds CONBUF_SIZE+1\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ rept (STACK_SIZE+3)/4\r
+ db 0deh,0adh,0beh,0efh\r
+ endm\r
+stack::\r
+reg.l2: db 000h\r
+reg.h2: db 000h\r
+reg.e2: db 000h\r
+reg.d2: db 000h\r
+reg.c2: db 000h\r
+reg.b2: db 000h\r
+reg.f2: db 000h\r
+reg.a2: db 000h\r
+ db 000h\r
+reg.i: db 000h\r
+reg.iy: dw 0000h\r
+reg.ix: dw 0000h\r
+reg.f: db 000h\r
+reg.a: db 000h\r
+reg.c: db 000h\r
+reg.b: db 000h\r
+reg.e: db 000h\r
+reg.d: db 000h\r
+reg.l: db 000h\r
+reg.h: db 000h\r
+reg_sp: dw TPA\r
+reg.iff:\r
+ db 0f3h\r
+ db 0c3h\r
+reg.pc: dw TPA\r
+\r
+cmd_rpt:dw mainloop\r
+\r
+;-------------------------------------------------------------------------------\r
\r
ddtz_size equ $-ddtz_base\r
-ddtz_end:\r
+prog_size equ $-start\r
+ddtz_end::\r
\r
;-------------------------------------------------------------------------------\r
\r