+ else\r
+ xor a\r
+ dec a\r
+ daa ; Z80: 099H, x180+: 0F9H\r
+ cp 99h ; Result on 180 type cpus is F9 here. Thanks Hitachi\r
+ jr z,ini_z80\r
+\r
+ xor a\r
+ call cinit\r
+ ld a,1\r
+ call cinit\r
+ jr ini_sign\r
+ini_z80:\r
+; if ...\r
+; .printx Error: Not yet implemented!\r
+; db "Stop\r
+; endif\r
+ endif ; CPM\r
+\r
+ini_sign:\r
+ ld hl,signon\r
+ call pstr\r
+ ld hl,ddtz_base\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ' - '\r
+ ld hl,(bitmap_end)\r
+ dec hl\r
+ call out_hl\r
+ call pstr_inl\r
+ dc ')',CR,LF\r
+\r
+ ld a,i\r
+ ld (reg.i),a\r
+ ld a,0f3h\r
+ jp po,l0093h\r
+ ld a,0fbh\r
+l0093h:\r
+ ld (reg.iff),a\r
+ call di_or_ei\r
+ ld hl,ddtz_base\r
+ ld l,000h\r
+ ld (reg_sp),hl\r
+\r
+ jp mainloop\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ if CPM\r
+\r
+convec:\r
+const: jp 0 ; return console input status\r
+conin: jp 0 ; return console input character\r
+conout: jp 0 ; send console output character\r
+\r
+ else\r
+\r
+ include z180reg.inc\r
+\r
+iobyte equ 3\r
+\r
+max_device equ 3\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+; init device\r
+cinit: ; a = device\r
+ call vector_io_0\r
+ dw as0init\r
+ dw rret\r
+ dw rret\r
+ dw rret\r
+\r
+; character input status\r
+const: ; return a != 0 if character waiting\r
+ call vector_io\r
+ dw as0ista\r
+ dw null$status\r
+ dw csio_ista\r
+ dw null$status\r
+\r
+; character input\r
+conin: ; return a = input char\r
+ call vector_io\r
+ dw as0inp\r
+ dw null$input\r
+ dw csio_inp\r
+ dw null$input\r
+\r
+; character output\r
+conout: ; c = output char\r
+ call vector_io\r
+ dw as0out\r
+ dw rret\r
+ dw csio_out\r
+ dw rret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+vector_io:\r
+ ld a,(iobyte)\r
+vector_io_0:\r
+ pop hl\r
+ cp max_device\r
+ jr c,exist\r
+ ld a,max_device ; use null device if a >= max$device\r
+exist:\r
+ call add_hl_a2\r
+ ld a,(hl)\r
+ inc hl\r
+ ld h,(hl)\r
+ ld l,a\r
+ jp (hl)\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+null$input:\r
+ ld a,1Ah\r
+rret:\r
+ ret\r
+ret$true:\r
+ or 0FFh\r
+ ret\r
+\r
+null$status:\r
+ xor a\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+;\r
+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+;\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+; Init Serial I/O for console input and output (ASCI1)\r
+;\r
+\r
+\r
+\r
+as0init:\r
+ ld hl,initab0\r
+ jp ioiniml\r
+\r
+as1init:\r
+ ld hl,initab1\r
+ jp ioiniml\r
+\r
+\r
+ ld a,M_MPBT\r
+ out0 (cntlb1),a\r
+ ld a,M_RE + M_TE + M_MOD2 ;Rx/Tx enable\r
+ out0 (cntla1),a\r
+ ld a,M_RIE\r
+ out0 (stat1),a ;Enable rx interrupts\r
+\r
+ ret ;\r
+\r