; - Cut the .PRL header (first 256 byte) end rename the result to DDTZ.COM.\r
\r
\r
+ maclib config.inc\r
+\r
; Some greneral definitions\r
\r
BS equ 08h\r
;-------------------------------------------------------------------------------\r
\r
cseg\r
-start::\r
-ddtz_base::\r
+start:\r
+ddtz_base:\r
jr reloc\r
nop\r
l0003h:\r
nop\r
ret\r
\r
-?const: jp 0 ; return console input status\r
-?conin: jp 0 ; return console input character\r
-?cono: jp 0 ; send console output character\r
-\r
;-------------------------------------------------------------------------------\r
\r
signon:\r
defvers\r
dc ' ('\r
\r
+;-------------------------------------------------------------------------------\r
+\r
+reloc_getbit macro\r
+ local nextbit\r
+ exx\r
+ djnz nextbit\r
+ ld b,8 ;reload bit counter\r
+ ld e,(hl) ;get next 8 relocation bits\r
+ inc hl\r
+nextbit:\r
+ sla e\r
+ exx\r
+ endm\r
+\r
;-------------------------------------------------------------------------------\r
; Clear old position\r
\r
ei\r
ld hl,ddtz_end ;start of reloc bitmap\r
add hl,de\r
-\r
push hl\r
exx\r
pop hl\r
- ld bc,0108h ;init bit counter b (c==reload val)\r
+ ld b,1 ;init bit counter b\r
exx\r
\r
LD HL,ddtz_base\r
add hl,de ;--> ddtz_base\r
- ld bc,prog_size\r
+\r
reloc_lp:\r
- EXX\r
- djnz reloc_nl\r
- ld b,c ;reload bit counter\r
- LD e,(HL) ;get next 8 relocation bits\r
- INC HL\r
-reloc_nl:\r
- sla e\r
- EXX\r
- JR NC,reloc_next\r
- DEC HL\r
+ push de\r
+ push hl\r
+\r
+ ld de,4\r
+ ld a,2\r
+ ld hl,0\r
+reloc_l:\r
+ reloc_getbit\r
+ jr nc,reloc_got\r
+ cp 16\r
+ jr z,reloc_done\r
+ add hl,de\r
+ ld b,a\r
+ ex de,hl\r
+reloc_l1:\r
+ add hl,hl\r
+ djnz reloc_l1\r
+ ex de,hl\r
+ add a,a\r
+ jr reloc_l\r
+reloc_got:\r
+ ex de,hl\r
+ ld hl,0\r
+ ld b,a\r
+reloc_bitloop:\r
+ reloc_getbit\r
+ adc hl,hl\r
+ djnz reloc_bitloop\r
+ add hl,de\r
+ pop de\r
+ add hl,de\r
+ pop de\r
+\r
LD A,(HL)\r
ADD A,E\r
LD (HL),A\r
LD A,(HL)\r
ADC A,D\r
LD (HL),A\r
-reloc_next:\r
inc hl\r
- dec bc\r
- ld a,b\r
- or c\r
- jr nz,reloc_lp\r
-\r
+ jr reloc_lp\r
+reloc_done:\r
+ exx\r
+ ld (bitmap_end),hl\r
;-------------------------------------------------------------------------------\r
\r
\r
-init::\r
+init:\r
LD SP,stack\r
\r
+ if CPM\r
+\r
ld hl,(1) ;wboot addr\r
- ld de,?const\r
+ ld de,convec\r
ex de,hl\r
ld b,3\r
vini_l:\r
ld (hl),d\r
inc hl\r
djnz vini_l\r
+ else\r
+ xor a\r
+ dec a\r
+ daa ; Z80: 099H, x180+: 0F9H\r
+ cp 99h ; Result on 180 type cpus is F9 here. Thanks Hitachi\r
+ jr z,ini_z80\r
\r
+ xor a\r
+ call cinit\r
+ ld a,1\r
+ call cinit\r
+ jr ini_sign\r
+ini_z80:\r
+; if ...\r
+; .printx Error: Not yet implemented!\r
+; db "Stop\r
+; endif\r
+ endif ; CPM\r
+\r
+ini_sign:\r
ld hl,signon\r
call pstr\r
ld hl,ddtz_base\r
call out_hl\r
call pstr_inl\r
dc ' - '\r
- ld de,prog_size+bitmap_size-1\r
- add hl,de\r
+ ld hl,(bitmap_end)\r
+ dec hl\r
call out_hl\r
call pstr_inl\r
dc ')',CR,LF\r
\r
;-------------------------------------------------------------------------------\r
\r
-CMDTAB::\r
+ if CPM\r
+\r
+convec:\r
+const: jp 0 ; return console input status\r
+conin: jp 0 ; return console input character\r
+conout: jp 0 ; send console output character\r
+\r
+ else\r
+\r
+ include z180reg.inc\r
+\r
+iobyte equ 3\r
+\r
+max_device equ 3\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+; init device\r
+cinit: ; a = device\r
+ call vector_io_0\r
+ dw as0init\r
+ dw rret\r
+ dw rret\r
+ dw rret\r
+\r
+; character input status\r
+const: ; return a != 0 if character waiting\r
+ call vector_io\r
+ dw as0ista\r
+ dw null$status\r
+ dw csio_ista\r
+ dw null$status\r
+\r
+; character input\r
+conin: ; return a = input char\r
+ call vector_io\r
+ dw as0inp\r
+ dw null$input\r
+ dw csio_inp\r
+ dw null$input\r
+\r
+; character output\r
+conout: ; c = output char\r
+ call vector_io\r
+ dw as0out\r
+ dw rret\r
+ dw csio_out\r
+ dw rret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+vector_io:\r
+ ld a,(iobyte)\r
+vector_io_0:\r
+ pop hl\r
+ cp max_device\r
+ jr c,exist\r
+ ld a,max_device ; use null device if a >= max$device\r
+exist:\r
+ call add_hl_a2\r
+ ld a,(hl)\r
+ inc hl\r
+ ld h,(hl)\r
+ ld l,a\r
+ jp (hl)\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+null$input:\r
+ ld a,1Ah\r
+rret:\r
+ ret\r
+ret$true:\r
+ or 0FFh\r
+ ret\r
+\r
+null$status:\r
+ xor a\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+;\r
+; TC = (f PHI /(2*baudrate*Clock_mode)) - 2\r
+;\r
+; TC = (f PHI / (32 * baudrate)) - 2\r
+;\r
+; Init Serial I/O for console input and output (ASCI1)\r
+;\r
+\r
+\r
+\r
+as0init:\r
+ ld hl,initab0\r
+ jp ioiniml\r
+\r
+as1init:\r
+ ld hl,initab1\r
+ jp ioiniml\r
+\r
+\r
+ ld a,M_MPBT\r
+ out0 (cntlb1),a\r
+ ld a,M_RE + M_TE + M_MOD2 ;Rx/Tx enable\r
+ out0 (cntla1),a\r
+ ld a,M_RIE\r
+ out0 (stat1),a ;Enable rx interrupts\r
+\r
+ ret ;\r
+\r
+\r
+initab0:\r
+ db 1,stat0,0 ;Disable rx/tx interrupts\r
+ ;Enable baud rate generator\r
+ db 1,asext0,M_BRGMOD+M_DCD0DIS+M_CTS0DIS\r
+ db 2,astc0l,low 28, high 28\r
+ db 1,cntlb0,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla0,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+initab1:\r
+ db 1,stat1,0 ;Disable rx/tx ints, disable CTS1\r
+ db 1,asext1,M_BRGMOD ;Enable baud rate generator\r
+ db 2,astc1l,low 3, high 3\r
+ db 1,cntlb1,M_MPBT ;No MP Mode, X16\r
+ db 1,cntla1,M_RE+M_TE+M_MOD2 ;Rx/Tx enable, 8N1\r
+ db 0\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+ioiniml:\r
+ push bc\r
+ xor a\r
+ioml_lp:\r
+ ld b,(hl)\r
+ inc hl\r
+ cp b\r
+ jr z,ioml_e\r
+\r
+ ld c,(hl)\r
+ inc hl\r
+ otimr\r
+ jr ioml_lp\r
+ioml_e:\r
+ pop bc\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+as0ista:\r
+ in0 a,(stat0)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as1ista:\r
+ in0 a,(stat1)\r
+ rlca\r
+ sbc a,a\r
+ ret\r
+\r
+as0inp:\r
+ in0 a,(stat0)\r
+ rlca\r
+ jr nc,as0inp\r
+ in0 a,rdr0\r
+ ret\r
+\r
+as1inp:\r
+ in0 a,(stat1)\r
+ rlca\r
+ jr nc,as1inp\r
+ in0 a,rdr1\r
+ ret\r
+\r
+as0out:\r
+ in0 a,(stat0)\r
+ and M_TDRE\r
+ jr z,as0out\r
+ out0 (tdr0),c\r
+ ld a,c\r
+ ret\r
+\r
+as1out:\r
+ in0 a,(stat1)\r
+ and M_TDRE\r
+ jr z,as1out\r
+ out0 (tdr1),c\r
+ ld a,c\r
+ ret\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+\r
+csio_rx_tmp: db 0ffh\r
+\r
+csio_ista:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ cp 0ffh\r
+ jr nz,csist_1\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ ld (hl),a\r
+ sub a,0ffh\r
+ ret z\r
+csist_1:\r
+ or 0ffh\r
+ ret\r
+\r
+csio_inp:\r
+ ld hl,csio_rx_tmp\r
+ ld a,(hl)\r
+ ld (hl),0ffh\r
+ cp 0ffh\r
+ ret nz\r
+csin_1:\r
+ ld a,01\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ cp 0ffh\r
+ jr z,csin_1\r
+ ret\r
+\r
+csio_rd:\r
+ ld a,M_CSIO_RE\r
+ call csio_cmd_wait\r
+ in0 a,(trdr)\r
+ ret\r
+\r
+csio_out:\r
+ ld a,02\r
+ call csio_wr\r
+ call csio_rd\r
+ call csio_rd\r
+ or a\r
+ jr z,csio_out\r
+\r
+ ld a,c\r
+ inc a ;ff..02 --> 00..03\r
+ cp 04h\r
+ jr nc,csout_1\r
+ ld a,00h\r
+ call csio_wr\r
+csout_1:\r
+ ld a,c\r
+csio_wr:\r
+ out0 (trdr),a\r
+ ld a,M_CSIO_TE\r
+csio_cmd_wait:\r
+ out0 (cntr),a\r
+cswr_wait:\r
+ in0 a,(cntr)\r
+ and M_CSIO_TE+M_CSIO_RE\r
+ jr nz,cswr_wait\r
+ ret\r
+\r
+ endif ; CPM\r
+\r
+;-------------------------------------------------------------------------------\r
+\r
+CMDTAB:\r
; dw ERROR ;cmd_@ ;examine/substitute the displacement register @\r
; dw ERROR ;cmd_A ;Assemble\r
dw cmd_B ;Breakpoints display/set/clear\r
call pstr_inl\r
dc '?',CR,LF\r
;fall thru\r
-mainloop::\r
+mainloop:\r
ld sp,stack\r
ld hl,(reg.pc)\r
call bp_clr_temporary\r
push af\r
and 07fh\r
ld c,a\r
- call ?cono\r
+ call conout\r
ld hl,con_col\r
inc (hl)\r
pop af\r
push hl\r
push de\r
push bc\r
- call ?const\r
+ call const\r
and a\r
jr z,inch1\r
- call ?conin\r
+ call conin\r
scf\r
inch1:\r
pop bc\r
push af\r
call get_arg_final\r
\r
- ld bc,prog_size+bitmap_size\r
+ ex de,hl\r
+ ld hl,(bitmap_end)\r
+ ld bc,ddtz_base\r
+ or a\r
+ sbc hl,bc\r
+ ld b,h\r
+ ld c,l\r
+ ex de,hl\r
pop af\r
jr nz,cmde_bottom\r
sbc hl,bc\r
i.storebyte:\r
push af\r
push de\r
- ld de,TPA ;lowest allowed load address\r
+ ld de,ddtz_base ;don't load over ddtz\r
call cp_hl_de\r
- jr c,error2\r
- ld de,(BDOS+1) ;highest allowed load address\r
+ jr nc,ist_1\r
+\r
+ ld de,(bitmap_end)\r
call cp_hl_de\r
jr nc,error2\r
+ist_1:\r
ld de,(high_load)\r
call cp_hl_de\r
jr c,l1157h\r
pbl_loop_adr:\r
dw 0addeh\r
\r
+bitmap_end:\r
+ dw 0\r
+\r
;-------------------------------------------------------------------------------\r
\r
-conbuf::\r
+conbuf:\r
ds CONBUF_SIZE+1\r
\r
;-------------------------------------------------------------------------------\r
rept (STACK_SIZE+3)/4\r
db 0deh,0adh,0beh,0efh\r
endm\r
-stack::\r
+stack:\r
reg.l2: db 000h\r
reg.h2: db 000h\r
reg.e2: db 000h\r
reg.pc: dw TPA\r
\r
cmd_rpt:dw mainloop\r
-\r
+ db 0ffh,0ffh,0ffh\r
;-------------------------------------------------------------------------------\r
\r
ddtz_size equ $-ddtz_base\r
prog_size equ $-start\r
-ddtz_end::\r
+ddtz_end:\r
\r
;-------------------------------------------------------------------------------\r
\r
projects / ddt180.git / blobdiff