#define IRMP_TIMER_CR1 TIM_CR1(IRMP_TIMER)\r
#define IRMP_TIMER_DIER TIM_DIER(IRMP_TIMER)\r
#define IRMP_TIMER_SR TIM_SR(IRMP_TIMER)\r
#define IRMP_TIMER_ARR TIM_ARR(IRMP_TIMER)\r
#define IRMP_TIMER_CR1 TIM_CR1(IRMP_TIMER)\r
#define IRMP_TIMER_DIER TIM_DIER(IRMP_TIMER)\r
#define IRMP_TIMER_SR TIM_SR(IRMP_TIMER)\r
#define IRMP_TIMER_ARR TIM_ARR(IRMP_TIMER)\r
GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);\r
#endif\r
/* Enable timer clock. */\r
GPIO_CNF_OUTPUT_PUSHPULL, GPIO2);\r
#endif\r
/* Enable timer clock. */\r
nvic_set_priority(NVIC_IRMP_TIMER_IRQ, 4*16);\r
nvic_enable_irq(NVIC_IRMP_TIMER_IRQ);\r
\r
nvic_set_priority(NVIC_IRMP_TIMER_IRQ, 4*16);\r
nvic_enable_irq(NVIC_IRMP_TIMER_IRQ);\r
\r