[irmp.git] / irsndconfig.h

/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * irsndconfig.h\r
 *\r
 * Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
 *\r
 * $Id: irsndconfig.h,v 1.31 2012/02/24 15:00:18 fm Exp $\r
 *\r
 * ATMEGA88 @ 8 MHz\r
 *\r
 * This program is free software; you can redistribute it and/or modify\r
 * it under the terms of the GNU General Public License as published by\r
 * the Free Software Foundation; either version 2 of the License, or\r
 * (at your option) any later version.\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
#ifndef F_INTERRUPTS\r
#define F_INTERRUPTS                            15000   // interrupts per second\r
#endif\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * Change settings from 1 to 0 if you want to disable one or more encoders.\r
 * This saves program space.\r
 * 1 enable  decoder\r
 * 0 disable decoder\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
\r
// typical protocols, disable here!             Enable  Remarks                 F_INTERRUPTS            Program Space\r
#define IRSND_SUPPORT_SIRCS_PROTOCOL            1       // Sony SIRCS           >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_NEC_PROTOCOL              1       // NEC + APPLE          >= 10000                 ~100 bytes\r
#define IRSND_SUPPORT_SAMSUNG_PROTOCOL          1       // Samsung + Samsung32  >= 10000                 ~300 bytes\r
#define IRSND_SUPPORT_MATSUSHITA_PROTOCOL       1       // Matsushita           >= 10000                 ~200 bytes\r
#define IRSND_SUPPORT_KASEIKYO_PROTOCOL         1       // Kaseikyo             >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_DENON_PROTOCOL            1       // DENON, Sharp         >= 10000                 ~200 bytes\r
\r
// more protocols, enable here!                 Enable  Remarks                 F_INTERRUPTS            Program Space\r
#define IRSND_SUPPORT_RC5_PROTOCOL              0       // RC5                  >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_RC6_PROTOCOL              0       // RC6                  >= 10000                 ~250 bytes\r
#define IRSND_SUPPORT_RC6A_PROTOCOL             0       // RC6A                 >= 10000                 ~250 bytes\r
#define IRSND_SUPPORT_JVC_PROTOCOL              0       // JVC                  >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_NEC16_PROTOCOL            0       // NEC16                >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_NEC42_PROTOCOL            0       // NEC42                >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_IR60_PROTOCOL             1       // IR60 (SDA2008)       >= 10000                 ~250 bytes\r
#define IRSND_SUPPORT_GRUNDIG_PROTOCOL          1       // Grundig              >= 10000                 ~300 bytes\r
#define IRSND_SUPPORT_SIEMENS_PROTOCOL          0       // Siemens, Gigaset     >= 15000                 ~150 bytes\r
#define IRSND_SUPPORT_NOKIA_PROTOCOL            0       // Nokia                >= 10000                 ~400 bytes\r
\r
// exotic protocols, enable here!               Enable  Remarks                 F_INTERRUPTS            Program Space\r
#define IRSND_SUPPORT_KATHREIN_PROTOCOL         0       // Kathrein             >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!\r
#define IRSND_SUPPORT_NUBERT_PROTOCOL           0       // NUBERT               >= 10000                 ~100 bytes\r
#define IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL     0       // Bang&Olufsen         >= 10000                 ~250 bytes\r
#define IRSND_SUPPORT_RECS80_PROTOCOL           0       // RECS80               >= 20000                 ~100 bytes\r
#define IRSND_SUPPORT_RECS80EXT_PROTOCOL        0       // RECS80EXT            >= 20000                 ~100 bytes\r
#define IRSND_SUPPORT_THOMSON_PROTOCOL          0       // Thomson              >= 10000                 ~250 bytes\r
#define IRSND_SUPPORT_NIKON_PROTOCOL            0       // NIKON                >= 10000                 ~150 bytes\r
#define IRSND_SUPPORT_NETBOX_PROTOCOL           0       // Netbox keyboard      >= 10000                 DON'T CHANGE, NOT SUPPORTED YET!\r
#define IRSND_SUPPORT_FDC_PROTOCOL              0       // FDC IR keyboard      >= 10000 (better 15000)  ~150 bytes\r
#define IRSND_SUPPORT_RCCAR_PROTOCOL            0       // RC CAR               >= 10000 (better 15000)  ~150 bytes\r
#define IRSND_SUPPORT_RUWIDO_PROTOCOL           0       // RUWIDO, T-Home       >= 15000                 DON'T CHANGE, NOT SUPPORTED YET!\r
#define IRSND_SUPPORT_LEGO_PROTOCOL             0       // LEGO Power RC        >= 20000                 ~150 bytes\r
\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * DO NOT CHANGE:\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
#define IRSND_OC2                               0       // OC2\r
#define IRSND_OC2A                              1       // OC2A\r
#define IRSND_OC2B                              2       // OC2B\r
#define IRSND_OC0                               3       // OC0\r
#define IRSND_OC0A                              4       // OC0A\r
#define IRSND_OC0B                              5       // OC0B\r
\r
//PIC Microchip C18\r
#define IRSND_PIC_CCP1                          1       // PIC C18 RC2 = PWM1 module\r
#define IRSND_PIC_CCP2                          2       // PIC C18 RC1 = PWM2 module\r
\r
#ifndef PIC_C18                                                                 // AVR part\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * AVR\r
 *\r
 * Change hardware pin here:                    IRSND_OC2  = OC2  on ATmegas         supporting OC2,  e.g. ATmega8\r
 *                                              IRSND_OC2A = OC2A on ATmegas         supporting OC2A, e.g. ATmega88\r
 *                                              IRSND_OC2B = OC2B on ATmegas         supporting OC2B, e.g. ATmega88\r
 *                                              IRSND_OC0  = OC0  on ATmegas         supporting OC0,  e.g. ATmega162\r
 *                                              IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85\r
 *                                              IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
 *                                                                                              IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
 *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
\r
#define IRSND_OCx                               IRSND_OC2B          // use OC2B\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * PIC C18\r
 *\r
 * Change hardware pin here:                    IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
 *                                                                                              IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
\r
#else\r
#define IRSND_OCx                                   IRSND_PIC_CCP2      // Use PWMx for PIC\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * PIC C18 - change other PIC specific settings - ignore it when using AVR\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
\r
#define F_CPU                                   48000000UL          // PIC freq.; Set you Freq here\r
#define Pre_Scaler                              4                   // define prescaler for Timer2 e.g. 1,4,16 !!!\r
#define PIC_Scaler                              2                   // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
#warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !\r
\r
//Do not change lines below until you have a diffrent HW !! Example for 18F2550/18F4550\r
//Setup macro for PWM used PWM module\r
\r
#if IRSND_OCx == IRSND_PIC_CCP2        \r
#define IRSND_PIN                               TRISCbits.TRISC1    // RC1 = PWM2\r
\r
#define SetDCPWM(x)                             SetDCPWM2(x)                    \r
#define ClosePWM                                        ClosePWM2\r
#define OpenPWM(x)                                      OpenPWM2(x) \r
#endif\r
\r
#if IRSND_OCx == IRSND_PIC_CCP1        \r
#define IRSND_PIN                               TRISCbits.TRISC2    // RC2 = PWM1\r
\r
#define SetDCPWM(x)                             SetDCPWM1(x)\r
#define ClosePWM                                ClosePWM1\r
#define OpenPWM(x)                              OpenPWM1(x)\r
#endif\r
\r
//Setup macro for OpenTimer with defined Pre_Scaler\r
#if Pre_Scaler == 1\r
#define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_1); \r
#elif Pre_Scaler == 4\r
#define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_4); \r
#elif Pre_Scaler == 16\r
#define OpenTimer                               OpenTimer2(TIMER_INT_OFF & T2_PS_1_16); \r
#else\r
#error Incorrect value for Pre_Scaler\r
#endif\r
\r
#endif //PIC_C18\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 * Use Callbacks to indicate output signal or something else\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
#define IRSND_USE_CALLBACK                      0       // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0\r
\r
/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
 *                              D O   N O T   C H A N G E   T H E   F O L L O W I N G   L I N E S   !\r
 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
 */\r
#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
#warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
#undef IRSND_SUPPORT_SIEMENS_PROTOCOL\r
#define IRSND_SUPPORT_SIEMENS_PROTOCOL          0       // DO NOT CHANGE! F_INTERRUPTS too low!\r
#endif\r
\r
#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
#warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)\r
#undef IRSND_SUPPORT_RECS80_PROTOCOL\r
#define IRSND_SUPPORT_RECS80_PROTOCOL           0       // DO NOT CHANGE! F_INTERRUPTS too low!\r
#endif\r
\r
#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
#warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)\r
#undef IRSND_SUPPORT_RECS80EXT_PROTOCOL\r
#define IRSND_SUPPORT_RECS80EXT_PROTOCOL        0       // DO NOT CHANGE! F_INTERRUPTS too low!\r
#endif\r
\r
#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
#warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
#undef IRSND_SUPPORT_LEGO_PROTOCOL\r
#define IRSND_SUPPORT_LEGO_PROTOCOL             0       // DO NOT CHANGE! F_INTERRUPTS too low!\r
#endif\r
Commit	Line	Data
46dd89b7	1	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	2	* irsndconfig.h\r
	3	*\r
f50e01e7	4	* Copyright (c) 2010-2011 Frank Meyer - frank(at)fli4l.de\r
46dd89b7	5	*\r
253513a9	6	* $Id: irsndconfig.h,v 1.31 2012/02/24 15:00:18 fm Exp $\r
46dd89b7	7	*\r
	8	* ATMEGA88 @ 8 MHz\r
	9	*\r
	10	* This program is free software; you can redistribute it and/or modify\r
	11	* it under the terms of the GNU General Public License as published by\r
	12	* the Free Software Foundation; either version 2 of the License, or\r
	13	* (at your option) any later version.\r
	14	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	15	*/\r
	16	\r
b5ea7869	17	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
9c86ff1a	18	* F_INTERRUPTS: number of interrupts per second, should be in the range from 10000 to 20000, typically 15000\r
b5ea7869	19	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	20	*/\r
	21	#ifndef F_INTERRUPTS\r
f50e01e7	22	#define F_INTERRUPTS 15000 // interrupts per second\r
b5ea7869	23	#endif\r
b5ea7869	24	\r
46dd89b7	25	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	26	* Change settings from 1 to 0 if you want to disable one or more encoders.\r
	27	* This saves program space.\r
	28	* 1 enable decoder\r
	29	* 0 disable decoder\r
	30	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	31	*/\r
f50e01e7	32	\r
	33	// typical protocols, disable here! Enable Remarks F_INTERRUPTS Program Space\r
	34	#define IRSND_SUPPORT_SIRCS_PROTOCOL 1 // Sony SIRCS >= 10000 ~150 bytes\r
	35	#define IRSND_SUPPORT_NEC_PROTOCOL 1 // NEC + APPLE >= 10000 ~100 bytes\r
	36	#define IRSND_SUPPORT_SAMSUNG_PROTOCOL 1 // Samsung + Samsung32 >= 10000 ~300 bytes\r
	37	#define IRSND_SUPPORT_MATSUSHITA_PROTOCOL 1 // Matsushita >= 10000 ~200 bytes\r
	38	#define IRSND_SUPPORT_KASEIKYO_PROTOCOL 1 // Kaseikyo >= 10000 ~150 bytes\r
	39	#define IRSND_SUPPORT_DENON_PROTOCOL 1 // DENON, Sharp >= 10000 ~200 bytes\r
	40	\r
	41	// more protocols, enable here! Enable Remarks F_INTERRUPTS Program Space\r
7644ac04	42	#define IRSND_SUPPORT_RC5_PROTOCOL 0 // RC5 >= 10000 ~150 bytes\r
f50e01e7	43	#define IRSND_SUPPORT_RC6_PROTOCOL 0 // RC6 >= 10000 ~250 bytes\r
	44	#define IRSND_SUPPORT_RC6A_PROTOCOL 0 // RC6A >= 10000 ~250 bytes\r
	45	#define IRSND_SUPPORT_JVC_PROTOCOL 0 // JVC >= 10000 ~150 bytes\r
7644ac04	46	#define IRSND_SUPPORT_NEC16_PROTOCOL 0 // NEC16 >= 10000 ~150 bytes\r
7644ac04	47	#define IRSND_SUPPORT_NEC42_PROTOCOL 0 // NEC42 >= 10000 ~150 bytes\r
253513a9	48	#define IRSND_SUPPORT_IR60_PROTOCOL 1 // IR60 (SDA2008) >= 10000 ~250 bytes\r
a48187fa	49	#define IRSND_SUPPORT_GRUNDIG_PROTOCOL 1 // Grundig >= 10000 ~300 bytes\r
f50e01e7	50	#define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 // Siemens, Gigaset >= 15000 ~150 bytes\r
	51	#define IRSND_SUPPORT_NOKIA_PROTOCOL 0 // Nokia >= 10000 ~400 bytes\r
	52	\r
	53	// exotic protocols, enable here! Enable Remarks F_INTERRUPTS Program Space\r
	54	#define IRSND_SUPPORT_KATHREIN_PROTOCOL 0 // Kathrein >= 10000 DON'T CHANGE, NOT SUPPORTED YET!\r
	55	#define IRSND_SUPPORT_NUBERT_PROTOCOL 0 // NUBERT >= 10000 ~100 bytes\r
	56	#define IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL 0 // Bang&Olufsen >= 10000 ~250 bytes\r
31c1f035	57	#define IRSND_SUPPORT_RECS80_PROTOCOL 0 // RECS80 >= 20000 ~100 bytes\r
31c1f035	58	#define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0 // RECS80EXT >= 20000 ~100 bytes\r
7644ac04	59	#define IRSND_SUPPORT_THOMSON_PROTOCOL 0 // Thomson >= 10000 ~250 bytes\r
f50e01e7	60	#define IRSND_SUPPORT_NIKON_PROTOCOL 0 // NIKON >= 10000 ~150 bytes\r
f50e01e7	61	#define IRSND_SUPPORT_NETBOX_PROTOCOL 0 // Netbox keyboard >= 10000 DON'T CHANGE, NOT SUPPORTED YET!\r
f50e01e7	62	#define IRSND_SUPPORT_FDC_PROTOCOL 0 // FDC IR keyboard >= 10000 (better 15000) ~150 bytes\r
	63	#define IRSND_SUPPORT_RCCAR_PROTOCOL 0 // RC CAR >= 10000 (better 15000) ~150 bytes\r
	64	#define IRSND_SUPPORT_RUWIDO_PROTOCOL 0 // RUWIDO, T-Home >= 15000 DON'T CHANGE, NOT SUPPORTED YET!\r
f50e01e7	65	#define IRSND_SUPPORT_LEGO_PROTOCOL 0 // LEGO Power RC >= 20000 ~150 bytes\r
770a1a9d	66	\r
46dd89b7	67	\r
46dd89b7	68	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1f54e86c	69	* DO NOT CHANGE:\r
46dd89b7	70	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
46dd89b7	71	*/\r
1f54e86c	72	#define IRSND_OC2 0 // OC2\r
	73	#define IRSND_OC2A 1 // OC2A\r
	74	#define IRSND_OC2B 2 // OC2B\r
	75	#define IRSND_OC0 3 // OC0\r
	76	#define IRSND_OC0A 4 // OC0A\r
	77	#define IRSND_OC0B 5 // OC0B\r
	78	\r
9c86ff1a	79	//PIC Microchip C18\r
	80	#define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module\r
	81	#define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module\r
	82	\r
cea96148	83	#ifndef PIC_C18 // AVR part\r
9c86ff1a	84	\r
1f54e86c	85	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
9c86ff1a	86	* AVR\r
9c86ff1a	87	*\r
1f54e86c	88	* Change hardware pin here: IRSND_OC2 = OC2 on ATmegas supporting OC2, e.g. ATmega8\r
	89	* IRSND_OC2A = OC2A on ATmegas supporting OC2A, e.g. ATmega88\r
	90	* IRSND_OC2B = OC2B on ATmegas supporting OC2B, e.g. ATmega88\r
	91	* IRSND_OC0 = OC0 on ATmegas supporting OC0, e.g. ATmega162\r
7644ac04	92	* IRSND_OC0A = OC0A on ATmegas/ATtinys supporting OC0A, e.g. ATtiny84, ATtiny85\r
7644ac04	93	* IRSND_OC0B = OC0B on ATmegas/ATtinys supporting OC0B, e.g. ATtiny84, ATtiny85\r
cea96148	94	* IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
cea96148	95	* IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
1f54e86c	96	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
1f54e86c	97	*/\r
9c86ff1a	98	\r
1f54e86c	99	#define IRSND_OCx IRSND_OC2B // use OC2B\r
f2906202	100	\r
9c86ff1a	101	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	102	* PIC C18\r
	103	*\r
	104	* Change hardware pin here: IRSND_PIC_CCP1 = RC2 on PIC 18F2550/18F4550, ...\r
cea96148	105	* IRSND_PIC_CCP2 = RC1 on PIC 18F2550/18F4550, ...\r
9c86ff1a	106	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	107	*/\r
	108	\r
	109	#else\r
cea96148	110	#define IRSND_OCx IRSND_PIC_CCP2 // Use PWMx for PIC\r
9c86ff1a	111	\r
	112	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	113	* PIC C18 - change other PIC specific settings - ignore it when using AVR\r
	114	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	115	*/\r
	116	\r
	117	#define F_CPU 48000000UL // PIC freq.; Set you Freq here\r
	118	#define Pre_Scaler 4 // define prescaler for Timer2 e.g. 1,4,16 !!!\r
	119	#define PIC_Scaler 2 // PIC needs /2 extra in IRSND_FREQ_32_KHZ calculation for right value\r
	120	#warning Timer2 used for IRSND (PWM out) ! Do not use/setup Timer 2 yourself !\r
	121	\r
	122	//Do not change lines below until you have a diffrent HW !! Example for 18F2550/18F4550\r
	123	//Setup macro for PWM used PWM module\r
	124	\r
	125	#if IRSND_OCx == IRSND_PIC_CCP2 \r
	126	#define IRSND_PIN TRISCbits.TRISC1 // RC1 = PWM2\r
	127	\r
cea96148	128	#define SetDCPWM(x) SetDCPWM2(x) \r
	129	#define ClosePWM ClosePWM2\r
	130	#define OpenPWM(x) OpenPWM2(x) \r
9c86ff1a	131	#endif\r
	132	\r
	133	#if IRSND_OCx == IRSND_PIC_CCP1 \r
	134	#define IRSND_PIN TRISCbits.TRISC2 // RC2 = PWM1\r
	135	\r
	136	#define SetDCPWM(x) SetDCPWM1(x)\r
	137	#define ClosePWM ClosePWM1\r
	138	#define OpenPWM(x) OpenPWM1(x)\r
	139	#endif\r
	140	\r
	141	//Setup macro for OpenTimer with defined Pre_Scaler\r
	142	#if Pre_Scaler == 1\r
	143	#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_1); \r
	144	#elif Pre_Scaler == 4\r
	145	#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_4); \r
	146	#elif Pre_Scaler == 16\r
	147	#define OpenTimer OpenTimer2(TIMER_INT_OFF & T2_PS_1_16); \r
	148	#else\r
	149	#error Incorrect value for Pre_Scaler\r
	150	#endif\r
	151	\r
	152	#endif //PIC_C18\r
	153	\r
f50e01e7	154	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	155	* Use Callbacks to indicate output signal or something else\r
	156	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	157	*/\r
	158	#define IRSND_USE_CALLBACK 0 // flag: 0 = don't use callbacks, 1 = use callbacks, default is 0\r
f2906202	159	\r
f50e01e7	160	/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	161	* D O N O T C H A N G E T H E F O L L O W I N G L I N E S !\r
	162	*---------------------------------------------------------------------------------------------------------------------------------------------------\r
	163	*/\r
f2906202	164	#if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 && F_INTERRUPTS < 15000\r
	165	#warning F_INTERRUPTS too low, SIEMENS protocol disabled (should be at least 15000)\r
	166	#undef IRSND_SUPPORT_SIEMENS_PROTOCOL\r
	167	#define IRSND_SUPPORT_SIEMENS_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
	168	#endif\r
	169	\r
	170	#if IRSND_SUPPORT_RECS80_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
	171	#warning F_INTERRUPTS too low, RECS80 protocol disabled (should be at least 20000)\r
	172	#undef IRSND_SUPPORT_RECS80_PROTOCOL\r
f50e01e7	173	#define IRSND_SUPPORT_RECS80_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
f2906202	174	#endif\r
	175	\r
	176	#if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
	177	#warning F_INTERRUPTS too low, RECS80EXT protocol disabled (should be at least 20000)\r
	178	#undef IRSND_SUPPORT_RECS80EXT_PROTOCOL\r
f50e01e7	179	#define IRSND_SUPPORT_RECS80EXT_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
	180	#endif\r
	181	\r
	182	#if IRSND_SUPPORT_LEGO_PROTOCOL == 1 && F_INTERRUPTS < 20000\r
	183	#warning F_INTERRUPTS too low, LEGO protocol disabled (should be at least 20000)\r
	184	#undef IRSND_SUPPORT_LEGO_PROTOCOL\r
	185	#define IRSND_SUPPORT_LEGO_PROTOCOL 0 // DO NOT CHANGE! F_INTERRUPTS too low!\r
f2906202	186	#endif\r