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a2ddd841 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
7365350c | 2 | * irmp-main-pic-12F1840.c - example main module for PIC 12f1840\r |
30d1689d | 3 | *\r |
a2ddd841 | 4 | * IR decoder using IRMP\r |
5 | *\r | |
2a774a84 | 6 | * (c) 2014 Wolfgang Strobl (news4 at mystrobl.de) 2014-03-12:2014-07-20\r |
a2ddd841 | 7 | *\r |
30d1689d | 8 | * $Id: irmp-main-pic-12F1840.c,v 1.6 2017/02/17 09:13:06 fm Exp $\r |
7365350c | 9 | *\r |
a2ddd841 | 10 | * This demo module is runnable on a Microchip PIC 12F1840\r |
11 | *\r | |
12 | * To be used with IRMP by Frank Meyer (frank(at)fli4l.de)\r | |
13 | * <http://www.mikrocontroller.net/articles/IRMP>\r | |
14 | *\r | |
15 | * This program is free software; you can redistribute it and/or modify\r | |
16 | * it under the terms of the GNU General Public License as published by\r | |
17 | * the Free Software Foundation; either version 2 of the License, or\r | |
18 | * (at your option) any later version.\r | |
19 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
20 | */\r | |
2a774a84 | 21 | \r |
30d1689d | 22 | \r |
23 | /*\r | |
24 | \r | |
25 | Hauptprogramm fuer den nachfolgenden Testaufbau, bestehend aus zwei mal\r | |
2a774a84 | 26 | \r |
27 | \r | |
28 | TSOP1736+ PIC12F1840\r | |
29 | | __\r | |
30 | 1k | Vdd--o| o|o--Vss\r | |
31 | ___ +--GP5--o| |o--GP0 / ICSPDAT\r | |
32 | RS232 out -|___|-------GP4--o| |o--GP1 / ICSPCLK ___ LED\r | |
33 | RS232 in -|___|---Vpp/GP3--o|__|o--GP2-----------|___|- ->|---Vss\r | |
34 | 10k\r | |
30d1689d | 35 | \r |
2a774a84 | 36 | auf einem Steckbrett. (Genauer gesagt, dies ist die aktuelle Beschaltung\r |
37 | fuer V1.8, V1.0 ist aber bzgl. IRMP-Empfang funktional identisch. Nicht eingezeichnet\r | |
38 | ist ein Abblockkondensator von 100nF ueber Vss und Vdd.\r | |
39 | \r | |
30d1689d | 40 | Uebersetzt mit Microchip MPLAB XC8 C Compiler (Free Mode) V1.31\r |
2a774a84 | 41 | im stark gecrippelten "Free Mode".\r |
42 | \r | |
43 | Memory Summary: (V 1.8)\r | |
44 | Program space used C6Fh ( 3183) of 1000h words ( 77.7%)\r | |
45 | Data space used 9Bh ( 155) of 100h bytes ( 60.5%)\r | |
46 | EEPROM space used 0h ( 0) of 100h bytes ( 0.0%)\r | |
47 | Data stack space used 0h ( 0) of 5Eh bytes ( 0.0%)\r | |
48 | Configuration bits used 2h ( 2) of 2h words (100.0%)\r | |
49 | ID Location space used 0h ( 0) of 4h bytes ( 0.0%)\r | |
50 | \r | |
51 | \r | |
30d1689d | 52 | Testaufbau:\r |
2a774a84 | 53 | \r |
54 | Zwei Steckbretter,\r | |
30d1689d | 55 | urspruengliche Version des Programms als Empfaenger,\r |
2a774a84 | 56 | aktuelle Version als Sender, Aufzeichnung mit putty,\r |
57 | angeschlossen jeweils per USB2RS232-Kabel von Conrad\r | |
30d1689d | 58 | (972543, basierend auf Prolific PL2303). Soft-UART\r |
2a774a84 | 59 | fuer Input, da 12F1820 keine Kontrolle ueber Input-\r |
60 | Polaritaet erlaubt und ich fuer Testaufbauten eine\r | |
61 | Minimalbeschaltung bevorzuge.\r | |
62 | \r | |
63 | Kurze Distanz\r | |
64 | (~30 cm) zwischen Sender und Empfaenger), keine genaue Ausrichtung.\r | |
65 | Stromversorgung wahlwweise mit 5V via PICkit 2 oder 3x1.2V NiMH-AA.\r | |
66 | \r | |
30d1689d | 67 | Zunaechst\r |
68 | CD TAPE TUNER AUX OFF mit Philips FB,\r | |
2a774a84 | 69 | OFF mit VAOVA TV-2900HDD FB\r |
70 | dann Eingabe . und n beim Sender.\r | |
71 | \r | |
72 | Sender:\r | |
73 | \r | |
74 | IRMP PIC 12F1840 1.8 ws\r | |
75 | P 7 a=0x0014 c=0x003f f=0x00 (RC5)\r | |
76 | P 7 a=0x0014 c=0x003f f=0x01 (RC5)\r | |
77 | P 7 a=0x0012 c=0x003f f=0x00 (RC5)\r | |
78 | P 7 a=0x0011 c=0x003f f=0x00 (RC5)\r | |
79 | P 7 a=0x0015 c=0x003f f=0x00 (RC5)\r | |
80 | P 7 a=0x0015 c=0x000c f=0x00 (RC5)\r | |
81 | P 2 a=0xbf00 c=0x0059 f=0x00 (NEC)\r | |
82 | P 2 a=0xbf00 c=0x0059 f=0x01 (NEC)\r | |
83 | . MX115OFF PR2 221\r | |
84 | n NEC PR2 209\r | |
85 | \r | |
86 | Empfaenger:\r | |
87 | \r | |
88 | IRMP PIC 12F1840 1.0 ws\r | |
89 | P 7 a=0x0014 c=0x003f f=0x00 (RC5)\r | |
90 | P 7 a=0x0014 c=0x003f f=0x01 (RC5)\r | |
91 | P 7 a=0x0012 c=0x003f f=0x00 (RC5)\r | |
92 | P 7 a=0x0011 c=0x003f f=0x00 (RC5)\r | |
93 | P 7 a=0x0015 c=0x000c f=0x00 (RC5)\r | |
94 | P 2 a=0xbf00 c=0x0059 f=0x00 (NEC)\r | |
95 | P 2 a=0xbf00 c=0x0059 f=0x01 (NEC)\r | |
96 | P 7 a=0x0015 c=0x000c f=0x00 (RC5)\r | |
97 | P 7 a=0x0015 c=0x000c f=0x01 (RC5)\r | |
98 | P 7 a=0x0015 c=0x000c f=0x01 (RC5)\r | |
99 | P 2 a=0x0055 c=0x00aa f=0x00 (NEC)\r | |
100 | \r | |
101 | Die via DSO an der LED gemessenen Frequenzen sind 36.0 resp. 38.0 kHz\r | |
a2ddd841 | 102 | \r |
103 | */\r | |
104 | \r | |
105 | #include <stdio.h>\r | |
106 | \r | |
107 | #include "irmp.h"\r | |
2a774a84 | 108 | #include "irsnd.h"\r |
a2ddd841 | 109 | \r |
110 | /******************************************************************************/\r | |
111 | // "system.h"\r | |
112 | /******************************************************************************/\r | |
113 | #define SYS_FREQ 32000000L\r | |
114 | #define _XTAL_FREQ 32000000 // for _delay\r | |
115 | #define FCY (SYS_FREQ/4)\r | |
116 | \r | |
117 | /******************************************************************************/\r | |
118 | // "user.c"\r | |
119 | /******************************************************************************/\r | |
120 | void InitApp(void)\r | |
121 | {\r | |
122 | ANSELA=0;\r | |
123 | TRISA4=0;\r | |
124 | IRCF0=0; // p. 45\r | |
125 | IRCF1=1;\r | |
126 | IRCF2=1;\r | |
127 | IRCF3=1;\r | |
30d1689d | 128 | SPLLEN=1; // p 46 and 54\r |
a2ddd841 | 129 | }\r |
130 | \r | |
131 | /******************************************************************************/\r | |
132 | // "configuration_bits.c" 12F1848\r | |
133 | /******************************************************************************/\r | |
134 | // CONFIG1\r | |
135 | #pragma config FOSC = INTOSC // Oscillator Selection (INTOSC oscillator: I/O function on CLKIN pin)\r | |
136 | #pragma config WDTE = OFF // Watchdog Timer Enable (WDT disabled)\r | |
137 | #pragma config PWRTE = ON // Power-up Timer Enable (PWRT enabled)\r | |
138 | #pragma config MCLRE = OFF // MCLR Pin Function Select (MCLR/VPP pin function is digital input)\r | |
139 | #pragma config CP = OFF // Flash Program Memory Code Protection (Program memory code protection is disabled)\r | |
140 | #pragma config CPD = OFF // Data Memory Code Protection (Data memory code protection is disabled)\r | |
141 | #pragma config BOREN = ON // Brown-out Reset Enable (Brown-out Reset enabled)\r | |
142 | #pragma config CLKOUTEN = OFF // Clock Out Enable (CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin)\r | |
143 | #pragma config IESO = OFF // Internal/External Switchover (Internal/External Switchover mode is disabled)\r | |
144 | #pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor is disabled)\r | |
145 | \r | |
146 | // CONFIG2\r | |
147 | #pragma config WRT = OFF // Flash Memory Self-Write Protection (Write protection off)\r | |
148 | #pragma config PLLEN = OFF // PLL Enable (4x PLL disabled)\r | |
149 | #pragma config STVREN = ON // Stack Overflow/Underflow Reset Enable (Stack Overflow or Underflow will cause a Reset)\r | |
150 | #pragma config BORV = LO // Brown-out Reset Voltage Selection (Brown-out Reset Voltage (Vbor), low trip point selected.)\r | |
151 | #pragma config LVP = OFF // Low-Voltage Programming Enable (High-voltage on MCLR/VPP must be used for programming)\r | |
152 | /******************************************************************************/\r | |
153 | \r | |
154 | /******************************************************************************/\r | |
155 | // UART\r | |
156 | /******************************************************************************/\r | |
157 | \r | |
30d1689d | 158 | #define GPIO3 RA3\r |
159 | #define GPIO4 RA4\r | |
2a774a84 | 160 | \r |
161 | #define SOFTUART_RXPIN GPIO3\r | |
162 | #define SOFTUART_STDIO 1\r | |
163 | #define SOFTUART_DI 1\r | |
164 | \r | |
a2ddd841 | 165 | \r |
2a774a84 | 166 | #define BAUD 19200 // 38200 ginge auch noch\r |
167 | #define SOFTUART_BAUD BAUD\r | |
168 | #include "softuart_pic.h"\r | |
169 | \r | |
170 | #define kbhit softuartkbhit\r | |
a2ddd841 | 171 | \r |
172 | \r | |
30d1689d | 173 | void\r |
a2ddd841 | 174 | RS232init(void)\r |
175 | {\r | |
176 | // Transmit\r | |
177 | TXCKSEL = 1; // put TX on pin 4 - not 0 -, p 102\r | |
30d1689d | 178 | SPBRGL = (_XTAL_FREQ/BAUD/64-1);\r |
a2ddd841 | 179 | SPBRGH = 0;\r |
180 | BRGH = 0;\r | |
181 | BRG16 = 0;\r | |
182 | // p 259 manual\r | |
183 | SYNC = 0; // 0 p. 267\r | |
184 | SPEN = 1; // 26.1.1.7\r | |
185 | SCKP = 1; // invert p 269\r | |
186 | TXEN = 1;\r | |
187 | }\r | |
188 | \r | |
189 | // EUSART transmit\r | |
30d1689d | 190 | void\r |
a2ddd841 | 191 | putch(char c)\r |
192 | {\r | |
193 | while (!TRMT) _delay(1);\r | |
194 | TXREG=c;\r | |
195 | }\r | |
30d1689d | 196 | \r |
a2ddd841 | 197 | /******************************************************************************/\r |
198 | // Timer and ISR\r | |
199 | /******************************************************************************/\r | |
30d1689d | 200 | \r |
201 | void\r | |
a2ddd841 | 202 | timer1_init(void)\r |
203 | {\r | |
204 | // p 154\r | |
205 | TMR1=0xFC00; // p. 155 wait 1024 cycles for stabilization.\r | |
206 | TMR1CS1=0; // Clock source == System Clock\r | |
30d1689d | 207 | TMR1CS0=1;\r |
a2ddd841 | 208 | TMR1IE=1; // enable TMR1 interrupts\r |
209 | PEIE=1; // enable Pheripheral Interrupts\r | |
2a774a84 | 210 | TMR1IF=0;\r |
211 | TMR1ON=1;\r | |
a2ddd841 | 212 | }\r |
213 | \r | |
214 | \r | |
215 | /******************************************************************************/\r | |
216 | // Interrupt handler\r | |
217 | /******************************************************************************/\r | |
218 | \r | |
219 | void interrupt isr(void)\r | |
220 | {\r | |
30d1689d | 221 | TMR1=0xffff-_XTAL_FREQ/F_INTERRUPTS;\r |
a2ddd841 | 222 | TMR1IF=0; // clear timer 1 interrupt\r |
30d1689d | 223 | \r |
2a774a84 | 224 | if (!irsnd_ISR())\r |
225 | {\r | |
226 | irmp_ISR();\r | |
227 | }\r | |
a2ddd841 | 228 | }\r |
229 | \r | |
2a774a84 | 230 | \r |
231 | IRMP_DATA irmp_data;\r | |
232 | \r | |
233 | void RC5(uint16_t addr,uint16_t cmd, uint8_t repetitions)\r | |
234 | {\r | |
30d1689d | 235 | irmp_data.protocol = IRMP_RC5_PROTOCOL;\r |
2a774a84 | 236 | irmp_data.address = addr;\r |
237 | irmp_data.command = cmd;\r | |
238 | irmp_data.flags = repetitions;\r | |
30d1689d | 239 | irsnd_send_data (&irmp_data, FALSE);\r |
2a774a84 | 240 | }\r |
241 | \r | |
242 | void NEC(int addr,int cmd)\r | |
243 | {\r | |
30d1689d | 244 | irmp_data.protocol = IRMP_NEC_PROTOCOL;\r |
2a774a84 | 245 | irmp_data.address = addr;\r |
246 | irmp_data.command = cmd;\r | |
247 | irmp_data.flags = 0;\r | |
30d1689d | 248 | irsnd_send_data (&irmp_data, FALSE);\r |
2a774a84 | 249 | }\r |
250 | \r | |
251 | \r | |
a2ddd841 | 252 | /******************************************************************************/\r |
253 | // MAIN\r | |
254 | /******************************************************************************/\r | |
255 | \r | |
256 | int\r | |
257 | main (void)\r | |
258 | {\r | |
259 | IRMP_DATA irmp_data;\r | |
2a774a84 | 260 | char c;\r |
30d1689d | 261 | InitApp();\r |
2a774a84 | 262 | \r |
263 | PWMoff();\r | |
a2ddd841 | 264 | RS232init();\r |
30d1689d | 265 | \r |
a2ddd841 | 266 | __delay_ms(200);\r |
2a774a84 | 267 | printf("IRMP PIC 12F1840 1.8 ws\r\n");\r |
268 | irmp_init(); // initialize irmp\r | |
a2ddd841 | 269 | timer1_init(); // initialize timer1\r |
270 | ei(); // enable interrupts\r | |
271 | TMR1ON=1; // start timer\r | |
30d1689d | 272 | \r |
a2ddd841 | 273 | for (;;)\r |
274 | {\r | |
2a774a84 | 275 | if (kbhit())\r |
276 | {\r | |
277 | c=getch();\r | |
278 | if (c>32 && c<127) putch(c);\r | |
279 | putch(' ');\r | |
280 | if (c=='.')\r | |
281 | {\r | |
282 | printf("MX115OFF ");\r | |
283 | RC5(0x15,0x0c,2); // Philips MC115 AUX OFF\r | |
284 | }\r | |
285 | else if (c=='n')\r | |
286 | {\r | |
287 | printf("NEC ");\r | |
30d1689d | 288 | NEC(0x55,0xaa);\r |
2a774a84 | 289 | }\r |
290 | else\r | |
291 | {\r | |
292 | putch('?');\r | |
293 | continue;\r | |
294 | }\r | |
295 | while (irsnd_is_busy ()) ;\r | |
296 | printf("PR2 %d\r\n",PR2);\r | |
297 | continue;\r | |
298 | }\r | |
a2ddd841 | 299 | if (irmp_get_data (&irmp_data))\r |
300 | {\r | |
301 | printf("P ");\r | |
30d1689d | 302 | printf("%d a=0x%04x c=0x%04x f=0x%02x (",irmp_data.protocol, irmp_data.address,irmp_data.command,irmp_data.flags);\r |
303 | \r | |
a2ddd841 | 304 | #if IRMP_PROTOCOL_NAMES\r |
305 | printf(irmp_protocol_names[irmp_data.protocol]);\r | |
30d1689d | 306 | #else\r |
a2ddd841 | 307 | switch(irmp_data.protocol)\r |
308 | {\r | |
309 | case 1:\r | |
310 | printf("Sony");\r | |
311 | break;\r | |
312 | case 2:\r | |
313 | printf("NEC");\r | |
314 | break;\r | |
315 | case 7:\r | |
316 | printf("RC5");\r | |
317 | break;\r | |
318 | case 0x21:\r | |
319 | printf("Ortek");\r | |
320 | break;\r | |
321 | }\r | |
322 | #endif\r | |
323 | printf(")\r\n");\r | |
324 | }\r | |
325 | }\r | |
326 | }\r |