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Version 2.3.3: port to Stellaris ARM Cortex M4
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4225a882 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * main.c - demo main module to test irmp decoder\r
3 *\r
08f2dd9d 4 * Copyright (c) 2009-2012 Frank Meyer - frank(at)fli4l.de\r
4225a882 5 *\r
afd1e690 6 * $Id: main.c,v 1.15 2012/11/18 17:51:26 fm Exp $\r
cb8474cc 7 *\r
4225a882 8 * ATMEGA88 @ 8 MHz\r
9 *\r
10 * Fuses: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9\r
11 *\r
12 * This program is free software; you can redistribute it and/or modify\r
13 * it under the terms of the GNU General Public License as published by\r
14 * the Free Software Foundation; either version 2 of the License, or\r
15 * (at your option) any later version.\r
16 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
17 */\r
18\r
1f54e86c 19#include "irmp.h"\r
4225a882 20\r
21#ifndef F_CPU\r
22#error F_CPU unkown\r
23#endif\r
24\r
25void\r
1f54e86c 26timer1_init (void)\r
4225a882 27{\r
476267f4 28#if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:\r
0f700c8e 29\r
30#if F_CPU >= 16000000L\r
31 OCR1C = (F_CPU / F_INTERRUPTS / 8) - 1; // compare value: 1/15000 of CPU frequency, presc = 8\r
32 TCCR1 = (1 << CTC1) | (1 << CS12); // switch CTC Mode on, set prescaler to 8\r
33#else\r
764bd2bc 34 OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4\r
7644ac04 35 TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4\r
0f700c8e 36#endif\r
37\r
afd1e690 38#elif defined(STELLARIS_ARM_CORTEX_M4)\r
39 SysCtlPeripheralEnable(SYSCTL_PERIPH_TIMER1);\r
40 TimerConfigure(TIMER1_BASE, TIMER_CFG_32_BIT_PER);\r
41\r
42 TimerLoadSet(TIMER1_BASE, TIMER_A, (F_CPU / F_INTERRUPTS) -1);\r
43 IntEnable(INT_TIMER1A);\r
44 TimerIntEnable(TIMER1_BASE, TIMER_TIMA_TIMEOUT);\r
45 TimerEnable(TIMER1_BASE, TIMER_A);\r
46 // Important: Timer1IntHandler has to be configured in startup_ccs.c !\r
7644ac04 47#else // ATmegaXX:\r
48 OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency\r
49 TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1\r
1f54e86c 50#endif\r
4225a882 51\r
afd1e690 52#if (!defined(STELLARIS_ARM_CORTEX_M4))\r
53# ifdef TIMSK1\r
7644ac04 54 TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
afd1e690 55# else\r
7644ac04 56 TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r
afd1e690 57# endif\r
1f54e86c 58#endif\r
4225a882 59}\r
60\r
7644ac04 61/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
62 * Timer 1 output compare A interrupt service routine, called every 1/15000 sec\r
63 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
64 */\r
65#ifdef TIM1_COMPA_vect // ATtiny84\r
66ISR(TIM1_COMPA_vect)\r
afd1e690 67#elif defined(STELLARIS_ARM_CORTEX_M4)\r
68void Timer1IntHandler(void)\r
7644ac04 69#else\r
70ISR(TIMER1_COMPA_vect)\r
71#endif\r
72{\r
73 (void) irmp_ISR(); // call irmp ISR\r
74 // call other timer interrupt routines...\r
75}\r
76\r
77\r
4225a882 78int\r
79main (void)\r
80{\r
1f54e86c 81 IRMP_DATA irmp_data;\r
4225a882 82\r
afd1e690 83#if defined(STELLARIS_ARM_CORTEX_M4)\r
84 ROM_FPUEnable();\r
85 ROM_FPUStackingEnable();\r
86 ROM_SysCtlClockSet(SYSCTL_SYSDIV_5|SYSCTL_USE_PLL|SYSCTL_XTAL_16MHZ|SYSCTL_OSC_MAIN);\r
87#endif\r
88\r
1f54e86c 89 irmp_init(); // initialize irmp\r
90 timer1_init(); // initialize timer 1\r
91 sei (); // enable interrupts\r
4225a882 92\r
1f54e86c 93 for (;;)\r
4225a882 94 {\r
1f54e86c 95 if (irmp_get_data (&irmp_data))\r
96 {\r
97 // ir signal decoded, do something here...\r
98 // irmp_data.protocol is the protocol, see irmp.h\r
99 // irmp_data.address is the address/manufacturer code of ir sender\r
100 // irmp_data.command is the command code\r
101 // irmp_protocol_names[irmp_data.protocol] is the protocol name (if enabled, see irmpconfig.h)\r
102 }\r
4225a882 103 }\r
4225a882 104}\r