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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * @file irsnd.c\r | |
3 | *\r | |
4 | * Copyright (c) 2010 Frank Meyer - frank(at)fli4l.de\r | |
5 | *\r | |
c7c9a4a1 | 6 | * $Id: irsnd.c,v 1.20 2010/06/15 15:47:21 fm Exp $\r |
5481e9cd | 7 | *\r |
4225a882 | 8 | * This program is free software; you can redistribute it and/or modify\r |
9 | * it under the terms of the GNU General Public License as published by\r | |
10 | * the Free Software Foundation; either version 2 of the License, or\r | |
11 | * (at your option) any later version.\r | |
12 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
13 | */\r | |
14 | \r | |
15 | #ifdef unix // test/debug on linux/unix\r | |
16 | #include <stdio.h>\r | |
17 | #include <unistd.h>\r | |
18 | #include <stdlib.h>\r | |
19 | #include <string.h>\r | |
20 | #include <inttypes.h>\r | |
21 | \r | |
22 | #define DEBUG\r | |
23 | #define F_CPU 8000000L\r | |
24 | \r | |
25 | #else // not unix:\r | |
26 | \r | |
27 | #ifdef WIN32 // test/debug on windows\r | |
28 | #include <stdio.h>\r | |
29 | #define F_CPU 8000000L\r | |
30 | typedef unsigned char uint8_t;\r | |
31 | typedef unsigned short uint16_t;\r | |
32 | #define DEBUG\r | |
33 | \r | |
34 | #else\r | |
35 | \r | |
36 | #ifdef CODEVISION\r | |
37 | #define COM2A0 6\r | |
38 | #define WGM21 1\r | |
39 | #define CS20 0\r | |
40 | #else\r | |
41 | #include <inttypes.h>\r | |
42 | #include <avr/io.h>\r | |
43 | #include <util/delay.h>\r | |
44 | #include <avr/pgmspace.h>\r | |
45 | #endif // CODEVISION\r | |
46 | \r | |
47 | #endif // WIN32\r | |
48 | #endif // unix\r | |
49 | \r | |
50 | #include "irmp.h"\r | |
46dd89b7 | 51 | #include "irsndconfig.h"\r |
4225a882 | 52 | #include "irsnd.h"\r |
53 | \r | |
4225a882 | 54 | #define SIRCS_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME + 0.5)\r |
55 | #define SIRCS_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME + 0.5)\r | |
56 | #define SIRCS_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME + 0.5)\r | |
57 | #define SIRCS_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME + 0.5)\r | |
58 | #define SIRCS_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME + 0.5)\r | |
a7054daf | 59 | #define SIRCS_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
60 | #define SIRCS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIRCS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 61 | \r |
62 | #define NEC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME + 0.5)\r | |
63 | #define NEC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME + 0.5)\r | |
a7054daf | 64 | #define NEC_REPEAT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME + 0.5)\r |
4225a882 | 65 | #define NEC_PULSE_LEN (uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME + 0.5)\r |
66 | #define NEC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME + 0.5)\r | |
67 | #define NEC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 68 | #define NEC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 69 | \r |
70 | #define SAMSUNG_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME + 0.5)\r | |
71 | #define SAMSUNG_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME + 0.5)\r | |
72 | #define SAMSUNG_PULSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME + 0.5)\r | |
73 | #define SAMSUNG_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME + 0.5)\r | |
74 | #define SAMSUNG_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 75 | #define SAMSUNG_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 76 | \r |
a7054daf | 77 | #define SAMSUNG32_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
78 | #define SAMSUNG32_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SAMSUNG32_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
5b437ff6 | 79 | \r |
4225a882 | 80 | #define MATSUSHITA_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME + 0.5)\r |
81 | #define MATSUSHITA_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME + 0.5)\r | |
82 | #define MATSUSHITA_PULSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME + 0.5)\r | |
83 | #define MATSUSHITA_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME + 0.5)\r | |
84 | #define MATSUSHITA_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 85 | #define MATSUSHITA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * MATSUSHITA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 86 | \r |
87 | #define RECS80_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME + 0.5)\r | |
88 | #define RECS80_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME + 0.5)\r | |
89 | #define RECS80_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME + 0.5)\r | |
90 | #define RECS80_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME + 0.5)\r | |
91 | #define RECS80_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 92 | #define RECS80_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 93 | \r |
94 | #define RC5_START_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r | |
95 | #define RC5_BIT_LEN (uint8_t)(F_INTERRUPTS * RC5_BIT_TIME + 0.5)\r | |
a7054daf | 96 | #define RC5_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC5_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 97 | \r |
98 | #define RC6_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME + 0.5)\r | |
99 | #define RC6_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME + 0.5)\r | |
100 | #define RC6_TOGGLE_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME + 0.5)\r | |
101 | #define RC6_BIT_LEN (uint8_t)(F_INTERRUPTS * RC6_BIT_TIME + 0.5)\r | |
a7054daf | 102 | #define RC6_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RC6_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 103 | \r |
104 | #define DENON_PULSE_LEN (uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME + 0.5)\r | |
105 | #define DENON_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME + 0.5)\r | |
106 | #define DENON_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 107 | #define DENON_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
108 | #define DENON_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * DENON_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 109 | \r |
110 | #define RECS80EXT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME + 0.5)\r | |
111 | #define RECS80EXT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME + 0.5)\r | |
112 | #define RECS80EXT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME + 0.5)\r | |
113 | #define RECS80EXT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME + 0.5)\r | |
114 | #define RECS80EXT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 115 | #define RECS80EXT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RECS80EXT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
4225a882 | 116 | \r |
117 | #define NUBERT_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME + 0.5)\r | |
118 | #define NUBERT_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME + 0.5)\r | |
119 | #define NUBERT_1_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME + 0.5)\r | |
120 | #define NUBERT_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME + 0.5)\r | |
121 | #define NUBERT_0_PULSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME + 0.5)\r | |
122 | #define NUBERT_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME + 0.5)\r | |
a7054daf | 123 | #define NUBERT_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
124 | #define NUBERT_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NUBERT_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
4225a882 | 125 | \r |
5481e9cd | 126 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME + 0.5)\r |
127 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME + 0.5)\r | |
128 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME + 0.5)\r | |
129 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME + 0.5)\r | |
130 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME + 0.5)\r | |
131 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME + 0.5)\r | |
132 | #define BANG_OLUFSEN_PULSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME + 0.5)\r | |
133 | #define BANG_OLUFSEN_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME + 0.5)\r | |
134 | #define BANG_OLUFSEN_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME + 0.5)\r | |
135 | #define BANG_OLUFSEN_R_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME + 0.5)\r | |
136 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME + 0.5)\r | |
a7054daf | 137 | #define BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * BANG_OLUFSEN_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r |
5481e9cd | 138 | \r |
d155e9ab | 139 | #define GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_PRE_PAUSE_TIME + 0.5)\r |
140 | #define GRUNDIG_OR_NOKIA_BIT_LEN (uint8_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_BIT_TIME + 0.5)\r | |
a7054daf | 141 | #define GRUNDIG_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r |
142 | #define NOKIA_AUTO_REPETITION_PAUSE_LEN (uint16_t)(F_INTERRUPTS * NOKIA_AUTO_REPETITION_PAUSE_TIME + 0.5) // use uint16_t!\r | |
143 | #define GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
144 | \r | |
145 | #define SIEMENS_START_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME + 0.5)\r | |
146 | #define SIEMENS_BIT_LEN (uint8_t)(F_INTERRUPTS * SIEMENS_BIT_TIME + 0.5)\r | |
147 | #define SIEMENS_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * SIEMENS_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
5b437ff6 | 148 | \r |
4225a882 | 149 | #define IRSND_FREQ_32_KHZ (uint8_t) ((F_CPU / 32000 / 2) - 1)\r |
150 | #define IRSND_FREQ_36_KHZ (uint8_t) ((F_CPU / 36000 / 2) - 1)\r | |
151 | #define IRSND_FREQ_38_KHZ (uint8_t) ((F_CPU / 38000 / 2) - 1)\r | |
152 | #define IRSND_FREQ_40_KHZ (uint8_t) ((F_CPU / 40000 / 2) - 1)\r | |
153 | #define IRSND_FREQ_56_KHZ (uint8_t) ((F_CPU / 56000 / 2) - 1)\r | |
5481e9cd | 154 | #define IRSND_FREQ_455_KHZ (uint8_t) ((F_CPU / 455000 / 2) - 1)\r |
4225a882 | 155 | \r |
48664931 | 156 | #define FDC_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME + 0.5)\r |
157 | #define FDC_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME + 0.5)\r | |
158 | #define FDC_PULSE_LEN (uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME + 0.5)\r | |
159 | #define FDC_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME + 0.5)\r | |
160 | #define FDC_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME + 0.5)\r | |
161 | #define FDC_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * FDC_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
b5ea7869 | 162 | \r |
c7c9a4a1 | 163 | #define RCCAR_START_BIT_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME + 0.5)\r |
164 | #define RCCAR_START_BIT_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME + 0.5)\r | |
165 | #define RCCAR_PULSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME + 0.5)\r | |
166 | #define RCCAR_1_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME + 0.5)\r | |
167 | #define RCCAR_0_PAUSE_LEN (uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME + 0.5)\r | |
168 | #define RCCAR_FRAME_REPEAT_PAUSE_LEN (uint16_t)(F_INTERRUPTS * RCCAR_FRAME_REPEAT_PAUSE_TIME + 0.5) // use uint16_t!\r | |
169 | \r | |
4225a882 | 170 | static volatile uint8_t irsnd_busy;\r |
171 | static volatile uint8_t irsnd_protocol;\r | |
d155e9ab | 172 | static volatile uint8_t irsnd_buffer[6];\r |
a7054daf | 173 | static volatile uint8_t irsnd_repeat;\r |
4225a882 | 174 | static volatile uint8_t irsnd_is_on = FALSE;\r |
175 | \r | |
176 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
177 | * Switch PWM on\r | |
178 | * @details Switches PWM on with a narrow spike on all 3 channels -> leds glowing\r | |
179 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
180 | */\r | |
181 | static void\r | |
182 | irsnd_on (void)\r | |
183 | {\r | |
184 | if (! irsnd_is_on)\r | |
185 | {\r | |
186 | #ifndef DEBUG\r | |
187 | #if defined (__AVR_ATmega32__)\r | |
188 | TCCR2 |= (1<<COM20)|(1<<WGM21); // = 0x42: toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r | |
189 | #else\r | |
190 | TCCR2A |= (1<<COM2A0)|(1<<WGM21); // = 0x42: toggle OC2A on compare match, clear Timer 2 at compare match OCR2A\r | |
46dd89b7 | 191 | #endif // __AVR...\r |
4225a882 | 192 | #endif // DEBUG\r |
193 | irsnd_is_on = TRUE;\r | |
194 | }\r | |
195 | }\r | |
196 | \r | |
197 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
198 | * Switch PWM off\r | |
199 | * @details Switches PWM off\r | |
200 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
201 | */\r | |
202 | static void\r | |
203 | irsnd_off (void)\r | |
204 | {\r | |
205 | if (irsnd_is_on)\r | |
206 | {\r | |
207 | #ifndef DEBUG\r | |
208 | #if defined (__AVR_ATmega32__)\r | |
209 | TCCR2 &= ~(1<<COM20); // normal port operation, OC2A disconnected.\r | |
210 | #else\r | |
211 | TCCR2A &= ~(1<<COM2A0); // normal port operation, OC2A disconnected.\r | |
46dd89b7 | 212 | #endif // __AVR...\r |
4225a882 | 213 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r |
214 | #endif // DEBUG\r | |
215 | irsnd_is_on = FALSE;\r | |
216 | }\r | |
217 | }\r | |
218 | \r | |
219 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
220 | * Set PWM frequency\r | |
221 | * @details sets pwm frequency\r | |
222 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
223 | */\r | |
224 | static void\r | |
225 | irsnd_set_freq (uint8_t freq)\r | |
226 | {\r | |
227 | #ifndef DEBUG\r | |
228 | #if defined (__AVR_ATmega32__)\r | |
229 | OCR2 = freq;\r | |
230 | #else\r | |
231 | OCR2A = freq;\r | |
46dd89b7 | 232 | #endif // __AVR...\r |
4225a882 | 233 | #endif // DEBUG\r |
234 | }\r | |
235 | \r | |
236 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
237 | * Initialize the PWM\r | |
238 | * @details Configures 0CR0A, 0CR0B and 0CR2B as PWM channels\r | |
239 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
240 | */\r | |
241 | void\r | |
242 | irsnd_init (void)\r | |
243 | {\r | |
244 | #ifndef DEBUG\r | |
245 | IRSND_PORT &= ~(1<<IRSND_BIT); // set IRSND_BIT to low\r | |
246 | IRSND_DDR |= (1<<IRSND_BIT); // set IRSND_BIT to output\r | |
247 | \r | |
248 | #if defined (__AVR_ATmega32__)\r | |
249 | TCCR2 = (1<<WGM21); // CTC mode\r | |
250 | TCCR2 |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r | |
251 | #else\r | |
252 | TCCR2A = (1<<WGM21); // CTC mode\r | |
253 | TCCR2B |= (1<<CS20); // 0x01, start Timer 2, no prescaling\r | |
46dd89b7 | 254 | #endif // __AVR... \r |
4225a882 | 255 | \r |
256 | irsnd_set_freq (IRSND_FREQ_36_KHZ); // default frequency\r | |
257 | #endif // DEBUG\r | |
258 | }\r | |
259 | \r | |
260 | uint8_t\r | |
261 | irsnd_is_busy (void)\r | |
262 | {\r | |
263 | return irsnd_busy;\r | |
264 | }\r | |
265 | \r | |
266 | static uint16_t\r | |
267 | bitsrevervse (uint16_t x, uint8_t len)\r | |
268 | {\r | |
269 | uint16_t xx = 0;\r | |
270 | \r | |
271 | while(len)\r | |
272 | {\r | |
273 | xx <<= 1;\r | |
274 | if (x & 1)\r | |
275 | {\r | |
276 | xx |= 1;\r | |
277 | }\r | |
278 | x >>= 1;\r | |
279 | len--;\r | |
280 | }\r | |
281 | return xx;\r | |
282 | }\r | |
283 | \r | |
284 | \r | |
285 | uint8_t\r | |
879b06c2 | 286 | irsnd_send_data (IRMP_DATA * irmp_data_p, uint8_t do_wait)\r |
4225a882 | 287 | {\r |
288 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r | |
289 | static uint8_t toggle_bit_recs80;\r | |
290 | #endif\r | |
291 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
292 | static uint8_t toggle_bit_recs80ext;\r | |
293 | #endif\r | |
294 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
295 | static uint8_t toggle_bit_rc5;\r | |
296 | #endif\r | |
297 | uint16_t address;\r | |
298 | uint16_t command;\r | |
299 | \r | |
879b06c2 | 300 | if (do_wait)\r |
4225a882 | 301 | {\r |
879b06c2 | 302 | while (irsnd_busy)\r |
303 | {\r | |
304 | // do nothing;\r | |
305 | }\r | |
306 | }\r | |
307 | else if (irsnd_busy)\r | |
308 | {\r | |
309 | return (FALSE);\r | |
4225a882 | 310 | }\r |
311 | \r | |
312 | irsnd_protocol = irmp_data_p->protocol;\r | |
a7054daf | 313 | irsnd_repeat = irmp_data_p->flags;\r |
4225a882 | 314 | \r |
315 | switch (irsnd_protocol)\r | |
316 | {\r | |
317 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
318 | case IRMP_SIRCS_PROTOCOL:\r | |
319 | {\r | |
320 | command = bitsrevervse (irmp_data_p->command, SIRCS_MINIMUM_DATA_LEN);\r | |
321 | \r | |
4225a882 | 322 | irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
323 | irsnd_buffer[1] = (command & 0x000F) << 4; // CCCC0000\r | |
324 | irsnd_busy = TRUE;\r | |
325 | break;\r | |
326 | }\r | |
327 | #endif\r | |
328 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
329 | case IRMP_NEC_PROTOCOL:\r | |
46dd89b7 | 330 | case IRMP_APPLE_PROTOCOL:\r |
4225a882 | 331 | {\r |
332 | address = bitsrevervse (irmp_data_p->address, NEC_ADDRESS_LEN);\r | |
333 | command = bitsrevervse (irmp_data_p->command, NEC_COMMAND_LEN);\r | |
334 | \r | |
4225a882 | 335 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
336 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
337 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r | |
46dd89b7 | 338 | \r |
339 | if (irsnd_protocol == IRMP_APPLE_PROTOCOL)\r | |
340 | {\r | |
341 | irsnd_protocol = IRMP_NEC_PROTOCOL; // APPLE protocol is NEC with fix bitmask instead of inverted command\r | |
342 | irsnd_buffer[3] = 0x8B; // 10001011\r | |
343 | }\r | |
344 | else\r | |
345 | {\r | |
346 | irsnd_buffer[3] = ~((command & 0xFF00) >> 8); // cccccccc\r | |
347 | }\r | |
348 | \r | |
4225a882 | 349 | irsnd_busy = TRUE;\r |
350 | break;\r | |
351 | }\r | |
352 | #endif\r | |
353 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
354 | case IRMP_SAMSUNG_PROTOCOL:\r | |
355 | {\r | |
356 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r | |
357 | command = bitsrevervse (irmp_data_p->command, SAMSUNG_COMMAND_LEN);\r | |
358 | \r | |
4225a882 | 359 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
360 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
361 | irsnd_buffer[2] = (command & 0x00F0) | ((command & 0xF000) >> 12); // IIIICCCC\r | |
362 | irsnd_buffer[3] = ((command & 0x0F00) >> 4) | ((~(command & 0xF000) >> 12) & 0x0F); // CCCCcccc\r | |
363 | irsnd_buffer[4] = (~(command & 0x0F00) >> 4) & 0xF0; // cccc0000\r | |
364 | irsnd_busy = TRUE;\r | |
365 | break;\r | |
366 | }\r | |
367 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
368 | {\r | |
369 | address = bitsrevervse (irmp_data_p->address, SAMSUNG_ADDRESS_LEN);\r | |
370 | command = bitsrevervse (irmp_data_p->command, SAMSUNG32_COMMAND_LEN);\r | |
371 | \r | |
4225a882 | 372 | irsnd_buffer[0] = (address & 0xFF00) >> 8; // AAAAAAAA\r |
373 | irsnd_buffer[1] = (address & 0x00FF); // AAAAAAAA\r | |
374 | irsnd_buffer[2] = (command & 0xFF00) >> 8; // CCCCCCCC\r | |
375 | irsnd_buffer[3] = (command & 0x00FF); // CCCCCCCC\r | |
376 | irsnd_busy = TRUE;\r | |
377 | break;\r | |
378 | }\r | |
379 | #endif\r | |
380 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
381 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
382 | {\r | |
383 | address = bitsrevervse (irmp_data_p->address, MATSUSHITA_ADDRESS_LEN);\r | |
384 | command = bitsrevervse (irmp_data_p->command, MATSUSHITA_COMMAND_LEN);\r | |
385 | \r | |
4225a882 | 386 | irsnd_buffer[0] = (command & 0x0FF0) >> 4; // CCCCCCCC\r |
387 | irsnd_buffer[1] = ((command & 0x000F) << 4) | ((address & 0x0F00) >> 8); // CCCCAAAA\r | |
388 | irsnd_buffer[2] = (address & 0x00FF); // AAAAAAAA\r | |
389 | irsnd_busy = TRUE;\r | |
390 | break;\r | |
391 | }\r | |
392 | #endif\r | |
393 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r | |
394 | case IRMP_RECS80_PROTOCOL:\r | |
395 | {\r | |
396 | toggle_bit_recs80 = toggle_bit_recs80 ? 0x00 : 0x40;\r | |
397 | \r | |
4225a882 | 398 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80 | ((irmp_data_p->address & 0x0007) << 3) |\r |
399 | ((irmp_data_p->command & 0x0038) >> 3); // STAAACCC\r | |
400 | irsnd_buffer[1] = (irmp_data_p->command & 0x07) << 5; // CCC00000\r | |
401 | irsnd_busy = TRUE;\r | |
402 | break;\r | |
403 | }\r | |
404 | #endif\r | |
405 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
406 | case IRMP_RECS80EXT_PROTOCOL:\r | |
407 | {\r | |
408 | toggle_bit_recs80ext = toggle_bit_recs80ext ? 0x00 : 0x40;\r | |
409 | \r | |
4225a882 | 410 | irsnd_buffer[0] = 0x80 | toggle_bit_recs80ext | ((irmp_data_p->address & 0x000F) << 2) |\r |
411 | ((irmp_data_p->command & 0x0030) >> 4); // STAAAACC\r | |
412 | irsnd_buffer[1] = (irmp_data_p->command & 0x0F) << 4; // CCCC0000\r | |
413 | irsnd_busy = TRUE;\r | |
414 | break;\r | |
415 | }\r | |
416 | #endif\r | |
417 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
418 | case IRMP_RC5_PROTOCOL:\r | |
419 | {\r | |
420 | toggle_bit_rc5 = toggle_bit_rc5 ? 0x00 : 0x40;\r | |
421 | \r | |
4225a882 | 422 | irsnd_buffer[0] = ((irmp_data_p->command & 0x40) ? 0x00 : 0x80) | toggle_bit_rc5 |\r |
423 | ((irmp_data_p->address & 0x001F) << 1) | ((irmp_data_p->command & 0x20) >> 5); // CTAAAAAC\r | |
424 | irsnd_buffer[1] = (irmp_data_p->command & 0x1F) << 3; // CCCCC000\r | |
425 | irsnd_busy = TRUE;\r | |
426 | break;\r | |
427 | }\r | |
428 | #endif\r | |
429 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r | |
430 | case IRMP_DENON_PROTOCOL:\r | |
431 | {\r | |
d155e9ab | 432 | irsnd_buffer[0] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x0380) >> 7); // AAAAACCC (1st frame)\r |
433 | irsnd_buffer[1] = (irmp_data_p->command & 0x7F) << 1; // CCCCCCC\r | |
434 | irsnd_buffer[2] = ((irmp_data_p->address & 0x1F) << 3) | (((~irmp_data_p->command) & 0x0380) >> 7); // AAAAACCC (2nd frame)\r | |
435 | irsnd_buffer[3] = (~(irmp_data_p->command) & 0x7F) << 1; // CCCCCCC\r | |
4225a882 | 436 | irsnd_busy = TRUE;\r |
437 | break;\r | |
438 | }\r | |
439 | #endif\r | |
440 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r | |
441 | case IRMP_NUBERT_PROTOCOL:\r | |
442 | {\r | |
4225a882 | 443 | irsnd_buffer[0] = irmp_data_p->command >> 2; // CCCCCCCC\r |
444 | irsnd_buffer[1] = (irmp_data_p->command & 0x0003) << 6; // CC000000\r | |
445 | irsnd_busy = TRUE;\r | |
446 | break;\r | |
447 | }\r | |
5481e9cd | 448 | #endif\r |
449 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
450 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
451 | {\r | |
5481e9cd | 452 | irsnd_buffer[0] = irmp_data_p->command >> 11; // SXSCCCCC\r |
453 | irsnd_buffer[1] = irmp_data_p->command >> 3; // CCCCCCCC\r | |
454 | irsnd_buffer[2] = (irmp_data_p->command & 0x0007) << 5; // CCC00000\r | |
455 | irsnd_busy = TRUE;\r | |
456 | break;\r | |
457 | }\r | |
4225a882 | 458 | #endif\r |
5b437ff6 | 459 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r |
460 | case IRMP_GRUNDIG_PROTOCOL:\r | |
461 | {\r | |
462 | command = bitsrevervse (irmp_data_p->command, GRUNDIG_COMMAND_LEN);\r | |
463 | \r | |
d155e9ab | 464 | irsnd_buffer[0] = 0xFF; // S1111111 (1st frame)\r |
465 | irsnd_buffer[1] = 0xC0; // 11\r | |
466 | irsnd_buffer[2] = 0x80 | (command >> 2); // SCCCCCCC (2nd frame)\r | |
467 | irsnd_buffer[3] = (command << 6) & 0xC0; // CC\r | |
468 | \r | |
469 | irsnd_busy = TRUE;\r | |
470 | break;\r | |
471 | }\r | |
472 | #endif\r | |
473 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
474 | case IRMP_NOKIA_PROTOCOL:\r | |
475 | {\r | |
476 | address = bitsrevervse (irmp_data_p->address, NOKIA_ADDRESS_LEN);\r | |
477 | command = bitsrevervse (irmp_data_p->command, NOKIA_COMMAND_LEN);\r | |
478 | \r | |
479 | irsnd_buffer[0] = 0xBF; // S0111111 (1st + 3rd frame)\r | |
480 | irsnd_buffer[1] = 0xFF; // 11111111\r | |
481 | irsnd_buffer[2] = 0x80; // 1\r | |
482 | irsnd_buffer[3] = 0x80 | command >> 1; // SCCCCCCC (2nd frame)\r | |
483 | irsnd_buffer[4] = (command << 7) | (address >> 1); // CAAAAAAA\r | |
484 | irsnd_buffer[5] = (address << 7); // A\r | |
5b437ff6 | 485 | \r |
486 | irsnd_busy = TRUE;\r | |
487 | break;\r | |
488 | }\r | |
489 | #endif\r | |
a7054daf | 490 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r |
491 | case IRMP_SIEMENS_PROTOCOL:\r | |
492 | {\r | |
493 | irsnd_buffer[0] = ((irmp_data_p->address & 0x0FFF) >> 5); // SAAAAAAA\r | |
494 | irsnd_buffer[1] = ((irmp_data_p->address & 0x1F) << 3) | ((irmp_data_p->command & 0x7F) >> 5); // AAAAA0CC\r | |
495 | irsnd_buffer[2] = (irmp_data_p->command << 3); // CCCCC0\r | |
496 | irsnd_busy = TRUE;\r | |
497 | break;\r | |
498 | }\r | |
b5ea7869 | 499 | #endif\r |
48664931 | 500 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
501 | case IRMP_FDC_PROTOCOL:\r | |
b5ea7869 | 502 | {\r |
48664931 | 503 | address = bitsrevervse (irmp_data_p->address, FDC_ADDRESS_LEN);\r |
504 | command = bitsrevervse (irmp_data_p->command, FDC_COMMAND_LEN);\r | |
b5ea7869 | 505 | \r |
c7c9a4a1 | 506 | irsnd_buffer[0] = (address & 0xFF); // AAAAAAAA\r |
507 | irsnd_buffer[1] = 0; // 00000000\r | |
508 | irsnd_buffer[2] = 0; // 0000RRRR\r | |
509 | irsnd_buffer[3] = (command & 0xFF); // CCCCCCCC\r | |
510 | irsnd_buffer[4] = ~(command & 0xFF); // cccccccc\r | |
511 | irsnd_busy = TRUE;\r | |
512 | break;\r | |
513 | }\r | |
514 | #endif\r | |
515 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r | |
516 | case IRMP_RCCAR_PROTOCOL:\r | |
517 | {\r | |
518 | address = bitsrevervse (irmp_data_p->address, 2); // A0 A1\r | |
519 | command = bitsrevervse (irmp_data_p->command, RCCAR_COMMAND_LEN - 2); // D0 D1 D2 D3 D4 D5 D6 D7 C0 C1 V\r | |
520 | \r | |
521 | irsnd_buffer[0] = ((command & 0x06) << 5) | ((address & 0x0003) << 4) | ((command & 0x0780) >> 7); // C0 C1 A0 A1 D0 D1 D2 D3\r | |
522 | irsnd_buffer[1] = ((command & 0x78) << 1) | ((command & 0x0001) << 3); // D4 D5 D6 D7 V 0 0 0\r | |
523 | \r | |
b5ea7869 | 524 | irsnd_busy = TRUE;\r |
525 | break;\r | |
526 | }\r | |
a7054daf | 527 | #endif\r |
4225a882 | 528 | default:\r |
529 | {\r | |
530 | break;\r | |
531 | }\r | |
532 | }\r | |
533 | \r | |
534 | return irsnd_busy;\r | |
535 | }\r | |
536 | \r | |
537 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
538 | * ISR routine\r | |
539 | * @details ISR routine, called 10000 times per second\r | |
540 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
541 | */\r | |
542 | uint8_t\r | |
543 | irsnd_ISR (void)\r | |
544 | {\r | |
545 | static uint8_t current_bit = 0xFF;\r | |
546 | static uint8_t pulse_counter;\r | |
547 | static uint8_t pause_counter;\r | |
548 | static uint8_t startbit_pulse_len;\r | |
549 | static uint8_t startbit_pause_len;\r | |
550 | static uint8_t pulse_1_len;\r | |
551 | static uint8_t pause_1_len;\r | |
552 | static uint8_t pulse_0_len;\r | |
553 | static uint8_t pause_0_len;\r | |
554 | static uint8_t has_stop_bit;\r | |
555 | static uint8_t new_frame = TRUE;\r | |
556 | static uint8_t complete_data_len;\r | |
a7054daf | 557 | static uint8_t n_auto_repetitions; // number of auto_repetitions\r |
558 | static uint8_t auto_repetition_counter; // auto_repetition counter\r | |
559 | static uint16_t auto_repetition_pause_len; // pause before auto_repetition, uint16_t!\r | |
560 | static uint16_t auto_repetition_pause_counter; // pause before auto_repetition, uint16_t!\r | |
561 | static uint8_t n_repeat_frames; // number of repeat frames\r | |
562 | static uint8_t repeat_counter; // repeat counter\r | |
563 | static uint16_t repeat_frame_pause_len; // pause before repeat, uint16_t!\r | |
564 | static uint16_t packet_repeat_pause_counter; // pause before repeat, uint16_t!\r | |
5481e9cd | 565 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
566 | static uint8_t last_bit_value;\r | |
567 | #endif\r | |
568 | static uint8_t pulse_len = 0xFF;\r | |
569 | static uint8_t pause_len = 0xFF;\r | |
4225a882 | 570 | \r |
571 | if (irsnd_busy)\r | |
572 | {\r | |
573 | if (current_bit == 0xFF && new_frame) // start of transmission...\r | |
574 | {\r | |
a7054daf | 575 | if (auto_repetition_counter > 0)\r |
4225a882 | 576 | {\r |
a7054daf | 577 | auto_repetition_pause_counter++;\r |
4225a882 | 578 | \r |
a7054daf | 579 | if (auto_repetition_pause_counter >= auto_repetition_pause_len)\r |
4225a882 | 580 | {\r |
a7054daf | 581 | auto_repetition_pause_counter = 0;\r |
4225a882 | 582 | \r |
583 | if (irsnd_protocol == IRMP_DENON_PROTOCOL)\r | |
584 | {\r | |
585 | current_bit = 16;\r | |
586 | complete_data_len = 2 * DENON_COMPLETE_DATA_LEN + 1;\r | |
587 | }\r | |
a7054daf | 588 | else if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL) // n'th grundig info frame\r |
5b437ff6 | 589 | {\r |
590 | current_bit = 15;\r | |
591 | complete_data_len = 16 + GRUNDIG_COMPLETE_DATA_LEN;\r | |
592 | }\r | |
a7054daf | 593 | else if (irsnd_protocol == IRMP_NOKIA_PROTOCOL) // n'th nokia info frame\r |
d155e9ab | 594 | {\r |
a7054daf | 595 | if (auto_repetition_counter + 1 < n_auto_repetitions)\r |
d155e9ab | 596 | {\r |
597 | current_bit = 23;\r | |
598 | complete_data_len = 24 + NOKIA_COMPLETE_DATA_LEN;\r | |
599 | }\r | |
a7054daf | 600 | else // nokia stop frame\r |
d155e9ab | 601 | {\r |
602 | current_bit = 0xFF;\r | |
603 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r | |
604 | }\r | |
605 | }\r | |
4225a882 | 606 | }\r |
607 | else\r | |
608 | {\r | |
609 | #ifdef DEBUG\r | |
610 | if (irsnd_is_on)\r | |
611 | {\r | |
612 | putchar ('0');\r | |
613 | }\r | |
614 | else\r | |
615 | {\r | |
616 | putchar ('1');\r | |
617 | }\r | |
618 | #endif\r | |
619 | return irsnd_busy;\r | |
620 | }\r | |
621 | }\r | |
a7054daf | 622 | else if (repeat_counter > 0 && packet_repeat_pause_counter < repeat_frame_pause_len)\r |
623 | {\r | |
624 | packet_repeat_pause_counter++;\r | |
625 | \r | |
626 | #ifdef DEBUG\r | |
627 | if (irsnd_is_on)\r | |
628 | {\r | |
629 | putchar ('0');\r | |
630 | }\r | |
631 | else\r | |
632 | {\r | |
633 | putchar ('1');\r | |
634 | }\r | |
635 | #endif\r | |
636 | return irsnd_busy;\r | |
637 | }\r | |
4225a882 | 638 | else\r |
639 | {\r | |
a7054daf | 640 | n_repeat_frames = irsnd_repeat;\r |
641 | packet_repeat_pause_counter = 0;\r | |
642 | pulse_counter = 0;\r | |
643 | pause_counter = 0;\r | |
5481e9cd | 644 | \r |
4225a882 | 645 | switch (irsnd_protocol)\r |
646 | {\r | |
647 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
648 | case IRMP_SIRCS_PROTOCOL:\r | |
649 | {\r | |
a7054daf | 650 | startbit_pulse_len = SIRCS_START_BIT_PULSE_LEN;\r |
651 | startbit_pause_len = SIRCS_START_BIT_PAUSE_LEN;\r | |
652 | pulse_1_len = SIRCS_1_PULSE_LEN;\r | |
653 | pause_1_len = SIRCS_PAUSE_LEN;\r | |
654 | pulse_0_len = SIRCS_0_PULSE_LEN;\r | |
655 | pause_0_len = SIRCS_PAUSE_LEN;\r | |
656 | has_stop_bit = SIRCS_STOP_BIT;\r | |
657 | complete_data_len = SIRCS_MINIMUM_DATA_LEN;\r | |
658 | n_auto_repetitions = (repeat_counter == 0) ? SIRCS_FRAMES : 1; // 3 frames auto repetition if first frame\r | |
659 | auto_repetition_pause_len = SIRCS_AUTO_REPETITION_PAUSE_LEN; // 25ms pause\r | |
660 | repeat_frame_pause_len = SIRCS_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 661 | irsnd_set_freq (IRSND_FREQ_40_KHZ);\r |
662 | break;\r | |
663 | }\r | |
664 | #endif\r | |
665 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
666 | case IRMP_NEC_PROTOCOL:\r | |
667 | {\r | |
a7054daf | 668 | startbit_pulse_len = NEC_START_BIT_PULSE_LEN;\r |
669 | \r | |
670 | if (repeat_counter > 0)\r | |
671 | {\r | |
672 | startbit_pause_len = NEC_REPEAT_START_BIT_PAUSE_LEN;\r | |
673 | complete_data_len = 0;\r | |
674 | }\r | |
675 | else\r | |
676 | {\r | |
677 | startbit_pause_len = NEC_START_BIT_PAUSE_LEN;\r | |
678 | complete_data_len = NEC_COMPLETE_DATA_LEN;\r | |
679 | }\r | |
680 | \r | |
681 | pulse_1_len = NEC_PULSE_LEN;\r | |
682 | pause_1_len = NEC_1_PAUSE_LEN;\r | |
683 | pulse_0_len = NEC_PULSE_LEN;\r | |
684 | pause_0_len = NEC_0_PAUSE_LEN;\r | |
685 | has_stop_bit = NEC_STOP_BIT;\r | |
686 | n_auto_repetitions = 1; // 1 frame\r | |
687 | auto_repetition_pause_len = 0;\r | |
688 | repeat_frame_pause_len = NEC_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 689 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
690 | break;\r | |
691 | }\r | |
692 | #endif\r | |
693 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
694 | case IRMP_SAMSUNG_PROTOCOL:\r | |
695 | {\r | |
a7054daf | 696 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
697 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN;\r | |
698 | pulse_1_len = SAMSUNG_PULSE_LEN;\r | |
699 | pause_1_len = SAMSUNG_1_PAUSE_LEN;\r | |
700 | pulse_0_len = SAMSUNG_PULSE_LEN;\r | |
701 | pause_0_len = SAMSUNG_0_PAUSE_LEN;\r | |
702 | has_stop_bit = SAMSUNG_STOP_BIT;\r | |
703 | complete_data_len = SAMSUNG_COMPLETE_DATA_LEN;\r | |
704 | n_auto_repetitions = 1; // 1 frame\r | |
705 | auto_repetition_pause_len = 0;\r | |
706 | repeat_frame_pause_len = SAMSUNG_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 707 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
708 | break;\r | |
709 | }\r | |
710 | \r | |
711 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
712 | {\r | |
a7054daf | 713 | startbit_pulse_len = SAMSUNG_START_BIT_PULSE_LEN;\r |
714 | startbit_pause_len = SAMSUNG_START_BIT_PAUSE_LEN;\r | |
715 | pulse_1_len = SAMSUNG_PULSE_LEN;\r | |
716 | pause_1_len = SAMSUNG_1_PAUSE_LEN;\r | |
717 | pulse_0_len = SAMSUNG_PULSE_LEN;\r | |
718 | pause_0_len = SAMSUNG_0_PAUSE_LEN;\r | |
719 | has_stop_bit = SAMSUNG_STOP_BIT;\r | |
720 | complete_data_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
721 | n_auto_repetitions = SAMSUNG32_FRAMES; // 2 frames\r | |
722 | auto_repetition_pause_len = SAMSUNG32_AUTO_REPETITION_PAUSE_LEN; // 47 ms pause\r | |
723 | repeat_frame_pause_len = SAMSUNG32_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 724 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
725 | break;\r | |
726 | }\r | |
727 | #endif\r | |
728 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
729 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
730 | {\r | |
a7054daf | 731 | startbit_pulse_len = MATSUSHITA_START_BIT_PULSE_LEN;\r |
732 | startbit_pause_len = MATSUSHITA_START_BIT_PAUSE_LEN;\r | |
733 | pulse_1_len = MATSUSHITA_PULSE_LEN;\r | |
734 | pause_1_len = MATSUSHITA_1_PAUSE_LEN;\r | |
735 | pulse_0_len = MATSUSHITA_PULSE_LEN;\r | |
736 | pause_0_len = MATSUSHITA_0_PAUSE_LEN;\r | |
737 | has_stop_bit = MATSUSHITA_STOP_BIT;\r | |
738 | complete_data_len = MATSUSHITA_COMPLETE_DATA_LEN;\r | |
739 | n_auto_repetitions = 1; // 1 frame\r | |
740 | auto_repetition_pause_len = 0;\r | |
741 | repeat_frame_pause_len = MATSUSHITA_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 742 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
743 | break;\r | |
744 | }\r | |
745 | #endif\r | |
746 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r | |
747 | case IRMP_RECS80_PROTOCOL:\r | |
748 | {\r | |
a7054daf | 749 | startbit_pulse_len = RECS80_START_BIT_PULSE_LEN;\r |
750 | startbit_pause_len = RECS80_START_BIT_PAUSE_LEN;\r | |
751 | pulse_1_len = RECS80_PULSE_LEN;\r | |
752 | pause_1_len = RECS80_1_PAUSE_LEN;\r | |
753 | pulse_0_len = RECS80_PULSE_LEN;\r | |
754 | pause_0_len = RECS80_0_PAUSE_LEN;\r | |
755 | has_stop_bit = RECS80_STOP_BIT;\r | |
756 | complete_data_len = RECS80_COMPLETE_DATA_LEN;\r | |
757 | n_auto_repetitions = 1; // 1 frame\r | |
758 | auto_repetition_pause_len = 0;\r | |
759 | repeat_frame_pause_len = RECS80_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 760 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
761 | break;\r | |
762 | }\r | |
763 | #endif\r | |
764 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
765 | case IRMP_RECS80EXT_PROTOCOL:\r | |
766 | {\r | |
a7054daf | 767 | startbit_pulse_len = RECS80EXT_START_BIT_PULSE_LEN;\r |
768 | startbit_pause_len = RECS80EXT_START_BIT_PAUSE_LEN;\r | |
769 | pulse_1_len = RECS80EXT_PULSE_LEN;\r | |
770 | pause_1_len = RECS80EXT_1_PAUSE_LEN;\r | |
771 | pulse_0_len = RECS80EXT_PULSE_LEN;\r | |
772 | pause_0_len = RECS80EXT_0_PAUSE_LEN;\r | |
773 | has_stop_bit = RECS80EXT_STOP_BIT;\r | |
774 | complete_data_len = RECS80EXT_COMPLETE_DATA_LEN;\r | |
775 | n_auto_repetitions = 1; // 1 frame\r | |
776 | auto_repetition_pause_len = 0;\r | |
777 | repeat_frame_pause_len = RECS80EXT_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 778 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
779 | break;\r | |
780 | }\r | |
781 | #endif\r | |
782 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r | |
783 | case IRMP_RC5_PROTOCOL:\r | |
784 | {\r | |
a7054daf | 785 | startbit_pulse_len = RC5_BIT_LEN;\r |
786 | startbit_pause_len = RC5_BIT_LEN;\r | |
787 | pulse_len = RC5_BIT_LEN;\r | |
788 | pause_len = RC5_BIT_LEN;\r | |
789 | has_stop_bit = RC5_STOP_BIT;\r | |
790 | complete_data_len = RC5_COMPLETE_DATA_LEN;\r | |
791 | n_auto_repetitions = 1; // 1 frame\r | |
792 | auto_repetition_pause_len = 0;\r | |
793 | repeat_frame_pause_len = RC5_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 794 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
795 | break;\r | |
796 | }\r | |
797 | #endif\r | |
798 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r | |
799 | case IRMP_DENON_PROTOCOL:\r | |
800 | {\r | |
a7054daf | 801 | startbit_pulse_len = 0x00;\r |
802 | startbit_pause_len = 0x00;\r | |
803 | pulse_1_len = DENON_PULSE_LEN;\r | |
804 | pause_1_len = DENON_1_PAUSE_LEN;\r | |
805 | pulse_0_len = DENON_PULSE_LEN;\r | |
806 | pause_0_len = DENON_0_PAUSE_LEN;\r | |
807 | has_stop_bit = DENON_STOP_BIT;\r | |
808 | complete_data_len = DENON_COMPLETE_DATA_LEN;\r | |
809 | n_auto_repetitions = DENON_FRAMES; // 2 frames, 2nd with inverted command\r | |
810 | auto_repetition_pause_len = DENON_AUTO_REPETITION_PAUSE_LEN; // 65 ms pause after 1st frame\r | |
811 | repeat_frame_pause_len = DENON_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 812 | irsnd_set_freq (IRSND_FREQ_32_KHZ);\r |
813 | break;\r | |
814 | }\r | |
815 | #endif\r | |
816 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r | |
817 | case IRMP_NUBERT_PROTOCOL:\r | |
818 | {\r | |
a7054daf | 819 | startbit_pulse_len = NUBERT_START_BIT_PULSE_LEN;\r |
820 | startbit_pause_len = NUBERT_START_BIT_PAUSE_LEN;\r | |
821 | pulse_1_len = NUBERT_1_PULSE_LEN;\r | |
822 | pause_1_len = NUBERT_1_PAUSE_LEN;\r | |
823 | pulse_0_len = NUBERT_0_PULSE_LEN;\r | |
824 | pause_0_len = NUBERT_0_PAUSE_LEN;\r | |
825 | has_stop_bit = NUBERT_STOP_BIT;\r | |
826 | complete_data_len = NUBERT_COMPLETE_DATA_LEN;\r | |
827 | n_auto_repetitions = NUBERT_FRAMES; // 2 frames\r | |
828 | auto_repetition_pause_len = NUBERT_AUTO_REPETITION_PAUSE_LEN; // 35 ms pause\r | |
829 | repeat_frame_pause_len = NUBERT_FRAME_REPEAT_PAUSE_LEN;\r | |
4225a882 | 830 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r |
831 | break;\r | |
832 | }\r | |
5481e9cd | 833 | #endif\r |
834 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
835 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
836 | {\r | |
a7054daf | 837 | startbit_pulse_len = BANG_OLUFSEN_START_BIT1_PULSE_LEN;\r |
838 | startbit_pause_len = BANG_OLUFSEN_START_BIT1_PAUSE_LEN;\r | |
839 | pulse_1_len = BANG_OLUFSEN_PULSE_LEN;\r | |
840 | pause_1_len = BANG_OLUFSEN_1_PAUSE_LEN;\r | |
841 | pulse_0_len = BANG_OLUFSEN_PULSE_LEN;\r | |
842 | pause_0_len = BANG_OLUFSEN_0_PAUSE_LEN;\r | |
843 | has_stop_bit = BANG_OLUFSEN_STOP_BIT;\r | |
844 | complete_data_len = BANG_OLUFSEN_COMPLETE_DATA_LEN;\r | |
845 | n_auto_repetitions = 1; // 1 frame\r | |
846 | auto_repetition_pause_len = 0;\r | |
847 | repeat_frame_pause_len = BANG_OLUFSEN_FRAME_REPEAT_PAUSE_LEN;\r | |
848 | last_bit_value = 0;\r | |
5481e9cd | 849 | irsnd_set_freq (IRSND_FREQ_455_KHZ);\r |
850 | break;\r | |
851 | }\r | |
5b437ff6 | 852 | #endif\r |
853 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
854 | case IRMP_GRUNDIG_PROTOCOL:\r | |
855 | {\r | |
a7054daf | 856 | startbit_pulse_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r |
857 | startbit_pause_len = GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN;\r | |
858 | pulse_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r | |
859 | pause_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r | |
860 | has_stop_bit = GRUNDIG_OR_NOKIA_STOP_BIT;\r | |
861 | complete_data_len = GRUNDIG_COMPLETE_DATA_LEN;\r | |
862 | n_auto_repetitions = GRUNDIG_FRAMES; // 2 frames\r | |
863 | auto_repetition_pause_len = GRUNDIG_AUTO_REPETITION_PAUSE_LEN; // 20m sec pause\r | |
864 | repeat_frame_pause_len = GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r | |
d155e9ab | 865 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
a7054daf | 866 | \r |
d155e9ab | 867 | break;\r |
868 | }\r | |
869 | #endif\r | |
870 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
871 | case IRMP_NOKIA_PROTOCOL:\r | |
872 | {\r | |
a7054daf | 873 | startbit_pulse_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r |
874 | startbit_pause_len = GRUNDIG_OR_NOKIA_PRE_PAUSE_LEN;\r | |
875 | pulse_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r | |
876 | pause_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r | |
877 | has_stop_bit = GRUNDIG_OR_NOKIA_STOP_BIT;\r | |
878 | complete_data_len = NOKIA_COMPLETE_DATA_LEN;\r | |
879 | n_auto_repetitions = NOKIA_FRAMES; // 2 frames\r | |
880 | auto_repetition_pause_len = NOKIA_AUTO_REPETITION_PAUSE_LEN; // 20 msec pause\r | |
881 | repeat_frame_pause_len = GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_LEN; // 117 msec pause\r | |
d155e9ab | 882 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
5b437ff6 | 883 | break;\r |
884 | }\r | |
a7054daf | 885 | #endif\r |
886 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r | |
887 | case IRMP_SIEMENS_PROTOCOL:\r | |
888 | {\r | |
889 | startbit_pulse_len = SIEMENS_BIT_LEN;\r | |
890 | startbit_pause_len = SIEMENS_BIT_LEN;\r | |
891 | pulse_len = SIEMENS_BIT_LEN;\r | |
892 | pause_len = SIEMENS_BIT_LEN;\r | |
893 | has_stop_bit = SIEMENS_STOP_BIT;\r | |
894 | complete_data_len = SIEMENS_COMPLETE_DATA_LEN - 1;\r | |
895 | n_auto_repetitions = 1; // 1 frame\r | |
896 | auto_repetition_pause_len = 0;\r | |
897 | repeat_frame_pause_len = SIEMENS_FRAME_REPEAT_PAUSE_LEN;\r | |
898 | irsnd_set_freq (IRSND_FREQ_36_KHZ);\r | |
899 | break;\r | |
900 | }\r | |
b5ea7869 | 901 | #endif\r |
48664931 | 902 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
903 | case IRMP_FDC_PROTOCOL:\r | |
b5ea7869 | 904 | {\r |
48664931 | 905 | startbit_pulse_len = FDC_START_BIT_PULSE_LEN;\r |
906 | startbit_pause_len = FDC_START_BIT_PAUSE_LEN;\r | |
907 | complete_data_len = FDC_COMPLETE_DATA_LEN;\r | |
908 | pulse_1_len = FDC_PULSE_LEN;\r | |
909 | pause_1_len = FDC_1_PAUSE_LEN;\r | |
910 | pulse_0_len = FDC_PULSE_LEN;\r | |
911 | pause_0_len = FDC_0_PAUSE_LEN;\r | |
912 | has_stop_bit = FDC_STOP_BIT;\r | |
b5ea7869 | 913 | n_auto_repetitions = 1; // 1 frame\r |
914 | auto_repetition_pause_len = 0;\r | |
48664931 | 915 | repeat_frame_pause_len = FDC_FRAME_REPEAT_PAUSE_LEN;\r |
b5ea7869 | 916 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r |
917 | break;\r | |
918 | }\r | |
c7c9a4a1 | 919 | #endif\r |
920 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r | |
921 | case IRMP_RCCAR_PROTOCOL:\r | |
922 | {\r | |
923 | startbit_pulse_len = RCCAR_START_BIT_PULSE_LEN;\r | |
924 | startbit_pause_len = RCCAR_START_BIT_PAUSE_LEN;\r | |
925 | complete_data_len = RCCAR_COMPLETE_DATA_LEN;\r | |
926 | pulse_1_len = RCCAR_PULSE_LEN;\r | |
927 | pause_1_len = RCCAR_1_PAUSE_LEN;\r | |
928 | pulse_0_len = RCCAR_PULSE_LEN;\r | |
929 | pause_0_len = RCCAR_0_PAUSE_LEN;\r | |
930 | has_stop_bit = RCCAR_STOP_BIT;\r | |
931 | n_auto_repetitions = 1; // 1 frame\r | |
932 | auto_repetition_pause_len = 0;\r | |
933 | repeat_frame_pause_len = RCCAR_FRAME_REPEAT_PAUSE_LEN;\r | |
934 | irsnd_set_freq (IRSND_FREQ_38_KHZ);\r | |
935 | break;\r | |
936 | }\r | |
4225a882 | 937 | #endif\r |
938 | default:\r | |
939 | {\r | |
940 | irsnd_busy = FALSE;\r | |
941 | break;\r | |
942 | }\r | |
943 | }\r | |
944 | }\r | |
945 | }\r | |
946 | \r | |
947 | if (irsnd_busy)\r | |
948 | {\r | |
949 | new_frame = FALSE;\r | |
a7054daf | 950 | \r |
4225a882 | 951 | switch (irsnd_protocol)\r |
952 | {\r | |
953 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1\r | |
954 | case IRMP_SIRCS_PROTOCOL:\r | |
955 | #endif\r | |
956 | #if IRSND_SUPPORT_NEC_PROTOCOL == 1\r | |
957 | case IRMP_NEC_PROTOCOL:\r | |
958 | #endif\r | |
959 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
960 | case IRMP_SAMSUNG_PROTOCOL:\r | |
961 | case IRMP_SAMSUNG32_PROTOCOL:\r | |
962 | #endif\r | |
963 | #if IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
964 | case IRMP_MATSUSHITA_PROTOCOL:\r | |
965 | #endif\r | |
966 | #if IRSND_SUPPORT_RECS80_PROTOCOL == 1\r | |
967 | case IRMP_RECS80_PROTOCOL:\r | |
968 | #endif\r | |
969 | #if IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
970 | case IRMP_RECS80EXT_PROTOCOL:\r | |
971 | #endif\r | |
972 | #if IRSND_SUPPORT_DENON_PROTOCOL == 1\r | |
973 | case IRMP_DENON_PROTOCOL:\r | |
974 | #endif\r | |
975 | #if IRSND_SUPPORT_NUBERT_PROTOCOL == 1\r | |
976 | case IRMP_NUBERT_PROTOCOL:\r | |
5481e9cd | 977 | #endif\r |
978 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
979 | case IRMP_BANG_OLUFSEN_PROTOCOL:\r | |
4225a882 | 980 | #endif\r |
c7c9a4a1 | 981 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
48664931 | 982 | case IRMP_FDC_PROTOCOL:\r |
b5ea7869 | 983 | #endif\r |
c7c9a4a1 | 984 | #if IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
985 | case IRMP_RCCAR_PROTOCOL:\r | |
986 | #endif\r | |
a7054daf | 987 | \r |
988 | \r | |
989 | #if IRSND_SUPPORT_SIRCS_PROTOCOL == 1 || IRSND_SUPPORT_NEC_PROTOCOL == 1 || IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1 || IRSND_SUPPORT_MATSUSHITA_PROTOCOL == 1 || \\r | |
990 | IRSND_SUPPORT_RECS80_PROTOCOL == 1 || IRSND_SUPPORT_RECS80EXT_PROTOCOL == 1 || IRSND_SUPPORT_DENON_PROTOCOL == 1 || IRSND_SUPPORT_NUBERT_PROTOCOL == 1 || \\r | |
c7c9a4a1 | 991 | IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1 || IRSND_SUPPORT_FDC_PROTOCOL == 1 || IRSND_SUPPORT_RCCAR_PROTOCOL == 1\r |
4225a882 | 992 | {\r |
5481e9cd | 993 | if (pulse_counter == 0)\r |
4225a882 | 994 | {\r |
5481e9cd | 995 | if (current_bit == 0xFF) // send start bit\r |
996 | {\r | |
997 | pulse_len = startbit_pulse_len;\r | |
998 | pause_len = startbit_pause_len;\r | |
999 | }\r | |
1000 | else if (current_bit < complete_data_len) // send n'th bit\r | |
4225a882 | 1001 | {\r |
5481e9cd | 1002 | #if IRSND_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
1003 | if (irsnd_protocol == IRMP_SAMSUNG_PROTOCOL)\r | |
4225a882 | 1004 | {\r |
5481e9cd | 1005 | if (current_bit < SAMSUNG_ADDRESS_LEN) // send address bits\r |
1006 | {\r | |
1007 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
1008 | pause_len = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ?\r | |
1009 | SAMSUNG_1_PAUSE_LEN : SAMSUNG_0_PAUSE_LEN;\r | |
1010 | }\r | |
1011 | else if (current_bit == SAMSUNG_ADDRESS_LEN) // send SYNC bit (16th bit)\r | |
1012 | {\r | |
1013 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
1014 | pause_len = SAMSUNG_START_BIT_PAUSE_LEN;\r | |
1015 | }\r | |
1016 | else if (current_bit < SAMSUNG_COMPLETE_DATA_LEN) // send n'th bit\r | |
1017 | {\r | |
1018 | uint8_t cur_bit = current_bit - 1; // sync skipped, offset = -1 !\r | |
1019 | \r | |
1020 | pulse_len = SAMSUNG_PULSE_LEN;\r | |
1021 | pause_len = (irsnd_buffer[cur_bit / 8] & (1<<(7-(cur_bit % 8)))) ?\r | |
1022 | SAMSUNG_1_PAUSE_LEN : SAMSUNG_0_PAUSE_LEN;\r | |
1023 | }\r | |
4225a882 | 1024 | }\r |
5481e9cd | 1025 | else\r |
1026 | #endif\r | |
1027 | \r | |
1028 | #if IRSND_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
1029 | if (irsnd_protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
4225a882 | 1030 | {\r |
5481e9cd | 1031 | if (current_bit == 0) // send 2nd start bit\r |
1032 | {\r | |
1033 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r | |
1034 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN;\r | |
1035 | }\r | |
1036 | else if (current_bit == 1) // send 3rd start bit\r | |
1037 | {\r | |
1038 | pulse_len = BANG_OLUFSEN_START_BIT3_PULSE_LEN;\r | |
1039 | pause_len = BANG_OLUFSEN_START_BIT3_PAUSE_LEN;\r | |
1040 | }\r | |
1041 | else if (current_bit == 2) // send 4th start bit\r | |
1042 | {\r | |
1043 | pulse_len = BANG_OLUFSEN_START_BIT2_PULSE_LEN;\r | |
1044 | pause_len = BANG_OLUFSEN_START_BIT2_PAUSE_LEN;\r | |
1045 | }\r | |
1046 | else if (current_bit == 19) // send trailer bit\r | |
1047 | {\r | |
1048 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r | |
1049 | pause_len = BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN;\r | |
1050 | }\r | |
1051 | else if (current_bit < BANG_OLUFSEN_COMPLETE_DATA_LEN) // send n'th bit\r | |
1052 | {\r | |
1053 | uint8_t cur_bit_value = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? 1 : 0;\r | |
1054 | pulse_len = BANG_OLUFSEN_PULSE_LEN;\r | |
1055 | \r | |
1056 | if (cur_bit_value == last_bit_value)\r | |
1057 | {\r | |
1058 | pause_len = BANG_OLUFSEN_R_PAUSE_LEN;\r | |
1059 | }\r | |
1060 | else\r | |
1061 | {\r | |
1062 | pause_len = cur_bit_value ? BANG_OLUFSEN_1_PAUSE_LEN : BANG_OLUFSEN_0_PAUSE_LEN;\r | |
1063 | last_bit_value = cur_bit_value;\r | |
1064 | }\r | |
1065 | }\r | |
4225a882 | 1066 | }\r |
5481e9cd | 1067 | else\r |
1068 | #endif\r | |
1069 | if (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8))))\r | |
4225a882 | 1070 | {\r |
5481e9cd | 1071 | pulse_len = pulse_1_len;\r |
1072 | pause_len = pause_1_len;\r | |
1073 | }\r | |
1074 | else\r | |
1075 | {\r | |
1076 | pulse_len = pulse_0_len;\r | |
1077 | pause_len = pause_0_len;\r | |
4225a882 | 1078 | }\r |
1079 | }\r | |
5481e9cd | 1080 | else if (has_stop_bit) // send stop bit\r |
4225a882 | 1081 | {\r |
1082 | pulse_len = pulse_0_len;\r | |
4225a882 | 1083 | \r |
a7054daf | 1084 | if (auto_repetition_counter < n_auto_repetitions)\r |
5481e9cd | 1085 | {\r |
1086 | pause_len = pause_0_len;\r | |
1087 | }\r | |
1088 | else\r | |
1089 | {\r | |
1090 | pause_len = 255; // last frame: pause of 255\r | |
1091 | }\r | |
4225a882 | 1092 | }\r |
1093 | }\r | |
1094 | \r | |
1095 | if (pulse_counter < pulse_len)\r | |
1096 | {\r | |
1097 | if (pulse_counter == 0)\r | |
1098 | {\r | |
1099 | irsnd_on ();\r | |
1100 | }\r | |
1101 | pulse_counter++;\r | |
1102 | }\r | |
1103 | else if (pause_counter < pause_len)\r | |
1104 | {\r | |
1105 | if (pause_counter == 0)\r | |
1106 | {\r | |
1107 | irsnd_off ();\r | |
1108 | }\r | |
1109 | pause_counter++;\r | |
1110 | }\r | |
1111 | else\r | |
1112 | {\r | |
1113 | current_bit++;\r | |
1114 | \r | |
1115 | if (current_bit >= complete_data_len + has_stop_bit)\r | |
1116 | {\r | |
1117 | current_bit = 0xFF;\r | |
a7054daf | 1118 | auto_repetition_counter++;\r |
4225a882 | 1119 | \r |
a7054daf | 1120 | if (auto_repetition_counter == n_auto_repetitions)\r |
4225a882 | 1121 | {\r |
1122 | irsnd_busy = FALSE;\r | |
a7054daf | 1123 | auto_repetition_counter = 0;\r |
4225a882 | 1124 | }\r |
1125 | new_frame = TRUE;\r | |
1126 | }\r | |
1127 | \r | |
1128 | pulse_counter = 0;\r | |
1129 | pause_counter = 0;\r | |
1130 | }\r | |
1131 | break;\r | |
1132 | }\r | |
a7054daf | 1133 | #endif\r |
1134 | \r | |
4225a882 | 1135 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1\r |
1136 | case IRMP_RC5_PROTOCOL:\r | |
a7054daf | 1137 | #endif\r |
1138 | #if IRSND_SUPPORT_SIEMENS_PROTOCOL == 1\r | |
1139 | case IRMP_SIEMENS_PROTOCOL:\r | |
1140 | #endif\r | |
1141 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
1142 | case IRMP_GRUNDIG_PROTOCOL:\r | |
1143 | #endif\r | |
1144 | #if IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
1145 | case IRMP_NOKIA_PROTOCOL:\r | |
1146 | #endif\r | |
4225a882 | 1147 | \r |
a7054daf | 1148 | #if IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
1149 | {\r | |
1150 | if (pulse_counter == pulse_len && pause_counter == pause_len)\r | |
4225a882 | 1151 | {\r |
a7054daf | 1152 | current_bit++;\r |
4225a882 | 1153 | \r |
a7054daf | 1154 | if (current_bit >= complete_data_len)\r |
4225a882 | 1155 | {\r |
a7054daf | 1156 | current_bit = 0xFF;\r |
1157 | \r | |
1158 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r | |
1159 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r | |
4225a882 | 1160 | {\r |
a7054daf | 1161 | auto_repetition_counter++;\r |
1162 | \r | |
1163 | if (repeat_counter > 0)\r | |
1164 | { // set 117 msec pause time\r | |
1165 | auto_repetition_pause_len = GRUNDIG_OR_NOKIA_FRAME_REPEAT_PAUSE_LEN;\r | |
1166 | }\r | |
1167 | \r | |
1168 | if (repeat_counter < n_repeat_frames) // tricky: repeat n info frames per auto repetition before sending last stop frame\r | |
1169 | {\r | |
1170 | n_auto_repetitions++; // increment number of auto repetitions\r | |
1171 | repeat_counter++;\r | |
1172 | }\r | |
1173 | else if (auto_repetition_counter == n_auto_repetitions)\r | |
1174 | {\r | |
1175 | irsnd_busy = FALSE;\r | |
1176 | auto_repetition_counter = 0;\r | |
1177 | }\r | |
4225a882 | 1178 | }\r |
a7054daf | 1179 | else\r |
1180 | #endif\r | |
4225a882 | 1181 | {\r |
a7054daf | 1182 | irsnd_busy = FALSE;\r |
4225a882 | 1183 | }\r |
4225a882 | 1184 | \r |
4225a882 | 1185 | new_frame = TRUE;\r |
1186 | irsnd_off ();\r | |
1187 | }\r | |
1188 | \r | |
1189 | pulse_counter = 0;\r | |
1190 | pause_counter = 0;\r | |
1191 | }\r | |
5b437ff6 | 1192 | \r |
a7054daf | 1193 | if (! new_frame)\r |
5b437ff6 | 1194 | {\r |
a7054daf | 1195 | uint8_t first_pulse;\r |
5b437ff6 | 1196 | \r |
a7054daf | 1197 | #if IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
1198 | if (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL || irsnd_protocol == IRMP_NOKIA_PROTOCOL)\r | |
5b437ff6 | 1199 | {\r |
a7054daf | 1200 | if (current_bit == 0xFF || // start bit of start-frame\r |
1201 | (irsnd_protocol == IRMP_GRUNDIG_PROTOCOL && current_bit == 15) || // start bit of info-frame (Grundig)\r | |
1202 | (irsnd_protocol == IRMP_NOKIA_PROTOCOL && (current_bit == 23 || current_bit == 47))) // start bit of info- or stop-frame (Nokia)\r | |
5b437ff6 | 1203 | {\r |
a7054daf | 1204 | pulse_len = startbit_pulse_len;\r |
1205 | pause_len = startbit_pause_len;\r | |
1206 | first_pulse = TRUE;\r | |
5b437ff6 | 1207 | }\r |
a7054daf | 1208 | else // send n'th bit\r |
5b437ff6 | 1209 | {\r |
a7054daf | 1210 | pulse_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r |
1211 | pause_len = GRUNDIG_OR_NOKIA_BIT_LEN;\r | |
1212 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r | |
5b437ff6 | 1213 | }\r |
5b437ff6 | 1214 | }\r |
a7054daf | 1215 | else // if (irsnd_protocol == IRMP_RC5_PROTOCOL || irsnd_protocol == IRMP_SIEMENS_PROTOCOL)\r |
1216 | #endif\r | |
5b437ff6 | 1217 | {\r |
a7054daf | 1218 | if (current_bit == 0xFF) // 1 start bit\r |
1219 | {\r | |
1220 | first_pulse = TRUE;\r | |
1221 | }\r | |
1222 | else // send n'th bit\r | |
1223 | {\r | |
1224 | first_pulse = (irsnd_buffer[current_bit / 8] & (1<<(7-(current_bit % 8)))) ? TRUE : FALSE;\r | |
1225 | }\r | |
5b437ff6 | 1226 | \r |
a7054daf | 1227 | if (irsnd_protocol == IRMP_RC5_PROTOCOL)\r |
1228 | {\r | |
1229 | first_pulse = first_pulse ? FALSE : TRUE;\r | |
1230 | }\r | |
1231 | }\r | |
5b437ff6 | 1232 | \r |
1233 | if (first_pulse)\r | |
1234 | {\r | |
a7054daf | 1235 | if (pulse_counter < pulse_len)\r |
5b437ff6 | 1236 | {\r |
1237 | if (pulse_counter == 0)\r | |
1238 | {\r | |
1239 | irsnd_on ();\r | |
1240 | }\r | |
1241 | pulse_counter++;\r | |
1242 | }\r | |
a7054daf | 1243 | else // if (pause_counter < pause_len)\r |
5b437ff6 | 1244 | {\r |
1245 | if (pause_counter == 0)\r | |
1246 | {\r | |
1247 | irsnd_off ();\r | |
1248 | }\r | |
1249 | pause_counter++;\r | |
1250 | }\r | |
5b437ff6 | 1251 | }\r |
1252 | else\r | |
1253 | {\r | |
a7054daf | 1254 | if (pause_counter < pause_len)\r |
5b437ff6 | 1255 | {\r |
1256 | if (pause_counter == 0)\r | |
1257 | {\r | |
1258 | irsnd_off ();\r | |
1259 | }\r | |
1260 | pause_counter++;\r | |
1261 | }\r | |
a7054daf | 1262 | else // if (pulse_counter < pulse_len)\r |
5b437ff6 | 1263 | {\r |
1264 | if (pulse_counter == 0)\r | |
1265 | {\r | |
1266 | irsnd_on ();\r | |
1267 | }\r | |
1268 | pulse_counter++;\r | |
1269 | }\r | |
5b437ff6 | 1270 | }\r |
1271 | }\r | |
1272 | break;\r | |
1273 | }\r | |
a7054daf | 1274 | #endif // IRSND_SUPPORT_RC5_PROTOCOL == 1 || IRSND_SUPPORT_SIEMENS_PROTOCOL == 1 || IRSND_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRSND_SUPPORT_NOKIA_PROTOCOL == 1\r |
5b437ff6 | 1275 | \r |
4225a882 | 1276 | default:\r |
1277 | {\r | |
1278 | irsnd_busy = FALSE;\r | |
1279 | break;\r | |
1280 | }\r | |
1281 | }\r | |
1282 | }\r | |
a7054daf | 1283 | \r |
1284 | if (! irsnd_busy)\r | |
1285 | {\r | |
1286 | if (repeat_counter < n_repeat_frames)\r | |
1287 | {\r | |
c7c9a4a1 | 1288 | #if IRSND_SUPPORT_FDC_PROTOCOL == 1\r |
1289 | if (irsnd_protocol == IRMP_FDC_PROTOCOL)\r | |
1290 | {\r | |
1291 | irsnd_buffer[2] |= 0x0F;\r | |
1292 | }\r | |
1293 | #endif\r | |
a7054daf | 1294 | repeat_counter++;\r |
1295 | irsnd_busy = TRUE;\r | |
1296 | }\r | |
1297 | else\r | |
1298 | {\r | |
1299 | n_repeat_frames = 0;\r | |
1300 | repeat_counter = 0;\r | |
1301 | }\r | |
1302 | }\r | |
4225a882 | 1303 | }\r |
1304 | \r | |
1305 | #ifdef DEBUG\r | |
1306 | if (irsnd_is_on)\r | |
1307 | {\r | |
1308 | putchar ('0');\r | |
1309 | }\r | |
1310 | else\r | |
1311 | {\r | |
1312 | putchar ('1');\r | |
1313 | }\r | |
1314 | #endif\r | |
1315 | \r | |
1316 | return irsnd_busy;\r | |
1317 | }\r | |
1318 | \r | |
1319 | #ifdef DEBUG\r | |
1320 | \r | |
1321 | // main function - for unix/linux + windows only!\r | |
1322 | // AVR: see main.c!\r | |
1323 | // Compile it under linux with:\r | |
1324 | // cc irsnd.c -o irsnd\r | |
1325 | //\r | |
1326 | // usage: ./irsnd protocol hex-address hex-command >filename\r | |
1327 | \r | |
1328 | int\r | |
1329 | main (int argc, char ** argv)\r | |
1330 | {\r | |
1331 | int idx;\r | |
4225a882 | 1332 | int protocol;\r |
1333 | int address;\r | |
1334 | int command;\r | |
4225a882 | 1335 | IRMP_DATA irmp_data;\r |
1336 | \r | |
a7054daf | 1337 | if (argc != 4 && argc != 5)\r |
4225a882 | 1338 | {\r |
a7054daf | 1339 | fprintf (stderr, "usage: %s protocol hex-address hex-command [repeat] > filename\n", argv[0]);\r |
4225a882 | 1340 | return 1;\r |
1341 | }\r | |
1342 | \r | |
1343 | if (sscanf (argv[1], "%d", &protocol) == 1 &&\r | |
1344 | sscanf (argv[2], "%x", &address) == 1 &&\r | |
1345 | sscanf (argv[3], "%x", &command) == 1)\r | |
1346 | {\r | |
1347 | irmp_data.protocol = protocol;\r | |
1348 | irmp_data.address = address;\r | |
1349 | irmp_data.command = command;\r | |
1350 | \r | |
a7054daf | 1351 | if (argc == 5)\r |
1352 | {\r | |
1353 | irmp_data.flags = atoi (argv[4]);\r | |
1354 | }\r | |
1355 | else\r | |
1356 | {\r | |
1357 | irmp_data.flags = 0;\r | |
1358 | }\r | |
1359 | \r | |
4225a882 | 1360 | irsnd_init ();\r |
1361 | \r | |
879b06c2 | 1362 | (void) irsnd_send_data (&irmp_data, TRUE);\r |
4225a882 | 1363 | \r |
a7054daf | 1364 | while (irsnd_busy)\r |
1365 | {\r | |
1366 | irsnd_ISR ();\r | |
1367 | }\r | |
1368 | for (idx = 0; idx < 20; idx++)\r | |
1369 | {\r | |
1370 | irsnd_ISR ();\r | |
4225a882 | 1371 | }\r |
1372 | \r | |
1373 | putchar ('\n');\r | |
1374 | }\r | |
1375 | else\r | |
1376 | {\r | |
1377 | fprintf (stderr, "%s: wrong arguments\n", argv[0]);\r | |
1378 | return 1;\r | |
1379 | }\r | |
1380 | return 0;\r | |
1381 | }\r | |
1382 | \r | |
1383 | #endif // DEBUG\r |