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4225a882 | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
2 | * irmp.c - infrared multi-protocol decoder, supports several remote control protocols\r | |
3 | *\r | |
2ac088b2 | 4 | * Copyright (c) 2009-2013 Frank Meyer - frank(at)fli4l.de\r |
4225a882 | 5 | *\r |
40ca4604 | 6 | * $Id: irmp.c,v 1.141 2013/04/09 11:55:39 fm Exp $\r |
cb8474cc | 7 | *\r |
4225a882 | 8 | * ATMEGA88 @ 8 MHz\r |
9 | *\r | |
7644ac04 | 10 | * Supported mikrocontrollers:\r |
11 | *\r | |
21a4e0ee | 12 | * ATtiny87, ATtiny167\r |
476267f4 | 13 | * ATtiny45, ATtiny85\r |
2ac088b2 | 14 | * ATtiny44, ATtiny84\r |
7644ac04 | 15 | * ATmega8, ATmega16, ATmega32\r |
16 | * ATmega162\r | |
e664a9f3 | 17 | * ATmega164, ATmega324, ATmega644, ATmega644P, ATmega1284, ATmega1284P\r |
7644ac04 | 18 | * ATmega88, ATmega88P, ATmega168, ATmega168P, ATmega328P\r |
19 | *\r | |
4225a882 | 20 | * This program is free software; you can redistribute it and/or modify\r |
21 | * it under the terms of the GNU General Public License as published by\r | |
22 | * the Free Software Foundation; either version 2 of the License, or\r | |
23 | * (at your option) any later version.\r | |
24 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
25 | */\r | |
26 | \r | |
f5ca0147 | 27 | #include "irmp.h"\r |
4225a882 | 28 | \r |
89e8cafb | 29 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1 || IRMP_SUPPORT_NOKIA_PROTOCOL == 1 || IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
08f2dd9d | 30 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 1\r |
d155e9ab | 31 | #else\r |
08f2dd9d | 32 | # define IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL 0\r |
d155e9ab | 33 | #endif\r |
34 | \r | |
12948cf3 | 35 | #if IRMP_SUPPORT_SIEMENS_PROTOCOL == 1 || IRMP_SUPPORT_RUWIDO_PROTOCOL == 1\r |
08f2dd9d | 36 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 1\r |
12948cf3 | 37 | #else\r |
08f2dd9d | 38 | # define IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL 0\r |
12948cf3 | 39 | #endif\r |
40 | \r | |
deba2a0a | 41 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 || \\r |
42 | IRMP_SUPPORT_RC6_PROTOCOL == 1 || \\r | |
43 | IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1 || \\r | |
44 | IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1 || \\r | |
2fb27bfe | 45 | IRMP_SUPPORT_IR60_PROTOCOL == 1 || \\r |
b85cb27d | 46 | IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1 || \\r |
47 | IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
08f2dd9d | 48 | # define IRMP_SUPPORT_MANCHESTER 1\r |
77f488bb | 49 | #else\r |
08f2dd9d | 50 | # define IRMP_SUPPORT_MANCHESTER 0\r |
77f488bb | 51 | #endif\r |
52 | \r | |
93570cd9 | 53 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
08f2dd9d | 54 | # define IRMP_SUPPORT_SERIAL 1\r |
deba2a0a | 55 | #else\r |
08f2dd9d | 56 | # define IRMP_SUPPORT_SERIAL 0\r |
deba2a0a | 57 | #endif\r |
58 | \r | |
6db2522c | 59 | #define IRMP_KEY_REPETITION_LEN (uint16_t)(F_INTERRUPTS * 150.0e-3 + 0.5) // autodetect key repetition within 150 msec\r |
4225a882 | 60 | \r |
fef942f6 | 61 | #define MIN_TOLERANCE_00 1.0 // -0%\r |
62 | #define MAX_TOLERANCE_00 1.0 // +0%\r | |
63 | \r | |
64 | #define MIN_TOLERANCE_05 0.95 // -5%\r | |
65 | #define MAX_TOLERANCE_05 1.05 // +5%\r | |
66 | \r | |
4225a882 | 67 | #define MIN_TOLERANCE_10 0.9 // -10%\r |
68 | #define MAX_TOLERANCE_10 1.1 // +10%\r | |
69 | \r | |
fef942f6 | 70 | #define MIN_TOLERANCE_15 0.85 // -15%\r |
71 | #define MAX_TOLERANCE_15 1.15 // +15%\r | |
72 | \r | |
4225a882 | 73 | #define MIN_TOLERANCE_20 0.8 // -20%\r |
74 | #define MAX_TOLERANCE_20 1.2 // +20%\r | |
75 | \r | |
76 | #define MIN_TOLERANCE_30 0.7 // -30%\r | |
77 | #define MAX_TOLERANCE_30 1.3 // +30%\r | |
78 | \r | |
79 | #define MIN_TOLERANCE_40 0.6 // -40%\r | |
80 | #define MAX_TOLERANCE_40 1.4 // +40%\r | |
81 | \r | |
82 | #define MIN_TOLERANCE_50 0.5 // -50%\r | |
83 | #define MAX_TOLERANCE_50 1.5 // +50%\r | |
84 | \r | |
85 | #define MIN_TOLERANCE_60 0.4 // -60%\r | |
86 | #define MAX_TOLERANCE_60 1.6 // +60%\r | |
87 | \r | |
9405f84a | 88 | #define MIN_TOLERANCE_70 0.3 // -70%\r |
89 | #define MAX_TOLERANCE_70 1.7 // +70%\r | |
90 | \r | |
fef942f6 | 91 | #define SIRCS_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
92 | #define SIRCS_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
93 | #define SIRCS_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
deba2a0a | 94 | #if IRMP_SUPPORT_NETBOX_PROTOCOL // only 5% to avoid conflict with NETBOX:\r |
08f2dd9d | 95 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r |
deba2a0a | 96 | #else // only 5% + 1 to avoid conflict with RC6:\r |
08f2dd9d | 97 | # define SIRCS_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r |
deba2a0a | 98 | #endif\r |
fef942f6 | 99 | #define SIRCS_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
100 | #define SIRCS_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
101 | #define SIRCS_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
102 | #define SIRCS_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
103 | #define SIRCS_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
104 | #define SIRCS_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIRCS_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
105 | \r | |
93ba2e01 | 106 | #define NEC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
107 | #define NEC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
108 | #define NEC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
109 | #define NEC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
110 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
111 | #define NEC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
112 | #define NEC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
113 | #define NEC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
114 | #define NEC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
115 | #define NEC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
116 | #define NEC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
117 | #define NEC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NEC_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
6db2522c | 118 | // autodetect nec repetition frame within 50 msec:\r |
119 | // NEC seems to send the first repetition frame after 40ms, further repetition frames after 100 ms\r | |
120 | #if 0\r | |
121 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NEC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
122 | #else\r | |
123 | #define NEC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
124 | #endif\r | |
fef942f6 | 125 | \r |
126 | #define SAMSUNG_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
127 | #define SAMSUNG_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
128 | #define SAMSUNG_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
129 | #define SAMSUNG_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
5b437ff6 | 130 | #define SAMSUNG_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
131 | #define SAMSUNG_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
132 | #define SAMSUNG_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
133 | #define SAMSUNG_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
134 | #define SAMSUNG_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
135 | #define SAMSUNG_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SAMSUNG_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
fef942f6 | 136 | \r |
137 | #define MATSUSHITA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
138 | #define MATSUSHITA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
139 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
140 | #define MATSUSHITA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
141 | #define MATSUSHITA_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
142 | #define MATSUSHITA_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
143 | #define MATSUSHITA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
144 | #define MATSUSHITA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
145 | #define MATSUSHITA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
146 | #define MATSUSHITA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * MATSUSHITA_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
147 | \r | |
148 | #define KASEIKYO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
149 | #define KASEIKYO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
150 | #define KASEIKYO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
151 | #define KASEIKYO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
152 | #define KASEIKYO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r | |
770a1a9d | 153 | #define KASEIKYO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r |
154 | #define KASEIKYO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
155 | #define KASEIKYO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
fef942f6 | 156 | #define KASEIKYO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MIN_TOLERANCE_50 + 0.5) - 1)\r |
157 | #define KASEIKYO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KASEIKYO_0_PAUSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
158 | \r | |
e664a9f3 | 159 | #define RECS80_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
160 | #define RECS80_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 161 | #define RECS80_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
162 | #define RECS80_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
e664a9f3 | 163 | #define RECS80_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
164 | #define RECS80_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 165 | #define RECS80_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
166 | #define RECS80_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
167 | #define RECS80_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
168 | #define RECS80_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
169 | \r | |
3a7e26e1 | 170 | \r |
171 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1 // BOSE conflicts with RC5, so keep tolerance for RC5 minimal here:\r | |
172 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
173 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_05 + 0.5) + 1)\r | |
174 | #else\r | |
02dbaeff | 175 | #define RC5_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
176 | #define RC5_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
3a7e26e1 | 177 | #endif\r |
31c1f035 | 178 | \r |
02dbaeff | 179 | #define RC5_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
180 | #define RC5_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC5_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
fef942f6 | 181 | \r |
b5ea7869 | 182 | #define DENON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
08f2dd9d | 183 | #define DENON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r |
b5ea7869 | 184 | #define DENON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
185 | #define DENON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
08f2dd9d | 186 | // RUWIDO (see t-home-mediareceiver-15kHz.txt) conflicts here with DENON\r |
187 | #define DENON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
b5ea7869 | 188 | #define DENON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * DENON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
08f2dd9d | 189 | #define DENON_AUTO_REPETITION_PAUSE_LEN ((uint16_t)(F_INTERRUPTS * DENON_AUTO_REPETITION_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r |
fef942f6 | 190 | \r |
beda975f | 191 | #define THOMSON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
192 | #define THOMSON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
193 | #define THOMSON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
194 | #define THOMSON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
195 | #define THOMSON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
196 | #define THOMSON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * THOMSON_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
197 | \r | |
fef942f6 | 198 | #define RC6_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
199 | #define RC6_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
200 | #define RC6_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
201 | #define RC6_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
202 | #define RC6_TOGGLE_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
203 | #define RC6_TOGGLE_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_TOGGLE_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
c7a47e89 | 204 | #define RC6_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
31c1f035 | 205 | #define RC6_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_60 + 0.5) + 1) // pulses: 300 - 800\r |
206 | #define RC6_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
207 | #define RC6_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RC6_BIT_TIME * MAX_TOLERANCE_20 + 0.5) + 1) // pauses: 300 - 600\r | |
1aee56bc | 208 | \r |
e664a9f3 | 209 | #define RECS80EXT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
210 | #define RECS80EXT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
211 | #define RECS80EXT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
212 | #define RECS80EXT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
213 | #define RECS80EXT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
214 | #define RECS80EXT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
fef942f6 | 215 | #define RECS80EXT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
216 | #define RECS80EXT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
217 | #define RECS80EXT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
218 | #define RECS80EXT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RECS80EXT_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
219 | \r | |
220 | #define NUBERT_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
221 | #define NUBERT_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
222 | #define NUBERT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
223 | #define NUBERT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
224 | #define NUBERT_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
225 | #define NUBERT_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
226 | #define NUBERT_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
227 | #define NUBERT_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
228 | #define NUBERT_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
229 | #define NUBERT_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
230 | #define NUBERT_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
231 | #define NUBERT_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NUBERT_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
232 | \r | |
b5ea7869 | 233 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
234 | #define BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
235 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
236 | #define BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
237 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
238 | #define BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
239 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
240 | #define BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT2_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
241 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
242 | #define BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
243 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
2eab5ec9 | 244 | #define BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX ((PAUSE_LEN)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT3_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5) + 1) // value must be below IRMP_TIMEOUT\r |
b5ea7869 | 245 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
246 | #define BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
247 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
248 | #define BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_START_BIT4_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
249 | #define BANG_OLUFSEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
250 | #define BANG_OLUFSEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
251 | #define BANG_OLUFSEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
252 | #define BANG_OLUFSEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
253 | #define BANG_OLUFSEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
254 | #define BANG_OLUFSEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
255 | #define BANG_OLUFSEN_R_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
256 | #define BANG_OLUFSEN_R_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_R_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
257 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
258 | #define BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BANG_OLUFSEN_TRAILER_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
504d9df9 | 259 | \r |
89e8cafb | 260 | #define IR60_TIMEOUT_LEN ((uint8_t)(F_INTERRUPTS * IR60_TIMEOUT_TIME * 0.5))\r |
f60c4644 | 261 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
262 | #define GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
263 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
264 | #define GRUNDIG_NOKIA_IR60_BIT_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
89e8cafb | 265 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) + 1)\r |
266 | #define GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * GRUNDIG_NOKIA_IR60_PRE_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
267 | \r | |
268 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
269 | #define SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
270 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
271 | #define SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
89e8cafb | 272 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
273 | #define SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
274 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
275 | #define SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * SIEMENS_OR_RUWIDO_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
592411d1 | 276 | \r |
a42d1ee6 | 277 | #define FDC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1) // 5%: avoid conflict with NETBOX\r |
278 | #define FDC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PULSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
279 | #define FDC_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MIN_TOLERANCE_05 + 0.5) - 1)\r | |
280 | #define FDC_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_START_BIT_PAUSE_TIME * MAX_TOLERANCE_05 + 0.5))\r | |
6f750020 | 281 | #define FDC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
282 | #define FDC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_PULSE_TIME * MAX_TOLERANCE_50 + 0.5) + 1)\r | |
283 | #define FDC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
284 | #define FDC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
285 | #if 0\r | |
286 | #define FDC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1) // could be negative: 255\r | |
287 | #else\r | |
288 | #define FDC_0_PAUSE_LEN_MIN (1) // simply use 1\r | |
289 | #endif\r | |
290 | #define FDC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * FDC_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
b5ea7869 | 291 | \r |
9e16d699 | 292 | #define RCCAR_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
293 | #define RCCAR_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
294 | #define RCCAR_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
295 | #define RCCAR_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
48664931 | 296 | #define RCCAR_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
297 | #define RCCAR_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
298 | #define RCCAR_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
299 | #define RCCAR_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
300 | #define RCCAR_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
301 | #define RCCAR_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * RCCAR_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
9e16d699 | 302 | \r |
770a1a9d | 303 | #define JVC_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
304 | #define JVC_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
305 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MIN_TOLERANCE_40 + 0.5) - 1) // HACK!\r | |
9405f84a | 306 | #define JVC_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (JVC_FRAME_REPEAT_PAUSE_TIME - IRMP_TIMEOUT_TIME) * MAX_TOLERANCE_70 + 0.5) - 1) // HACK!\r |
770a1a9d | 307 | #define JVC_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
308 | #define JVC_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
309 | #define JVC_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
310 | #define JVC_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
311 | #define JVC_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
312 | #define JVC_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * JVC_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
313 | // autodetect JVC repetition frame within 50 msec:\r | |
314 | #define JVC_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * JVC_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
315 | \r | |
9405f84a | 316 | #define NIKON_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r |
317 | #define NIKON_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_START_BIT_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
318 | #define NIKON_START_BIT_PAUSE_LEN_MIN ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
319 | #define NIKON_START_BIT_PAUSE_LEN_MAX ((uint16_t)(F_INTERRUPTS * NIKON_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
320 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
321 | #define NIKON_REPEAT_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_REPEAT_START_BIT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
322 | #define NIKON_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
323 | #define NIKON_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
324 | #define NIKON_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
325 | #define NIKON_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
326 | #define NIKON_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
327 | #define NIKON_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NIKON_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
328 | #define NIKON_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * NIKON_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
329 | \r | |
111d6191 | 330 | #define KATHREIN_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
331 | #define KATHREIN_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
332 | #define KATHREIN_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
333 | #define KATHREIN_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
334 | #define KATHREIN_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
335 | #define KATHREIN_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
336 | #define KATHREIN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
337 | #define KATHREIN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_1_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
338 | #define KATHREIN_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
339 | #define KATHREIN_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
340 | #define KATHREIN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
341 | #define KATHREIN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_0_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
342 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
343 | #define KATHREIN_SYNC_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * KATHREIN_SYNC_BIT_PAUSE_LEN_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
344 | \r | |
deba2a0a | 345 | #define NETBOX_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
346 | #define NETBOX_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
347 | #define NETBOX_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
348 | #define NETBOX_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * NETBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
349 | #define NETBOX_PULSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME))\r | |
350 | #define NETBOX_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME))\r | |
351 | #define NETBOX_PULSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PULSE_TIME / 4))\r | |
352 | #define NETBOX_PAUSE_REST_LEN ((uint8_t)(F_INTERRUPTS * NETBOX_PAUSE_TIME / 4))\r | |
353 | \r | |
f50e01e7 | 354 | #define LEGO_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r |
355 | #define LEGO_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
356 | #define LEGO_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
357 | #define LEGO_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_START_BIT_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
358 | #define LEGO_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
359 | #define LEGO_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_PULSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
360 | #define LEGO_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
361 | #define LEGO_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_1_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
362 | #define LEGO_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MIN_TOLERANCE_40 + 0.5) - 1)\r | |
363 | #define LEGO_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * LEGO_0_PAUSE_TIME * MAX_TOLERANCE_40 + 0.5) + 1)\r | |
364 | \r | |
3a7e26e1 | 365 | #define BOSE_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r |
366 | #define BOSE_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
367 | #define BOSE_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
368 | #define BOSE_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_START_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
369 | #define BOSE_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
370 | #define BOSE_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
371 | #define BOSE_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
372 | #define BOSE_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
373 | #define BOSE_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
374 | #define BOSE_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * BOSE_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
375 | #define BOSE_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * 100.0e-3 * MAX_TOLERANCE_20 + 0.5)\r | |
376 | \r | |
2fb27bfe | 377 | #define A1TVBOX_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
378 | #define A1TVBOX_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
379 | #define A1TVBOX_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
380 | #define A1TVBOX_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
381 | #define A1TVBOX_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
382 | #define A1TVBOX_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
383 | #define A1TVBOX_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
384 | #define A1TVBOX_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * A1TVBOX_BIT_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
385 | \r | |
b85cb27d | 386 | #define ORTEK_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
387 | #define ORTEK_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
388 | #define ORTEK_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
389 | #define ORTEK_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
40ca4604 | 390 | #define ORTEK_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
391 | #define ORTEK_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
392 | #define ORTEK_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
393 | #define ORTEK_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ORTEK_BIT_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
b85cb27d | 394 | \r |
395 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
396 | #define TELEFUNKEN_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
397 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
398 | #define TELEFUNKEN_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * (TELEFUNKEN_START_BIT_PAUSE_TIME) * MAX_TOLERANCE_10 + 0.5) - 1)\r | |
399 | #define TELEFUNKEN_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
400 | #define TELEFUNKEN_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_PULSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
401 | #define TELEFUNKEN_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
402 | #define TELEFUNKEN_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_1_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
403 | #define TELEFUNKEN_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MIN_TOLERANCE_30 + 0.5) - 1)\r | |
404 | #define TELEFUNKEN_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * TELEFUNKEN_0_PAUSE_TIME * MAX_TOLERANCE_30 + 0.5) + 1)\r | |
405 | // autodetect TELEFUNKEN repetition frame within 50 msec:\r | |
406 | // #define TELEFUNKEN_FRAME_REPEAT_PAUSE_LEN_MAX (uint16_t)(F_INTERRUPTS * TELEFUNKEN_FRAME_REPEAT_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5)\r | |
407 | \r | |
40ca4604 | 408 | #define ROOMBA_START_BIT_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r |
409 | #define ROOMBA_START_BIT_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PULSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
410 | #define ROOMBA_START_BIT_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MIN_TOLERANCE_10 + 0.5) - 1)\r | |
411 | #define ROOMBA_START_BIT_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_START_BIT_PAUSE_TIME * MAX_TOLERANCE_10 + 0.5) + 1)\r | |
412 | #define ROOMBA_1_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME))\r | |
413 | #define ROOMBA_1_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
414 | #define ROOMBA_1_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
415 | #define ROOMBA_1_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
416 | #define ROOMBA_1_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_1_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
417 | #define ROOMBA_0_PAUSE_LEN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME))\r | |
418 | #define ROOMBA_0_PULSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
419 | #define ROOMBA_0_PULSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PULSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
420 | #define ROOMBA_0_PAUSE_LEN_MIN ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MIN_TOLERANCE_20 + 0.5) - 1)\r | |
421 | #define ROOMBA_0_PAUSE_LEN_MAX ((uint8_t)(F_INTERRUPTS * ROOMBA_0_PAUSE_TIME * MAX_TOLERANCE_20 + 0.5) + 1)\r | |
422 | \r | |
d155e9ab | 423 | #define AUTO_FRAME_REPETITION_LEN (uint16_t)(F_INTERRUPTS * AUTO_FRAME_REPETITION_TIME + 0.5) // use uint16_t!\r |
4225a882 | 424 | \r |
48664931 | 425 | #ifdef ANALYZE\r |
08f2dd9d | 426 | # define ANALYZE_PUTCHAR(a) { if (! silent) { putchar (a); } }\r |
427 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a) { if (! silent && !verbose) { putchar (a); } }\r | |
428 | # define ANALYZE_PRINTF(...) { if (verbose) { printf (__VA_ARGS__); } }\r | |
775fabfa | 429 | # define ANALYZE_ONLY_NORMAL_PRINTF(...) { if (! silent && !verbose) { printf (__VA_ARGS__); } }\r |
08f2dd9d | 430 | # define ANALYZE_NEWLINE() { if (verbose) { putchar ('\n'); } }\r |
7644ac04 | 431 | static int silent;\r |
432 | static int time_counter;\r | |
433 | static int verbose;\r | |
4225a882 | 434 | #else\r |
08f2dd9d | 435 | # define ANALYZE_PUTCHAR(a)\r |
436 | # define ANALYZE_ONLY_NORMAL_PUTCHAR(a)\r | |
437 | # define ANALYZE_PRINTF(...)\r | |
775fabfa | 438 | # define ANALYZE_ONLY_NORMAL_PRINTF(...)\r |
08f2dd9d | 439 | # define ANALYZE_NEWLINE()\r |
4225a882 | 440 | #endif\r |
441 | \r | |
7644ac04 | 442 | #if IRMP_USE_CALLBACK == 1\r |
443 | static void (*irmp_callback_ptr) (uint8_t);\r | |
444 | #endif // IRMP_USE_CALLBACK == 1\r | |
445 | \r | |
40ca4604 | 446 | #define PARITY_CHECK_OK 1\r |
447 | #define PARITY_CHECK_FAILED 0\r | |
448 | \r | |
1f54e86c | 449 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
450 | * Protocol names\r | |
451 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
452 | */\r | |
775fabfa | 453 | #if defined(UNIX_OR_WINDOWS) || IRMP_PROTOCOL_NAMES == 1\r |
1f54e86c | 454 | char *\r |
455 | irmp_protocol_names[IRMP_N_PROTOCOLS + 1] =\r | |
456 | {\r | |
457 | "UNKNOWN",\r | |
458 | "SIRCS",\r | |
459 | "NEC",\r | |
460 | "SAMSUNG",\r | |
461 | "MATSUSH",\r | |
462 | "KASEIKYO",\r | |
463 | "RECS80",\r | |
464 | "RC5",\r | |
465 | "DENON",\r | |
466 | "RC6",\r | |
467 | "SAMSG32",\r | |
468 | "APPLE",\r | |
469 | "RECS80EX",\r | |
470 | "NUBERT",\r | |
471 | "BANG OLU",\r | |
472 | "GRUNDIG",\r | |
473 | "NOKIA",\r | |
474 | "SIEMENS",\r | |
475 | "FDC",\r | |
476 | "RCCAR",\r | |
477 | "JVC",\r | |
478 | "RC6A",\r | |
479 | "NIKON",\r | |
480 | "RUWIDO",\r | |
481 | "IR60",\r | |
482 | "KATHREIN",\r | |
483 | "NETBOX",\r | |
484 | "NEC16",\r | |
485 | "NEC42",\r | |
486 | "LEGO",\r | |
3a7e26e1 | 487 | "THOMSON",\r |
2fb27bfe | 488 | "BOSE",\r |
489 | "A1TVBOX",\r | |
b85cb27d | 490 | "ORTEK",\r |
40ca4604 | 491 | "TELEFUNKEN",\r |
492 | "ROOMBA"\r | |
1f54e86c | 493 | };\r |
40ca4604 | 494 | \r |
1f54e86c | 495 | #endif\r |
496 | \r | |
497 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
498 | * Logging\r | |
499 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
500 | */\r | |
6c3c57e6 | 501 | #if IRMP_LOGGING == 1 // logging via UART\r |
502 | \r | |
503 | #if IRMP_EXT_LOGGING == 1 // use external logging\r | |
504 | #include "irmpextlog.h"\r | |
505 | #else // normal UART log (IRMP_EXT_LOGGING == 0)\r | |
879b06c2 | 506 | #define BAUD 9600L\r |
775fabfa | 507 | #ifndef UNIX_OR_WINDOWS\r |
879b06c2 | 508 | #include <util/setbaud.h>\r |
775fabfa | 509 | #endif\r |
879b06c2 | 510 | \r |
511 | #ifdef UBRR0H\r | |
512 | \r | |
513 | #define UART0_UBRRH UBRR0H\r | |
514 | #define UART0_UBRRL UBRR0L\r | |
515 | #define UART0_UCSRA UCSR0A\r | |
516 | #define UART0_UCSRB UCSR0B\r | |
517 | #define UART0_UCSRC UCSR0C\r | |
518 | #define UART0_UDRE_BIT_VALUE (1<<UDRE0)\r | |
519 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ01)\r | |
520 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ00)\r | |
521 | #ifdef URSEL0\r | |
522 | #define UART0_URSEL_BIT_VALUE (1<<URSEL0)\r | |
523 | #else\r | |
524 | #define UART0_URSEL_BIT_VALUE (0)\r | |
525 | #endif\r | |
526 | #define UART0_TXEN_BIT_VALUE (1<<TXEN0)\r | |
e92413eb | 527 | #define UART0_UDR UDR0\r |
c7a47e89 | 528 | #define UART0_U2X U2X0\r |
cea96148 | 529 | \r |
879b06c2 | 530 | #else\r |
4225a882 | 531 | \r |
879b06c2 | 532 | #define UART0_UBRRH UBRRH\r |
533 | #define UART0_UBRRL UBRRL\r | |
534 | #define UART0_UCSRA UCSRA\r | |
535 | #define UART0_UCSRB UCSRB\r | |
536 | #define UART0_UCSRC UCSRC\r | |
537 | #define UART0_UDRE_BIT_VALUE (1<<UDRE)\r | |
538 | #define UART0_UCSZ1_BIT_VALUE (1<<UCSZ1)\r | |
539 | #define UART0_UCSZ0_BIT_VALUE (1<<UCSZ0)\r | |
540 | #ifdef URSEL\r | |
541 | #define UART0_URSEL_BIT_VALUE (1<<URSEL)\r | |
542 | #else\r | |
543 | #define UART0_URSEL_BIT_VALUE (0)\r | |
544 | #endif\r | |
545 | #define UART0_TXEN_BIT_VALUE (1<<TXEN)\r | |
e92413eb | 546 | #define UART0_UDR UDR\r |
c7a47e89 | 547 | #define UART0_U2X U2X\r |
4225a882 | 548 | \r |
6c3c57e6 | 549 | #endif //UBRR0H\r |
550 | #endif //IRMP_EXT_LOGGING\r | |
4225a882 | 551 | \r |
4225a882 | 552 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
553 | * Initialize UART\r | |
554 | * @details Initializes UART\r | |
555 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
556 | */\r | |
557 | void\r | |
558 | irmp_uart_init (void)\r | |
559 | {\r | |
775fabfa | 560 | #ifndef UNIX_OR_WINDOWS\r |
6c3c57e6 | 561 | #if (IRMP_EXT_LOGGING == 0) // use UART\r |
879b06c2 | 562 | UART0_UBRRH = UBRRH_VALUE; // set baud rate\r |
563 | UART0_UBRRL = UBRRL_VALUE;\r | |
564 | \r | |
565 | #if USE_2X\r | |
c7a47e89 | 566 | UART0_UCSRA |= (1<<UART0_U2X);\r |
879b06c2 | 567 | #else\r |
c7a47e89 | 568 | UART0_UCSRA &= ~(1<<UART0_U2X);\r |
879b06c2 | 569 | #endif\r |
570 | \r | |
571 | UART0_UCSRC = UART0_UCSZ1_BIT_VALUE | UART0_UCSZ0_BIT_VALUE | UART0_URSEL_BIT_VALUE;\r | |
572 | UART0_UCSRB |= UART0_TXEN_BIT_VALUE; // enable UART TX\r | |
6c3c57e6 | 573 | #else // other log method\r |
cea96148 | 574 | initextlog(); \r |
6c3c57e6 | 575 | #endif //IRMP_EXT_LOGGING\r |
775fabfa | 576 | #endif // UNIX_OR_WINDOWS\r |
4225a882 | 577 | }\r |
578 | \r | |
579 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
580 | * Send character\r | |
581 | * @details Sends character\r | |
582 | * @param ch character to be transmitted\r | |
583 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
584 | */\r | |
585 | void\r | |
586 | irmp_uart_putc (unsigned char ch)\r | |
587 | {\r | |
775fabfa | 588 | #ifndef UNIX_OR_WINDOWS\r |
6c3c57e6 | 589 | #if (IRMP_EXT_LOGGING == 0)\r |
879b06c2 | 590 | while (!(UART0_UCSRA & UART0_UDRE_BIT_VALUE))\r |
4225a882 | 591 | {\r |
592 | ;\r | |
593 | }\r | |
594 | \r | |
879b06c2 | 595 | UART0_UDR = ch;\r |
6c3c57e6 | 596 | #else\r |
597 | sendextlog(ch); //Use external log\r | |
598 | #endif\r | |
775fabfa | 599 | #else\r |
600 | fputc (ch, stderr);\r | |
601 | #endif // UNIX_OR_WINDOWS\r | |
4225a882 | 602 | }\r |
603 | \r | |
604 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
605 | * Log IR signal\r | |
606 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
607 | */\r | |
d155e9ab | 608 | \r |
609 | #define STARTCYCLES 2 // min count of zeros before start of logging\r | |
610 | #define ENDBITS 1000 // number of sequenced highbits to detect end\r | |
611 | #define DATALEN 700 // log buffer size\r | |
4225a882 | 612 | \r |
775fabfa | 613 | #if 0 // old log routine\r |
614 | \r | |
4225a882 | 615 | static void\r |
d155e9ab | 616 | irmp_log (uint8_t val)\r |
4225a882 | 617 | {\r |
d155e9ab | 618 | static uint8_t buf[DATALEN]; // logging buffer\r |
619 | static uint16_t buf_idx; // number of written bits\r | |
620 | static uint8_t startcycles; // current number of start-zeros\r | |
621 | static uint16_t cnt; // counts sequenced highbits - to detect end\r | |
4225a882 | 622 | \r |
d155e9ab | 623 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r |
4225a882 | 624 | {\r |
d155e9ab | 625 | startcycles++;\r |
4225a882 | 626 | }\r |
627 | else\r | |
628 | {\r | |
d155e9ab | 629 | startcycles = 0;\r |
4225a882 | 630 | \r |
d155e9ab | 631 | if (! val || (val && buf_idx != 0)) // start or continue logging on "0", "1" cannot init logging\r |
4225a882 | 632 | {\r |
d155e9ab | 633 | if (buf_idx < DATALEN * 8) // index in range?\r |
634 | { // yes\r | |
635 | if (val)\r | |
636 | {\r | |
637 | buf[(buf_idx / 8)] |= (1<<(buf_idx % 8)); // set bit\r | |
638 | }\r | |
639 | else\r | |
640 | {\r | |
641 | buf[(buf_idx / 8)] &= ~(1<<(buf_idx % 8)); // reset bit\r | |
642 | }\r | |
4225a882 | 643 | \r |
d155e9ab | 644 | buf_idx++;\r |
645 | }\r | |
4225a882 | 646 | \r |
647 | if (val)\r | |
46dd89b7 | 648 | { // if high received then look at log-stop condition\r |
d155e9ab | 649 | cnt++;\r |
4225a882 | 650 | \r |
d155e9ab | 651 | if (cnt > ENDBITS)\r |
652 | { // if stop condition is true, output on uart\r | |
4225a882 | 653 | uint16_t i;\r |
654 | \r | |
d155e9ab | 655 | for (i = 0; i < STARTCYCLES; i++)\r |
4225a882 | 656 | {\r |
46dd89b7 | 657 | irmp_uart_putc ('0'); // the ignored starting zeros\r |
4225a882 | 658 | }\r |
659 | \r | |
d155e9ab | 660 | for (i = 0; i < (buf_idx - ENDBITS + 20) / 8; i++) // transform bitset into uart chars\r |
4225a882 | 661 | {\r |
d155e9ab | 662 | uint8_t d = buf[i];\r |
4225a882 | 663 | uint8_t j;\r |
664 | \r | |
d155e9ab | 665 | for (j = 0; j < 8; j++)\r |
4225a882 | 666 | {\r |
667 | irmp_uart_putc ((d & 1) + '0');\r | |
668 | d >>= 1;\r | |
669 | }\r | |
670 | }\r | |
671 | \r | |
672 | irmp_uart_putc ('\n');\r | |
d155e9ab | 673 | buf_idx = 0;\r |
4225a882 | 674 | }\r |
675 | }\r | |
676 | else\r | |
677 | {\r | |
d155e9ab | 678 | cnt = 0;\r |
4225a882 | 679 | }\r |
680 | }\r | |
681 | }\r | |
682 | }\r | |
683 | \r | |
775fabfa | 684 | #else // new log routine\r |
685 | \r | |
686 | static void\r | |
687 | irmp_log (uint8_t val)\r | |
688 | {\r | |
689 | static uint8_t buf[DATALEN]; // logging buffer\r | |
690 | static uint16_t buf_idx; // index\r | |
691 | static uint8_t startcycles; // current number of start-zeros\r | |
692 | static uint16_t cnt; // counts sequenced highbits - to detect end\r | |
693 | static uint8_t last_val = 1;\r | |
694 | \r | |
695 | if (! val && (startcycles < STARTCYCLES) && !buf_idx) // prevent that single random zeros init logging\r | |
696 | {\r | |
697 | startcycles++;\r | |
698 | }\r | |
699 | else\r | |
700 | {\r | |
701 | startcycles = 0;\r | |
702 | \r | |
703 | if (! val || buf_idx != 0) // start or continue logging on "0", "1" cannot init logging\r | |
704 | {\r | |
705 | if (last_val == val)\r | |
706 | {\r | |
707 | cnt++;\r | |
708 | \r | |
709 | if (val && cnt > ENDBITS) // if high received then look at log-stop condition\r | |
710 | { // if stop condition is true, output on uart\r | |
711 | uint8_t i8;\r | |
712 | uint16_t i;\r | |
713 | uint16_t j;\r | |
714 | uint8_t v = '1';\r | |
715 | uint16_t d;\r | |
716 | \r | |
717 | for (i8 = 0; i8 < STARTCYCLES; i8++)\r | |
718 | {\r | |
719 | irmp_uart_putc ('0'); // the ignored starting zeros\r | |
720 | }\r | |
721 | \r | |
722 | for (i = 0; i < buf_idx; i++)\r | |
723 | {\r | |
724 | d = buf[i];\r | |
725 | \r | |
726 | if (d == 0xff)\r | |
727 | {\r | |
728 | i++;\r | |
729 | d = buf[i];\r | |
730 | i++;\r | |
731 | d |= ((uint16_t) buf[i] << 8);\r | |
732 | }\r | |
733 | \r | |
734 | for (j = 0; j < d; j++)\r | |
735 | {\r | |
736 | irmp_uart_putc (v);\r | |
737 | }\r | |
738 | \r | |
739 | v = (v == '1') ? '0' : '1';\r | |
740 | }\r | |
741 | \r | |
742 | for (i8 = 0; i8 < 20; i8++)\r | |
743 | {\r | |
744 | irmp_uart_putc ('1');\r | |
745 | }\r | |
746 | \r | |
747 | irmp_uart_putc ('\n');\r | |
748 | buf_idx = 0;\r | |
749 | last_val = 1;\r | |
750 | cnt = 0;\r | |
751 | }\r | |
752 | }\r | |
753 | else if (buf_idx < DATALEN - 3)\r | |
754 | {\r | |
755 | if (cnt >= 0xff)\r | |
756 | {\r | |
757 | buf[buf_idx++] = 0xff;\r | |
758 | buf[buf_idx++] = (cnt & 0xff);\r | |
759 | buf[buf_idx] = (cnt >> 8);\r | |
760 | }\r | |
761 | else\r | |
762 | {\r | |
763 | buf[buf_idx] = cnt;\r | |
764 | }\r | |
765 | \r | |
766 | buf_idx++;\r | |
767 | cnt = 1;\r | |
768 | last_val = val;\r | |
769 | }\r | |
770 | }\r | |
771 | }\r | |
772 | }\r | |
773 | \r | |
774 | #endif\r | |
775 | \r | |
4225a882 | 776 | #else\r |
d155e9ab | 777 | #define irmp_log(val)\r |
6c3c57e6 | 778 | #endif //IRMP_LOGGING\r |
4225a882 | 779 | \r |
780 | typedef struct\r | |
781 | {\r | |
782 | uint8_t protocol; // ir protocol\r | |
783 | uint8_t pulse_1_len_min; // minimum length of pulse with bit value 1\r | |
784 | uint8_t pulse_1_len_max; // maximum length of pulse with bit value 1\r | |
785 | uint8_t pause_1_len_min; // minimum length of pause with bit value 1\r | |
786 | uint8_t pause_1_len_max; // maximum length of pause with bit value 1\r | |
787 | uint8_t pulse_0_len_min; // minimum length of pulse with bit value 0\r | |
788 | uint8_t pulse_0_len_max; // maximum length of pulse with bit value 0\r | |
789 | uint8_t pause_0_len_min; // minimum length of pause with bit value 0\r | |
790 | uint8_t pause_0_len_max; // maximum length of pause with bit value 0\r | |
791 | uint8_t address_offset; // address offset\r | |
792 | uint8_t address_end; // end of address\r | |
793 | uint8_t command_offset; // command offset\r | |
794 | uint8_t command_end; // end of command\r | |
795 | uint8_t complete_len; // complete length of frame\r | |
796 | uint8_t stop_bit; // flag: frame has stop bit\r | |
797 | uint8_t lsb_first; // flag: LSB first\r | |
77f488bb | 798 | uint8_t flags; // some flags\r |
4225a882 | 799 | } IRMP_PARAMETER;\r |
800 | \r | |
801 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
802 | \r | |
63b94f48 | 803 | static const PROGMEM IRMP_PARAMETER sircs_param =\r |
4225a882 | 804 | {\r |
d155e9ab | 805 | IRMP_SIRCS_PROTOCOL, // protocol: ir protocol\r |
806 | SIRCS_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
807 | SIRCS_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
808 | SIRCS_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
809 | SIRCS_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
810 | SIRCS_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
811 | SIRCS_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
812 | SIRCS_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
813 | SIRCS_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
814 | SIRCS_ADDRESS_OFFSET, // address_offset: address offset\r | |
815 | SIRCS_ADDRESS_OFFSET + SIRCS_ADDRESS_LEN, // address_end: end of address\r | |
816 | SIRCS_COMMAND_OFFSET, // command_offset: command offset\r | |
817 | SIRCS_COMMAND_OFFSET + SIRCS_COMMAND_LEN, // command_end: end of command\r | |
818 | SIRCS_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
819 | SIRCS_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 820 | SIRCS_LSB, // lsb_first: flag: LSB first\r |
821 | SIRCS_FLAGS // flags: some flags\r | |
4225a882 | 822 | };\r |
823 | \r | |
824 | #endif\r | |
825 | \r | |
826 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
827 | \r | |
63b94f48 | 828 | static const PROGMEM IRMP_PARAMETER nec_param =\r |
4225a882 | 829 | {\r |
d155e9ab | 830 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
831 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
832 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
833 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
834 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
835 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
836 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
837 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
838 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
839 | NEC_ADDRESS_OFFSET, // address_offset: address offset\r | |
840 | NEC_ADDRESS_OFFSET + NEC_ADDRESS_LEN, // address_end: end of address\r | |
841 | NEC_COMMAND_OFFSET, // command_offset: command offset\r | |
842 | NEC_COMMAND_OFFSET + NEC_COMMAND_LEN, // command_end: end of command\r | |
843 | NEC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
844 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 845 | NEC_LSB, // lsb_first: flag: LSB first\r |
846 | NEC_FLAGS // flags: some flags\r | |
4225a882 | 847 | };\r |
848 | \r | |
63b94f48 | 849 | static const PROGMEM IRMP_PARAMETER nec_rep_param =\r |
46dd89b7 | 850 | {\r |
d155e9ab | 851 | IRMP_NEC_PROTOCOL, // protocol: ir protocol\r |
852 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
853 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
854 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
855 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
856 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
857 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
858 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
859 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
860 | 0, // address_offset: address offset\r | |
861 | 0, // address_end: end of address\r | |
862 | 0, // command_offset: command offset\r | |
863 | 0, // command_end: end of command\r | |
864 | 0, // complete_len: complete length of frame\r | |
865 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 866 | NEC_LSB, // lsb_first: flag: LSB first\r |
867 | NEC_FLAGS // flags: some flags\r | |
46dd89b7 | 868 | };\r |
869 | \r | |
4225a882 | 870 | #endif\r |
871 | \r | |
35213800 | 872 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
fc80d688 | 873 | \r |
63b94f48 | 874 | static const PROGMEM IRMP_PARAMETER nec42_param =\r |
fc80d688 | 875 | {\r |
35213800 | 876 | IRMP_NEC42_PROTOCOL, // protocol: ir protocol\r |
fc80d688 | 877 | NEC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r |
878 | NEC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
879 | NEC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
880 | NEC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
881 | NEC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
882 | NEC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
883 | NEC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
884 | NEC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
35213800 | 885 | NEC42_ADDRESS_OFFSET, // address_offset: address offset\r |
7644ac04 | 886 | NEC42_ADDRESS_OFFSET + NEC42_ADDRESS_LEN, // address_end: end of address\r |
35213800 | 887 | NEC42_COMMAND_OFFSET, // command_offset: command offset\r |
7644ac04 | 888 | NEC42_COMMAND_OFFSET + NEC42_COMMAND_LEN, // command_end: end of command\r |
35213800 | 889 | NEC42_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r |
890 | NEC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
891 | NEC_LSB, // lsb_first: flag: LSB first\r | |
892 | NEC_FLAGS // flags: some flags\r | |
fc80d688 | 893 | };\r |
894 | \r | |
895 | #endif\r | |
896 | \r | |
4225a882 | 897 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
898 | \r | |
63b94f48 | 899 | static const PROGMEM IRMP_PARAMETER samsung_param =\r |
4225a882 | 900 | {\r |
d155e9ab | 901 | IRMP_SAMSUNG_PROTOCOL, // protocol: ir protocol\r |
902 | SAMSUNG_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
903 | SAMSUNG_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
904 | SAMSUNG_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
905 | SAMSUNG_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
906 | SAMSUNG_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
907 | SAMSUNG_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
908 | SAMSUNG_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
909 | SAMSUNG_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
910 | SAMSUNG_ADDRESS_OFFSET, // address_offset: address offset\r | |
911 | SAMSUNG_ADDRESS_OFFSET + SAMSUNG_ADDRESS_LEN, // address_end: end of address\r | |
912 | SAMSUNG_COMMAND_OFFSET, // command_offset: command offset\r | |
913 | SAMSUNG_COMMAND_OFFSET + SAMSUNG_COMMAND_LEN, // command_end: end of command\r | |
914 | SAMSUNG_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
915 | SAMSUNG_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 916 | SAMSUNG_LSB, // lsb_first: flag: LSB first\r |
917 | SAMSUNG_FLAGS // flags: some flags\r | |
4225a882 | 918 | };\r |
919 | \r | |
920 | #endif\r | |
921 | \r | |
b85cb27d | 922 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
923 | \r | |
924 | static const PROGMEM IRMP_PARAMETER telefunken_param =\r | |
925 | {\r | |
926 | IRMP_TELEFUNKEN_PROTOCOL, // protocol: ir protocol\r | |
927 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
928 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
929 | TELEFUNKEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
930 | TELEFUNKEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
931 | TELEFUNKEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
932 | TELEFUNKEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
933 | TELEFUNKEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
934 | TELEFUNKEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
935 | TELEFUNKEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
936 | TELEFUNKEN_ADDRESS_OFFSET + TELEFUNKEN_ADDRESS_LEN, // address_end: end of address\r | |
937 | TELEFUNKEN_COMMAND_OFFSET, // command_offset: command offset\r | |
938 | TELEFUNKEN_COMMAND_OFFSET + TELEFUNKEN_COMMAND_LEN, // command_end: end of command\r | |
939 | TELEFUNKEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
940 | TELEFUNKEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
941 | TELEFUNKEN_LSB, // lsb_first: flag: LSB first\r | |
942 | TELEFUNKEN_FLAGS // flags: some flags\r | |
943 | };\r | |
944 | \r | |
945 | #endif\r | |
946 | \r | |
4225a882 | 947 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r |
948 | \r | |
63b94f48 | 949 | static const PROGMEM IRMP_PARAMETER matsushita_param =\r |
4225a882 | 950 | {\r |
d155e9ab | 951 | IRMP_MATSUSHITA_PROTOCOL, // protocol: ir protocol\r |
952 | MATSUSHITA_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
953 | MATSUSHITA_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
954 | MATSUSHITA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
955 | MATSUSHITA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
956 | MATSUSHITA_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
957 | MATSUSHITA_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
958 | MATSUSHITA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
959 | MATSUSHITA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
960 | MATSUSHITA_ADDRESS_OFFSET, // address_offset: address offset\r | |
961 | MATSUSHITA_ADDRESS_OFFSET + MATSUSHITA_ADDRESS_LEN, // address_end: end of address\r | |
962 | MATSUSHITA_COMMAND_OFFSET, // command_offset: command offset\r | |
963 | MATSUSHITA_COMMAND_OFFSET + MATSUSHITA_COMMAND_LEN, // command_end: end of command\r | |
964 | MATSUSHITA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
965 | MATSUSHITA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 966 | MATSUSHITA_LSB, // lsb_first: flag: LSB first\r |
967 | MATSUSHITA_FLAGS // flags: some flags\r | |
4225a882 | 968 | };\r |
969 | \r | |
970 | #endif\r | |
971 | \r | |
972 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
973 | \r | |
63b94f48 | 974 | static const PROGMEM IRMP_PARAMETER kaseikyo_param =\r |
4225a882 | 975 | {\r |
d155e9ab | 976 | IRMP_KASEIKYO_PROTOCOL, // protocol: ir protocol\r |
977 | KASEIKYO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
978 | KASEIKYO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
979 | KASEIKYO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
980 | KASEIKYO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
981 | KASEIKYO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
982 | KASEIKYO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
983 | KASEIKYO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
984 | KASEIKYO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
985 | KASEIKYO_ADDRESS_OFFSET, // address_offset: address offset\r | |
986 | KASEIKYO_ADDRESS_OFFSET + KASEIKYO_ADDRESS_LEN, // address_end: end of address\r | |
987 | KASEIKYO_COMMAND_OFFSET, // command_offset: command offset\r | |
988 | KASEIKYO_COMMAND_OFFSET + KASEIKYO_COMMAND_LEN, // command_end: end of command\r | |
989 | KASEIKYO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
990 | KASEIKYO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 991 | KASEIKYO_LSB, // lsb_first: flag: LSB first\r |
992 | KASEIKYO_FLAGS // flags: some flags\r | |
4225a882 | 993 | };\r |
994 | \r | |
995 | #endif\r | |
996 | \r | |
997 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
998 | \r | |
63b94f48 | 999 | static const PROGMEM IRMP_PARAMETER recs80_param =\r |
4225a882 | 1000 | {\r |
d155e9ab | 1001 | IRMP_RECS80_PROTOCOL, // protocol: ir protocol\r |
1002 | RECS80_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1003 | RECS80_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1004 | RECS80_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1005 | RECS80_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1006 | RECS80_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1007 | RECS80_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1008 | RECS80_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1009 | RECS80_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1010 | RECS80_ADDRESS_OFFSET, // address_offset: address offset\r | |
1011 | RECS80_ADDRESS_OFFSET + RECS80_ADDRESS_LEN, // address_end: end of address\r | |
1012 | RECS80_COMMAND_OFFSET, // command_offset: command offset\r | |
1013 | RECS80_COMMAND_OFFSET + RECS80_COMMAND_LEN, // command_end: end of command\r | |
1014 | RECS80_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1015 | RECS80_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1016 | RECS80_LSB, // lsb_first: flag: LSB first\r |
1017 | RECS80_FLAGS // flags: some flags\r | |
4225a882 | 1018 | };\r |
1019 | \r | |
1020 | #endif\r | |
1021 | \r | |
1022 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
1023 | \r | |
63b94f48 | 1024 | static const PROGMEM IRMP_PARAMETER rc5_param =\r |
4225a882 | 1025 | {\r |
d155e9ab | 1026 | IRMP_RC5_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1027 | RC5_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1028 | RC5_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1029 | RC5_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1030 | RC5_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1031 | 0, // pulse_0_len_min: here: not used\r |
1032 | 0, // pulse_0_len_max: here: not used\r | |
1033 | 0, // pause_0_len_min: here: not used\r | |
1034 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1035 | RC5_ADDRESS_OFFSET, // address_offset: address offset\r |
1036 | RC5_ADDRESS_OFFSET + RC5_ADDRESS_LEN, // address_end: end of address\r | |
1037 | RC5_COMMAND_OFFSET, // command_offset: command offset\r | |
1038 | RC5_COMMAND_OFFSET + RC5_COMMAND_LEN, // command_end: end of command\r | |
1039 | RC5_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1040 | RC5_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1041 | RC5_LSB, // lsb_first: flag: LSB first\r |
1042 | RC5_FLAGS // flags: some flags\r | |
4225a882 | 1043 | };\r |
1044 | \r | |
1045 | #endif\r | |
1046 | \r | |
1047 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
1048 | \r | |
63b94f48 | 1049 | static const PROGMEM IRMP_PARAMETER denon_param =\r |
4225a882 | 1050 | {\r |
d155e9ab | 1051 | IRMP_DENON_PROTOCOL, // protocol: ir protocol\r |
1052 | DENON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1053 | DENON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1054 | DENON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1055 | DENON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1056 | DENON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1057 | DENON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1058 | DENON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1059 | DENON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1060 | DENON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1061 | DENON_ADDRESS_OFFSET + DENON_ADDRESS_LEN, // address_end: end of address\r | |
1062 | DENON_COMMAND_OFFSET, // command_offset: command offset\r | |
1063 | DENON_COMMAND_OFFSET + DENON_COMMAND_LEN, // command_end: end of command\r | |
1064 | DENON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1065 | DENON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1066 | DENON_LSB, // lsb_first: flag: LSB first\r |
1067 | DENON_FLAGS // flags: some flags\r | |
4225a882 | 1068 | };\r |
1069 | \r | |
1070 | #endif\r | |
1071 | \r | |
1072 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
1073 | \r | |
63b94f48 | 1074 | static const PROGMEM IRMP_PARAMETER rc6_param =\r |
4225a882 | 1075 | {\r |
d155e9ab | 1076 | IRMP_RC6_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1077 | \r |
1078 | RC6_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1079 | RC6_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1080 | RC6_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1081 | RC6_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1082 | 0, // pulse_0_len_min: here: not used\r |
1083 | 0, // pulse_0_len_max: here: not used\r | |
1084 | 0, // pause_0_len_min: here: not used\r | |
1085 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1086 | RC6_ADDRESS_OFFSET, // address_offset: address offset\r |
1087 | RC6_ADDRESS_OFFSET + RC6_ADDRESS_LEN, // address_end: end of address\r | |
1088 | RC6_COMMAND_OFFSET, // command_offset: command offset\r | |
1089 | RC6_COMMAND_OFFSET + RC6_COMMAND_LEN, // command_end: end of command\r | |
1090 | RC6_COMPLETE_DATA_LEN_SHORT, // complete_len: complete length of frame\r | |
1091 | RC6_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1092 | RC6_LSB, // lsb_first: flag: LSB first\r |
1093 | RC6_FLAGS // flags: some flags\r | |
4225a882 | 1094 | };\r |
1095 | \r | |
1096 | #endif\r | |
1097 | \r | |
1098 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
1099 | \r | |
63b94f48 | 1100 | static const PROGMEM IRMP_PARAMETER recs80ext_param =\r |
4225a882 | 1101 | {\r |
d155e9ab | 1102 | IRMP_RECS80EXT_PROTOCOL, // protocol: ir protocol\r |
1103 | RECS80EXT_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1104 | RECS80EXT_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1105 | RECS80EXT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1106 | RECS80EXT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1107 | RECS80EXT_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1108 | RECS80EXT_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1109 | RECS80EXT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1110 | RECS80EXT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1111 | RECS80EXT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1112 | RECS80EXT_ADDRESS_OFFSET + RECS80EXT_ADDRESS_LEN, // address_end: end of address\r | |
1113 | RECS80EXT_COMMAND_OFFSET, // command_offset: command offset\r | |
1114 | RECS80EXT_COMMAND_OFFSET + RECS80EXT_COMMAND_LEN, // command_end: end of command\r | |
1115 | RECS80EXT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1116 | RECS80EXT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1117 | RECS80EXT_LSB, // lsb_first: flag: LSB first\r |
1118 | RECS80EXT_FLAGS // flags: some flags\r | |
4225a882 | 1119 | };\r |
1120 | \r | |
1121 | #endif\r | |
1122 | \r | |
504d9df9 | 1123 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r |
4225a882 | 1124 | \r |
63b94f48 | 1125 | static const PROGMEM IRMP_PARAMETER nubert_param =\r |
4225a882 | 1126 | {\r |
d155e9ab | 1127 | IRMP_NUBERT_PROTOCOL, // protocol: ir protocol\r |
1128 | NUBERT_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1129 | NUBERT_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1130 | NUBERT_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1131 | NUBERT_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1132 | NUBERT_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1133 | NUBERT_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1134 | NUBERT_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1135 | NUBERT_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1136 | NUBERT_ADDRESS_OFFSET, // address_offset: address offset\r | |
1137 | NUBERT_ADDRESS_OFFSET + NUBERT_ADDRESS_LEN, // address_end: end of address\r | |
1138 | NUBERT_COMMAND_OFFSET, // command_offset: command offset\r | |
1139 | NUBERT_COMMAND_OFFSET + NUBERT_COMMAND_LEN, // command_end: end of command\r | |
1140 | NUBERT_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1141 | NUBERT_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1142 | NUBERT_LSB, // lsb_first: flag: LSB first\r |
1143 | NUBERT_FLAGS // flags: some flags\r | |
4225a882 | 1144 | };\r |
1145 | \r | |
1146 | #endif\r | |
1147 | \r | |
504d9df9 | 1148 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
1149 | \r | |
63b94f48 | 1150 | static const PROGMEM IRMP_PARAMETER bang_olufsen_param =\r |
504d9df9 | 1151 | {\r |
d155e9ab | 1152 | IRMP_BANG_OLUFSEN_PROTOCOL, // protocol: ir protocol\r |
1153 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1154 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1155 | BANG_OLUFSEN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1156 | BANG_OLUFSEN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1157 | BANG_OLUFSEN_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1158 | BANG_OLUFSEN_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1159 | BANG_OLUFSEN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1160 | BANG_OLUFSEN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1161 | BANG_OLUFSEN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1162 | BANG_OLUFSEN_ADDRESS_OFFSET + BANG_OLUFSEN_ADDRESS_LEN, // address_end: end of address\r | |
1163 | BANG_OLUFSEN_COMMAND_OFFSET, // command_offset: command offset\r | |
1164 | BANG_OLUFSEN_COMMAND_OFFSET + BANG_OLUFSEN_COMMAND_LEN, // command_end: end of command\r | |
1165 | BANG_OLUFSEN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1166 | BANG_OLUFSEN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
77f488bb | 1167 | BANG_OLUFSEN_LSB, // lsb_first: flag: LSB first\r |
1168 | BANG_OLUFSEN_FLAGS // flags: some flags\r | |
504d9df9 | 1169 | };\r |
1170 | \r | |
1171 | #endif\r | |
1172 | \r | |
89e8cafb | 1173 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1174 | \r | |
1175 | static uint8_t first_bit;\r | |
592411d1 | 1176 | \r |
63b94f48 | 1177 | static const PROGMEM IRMP_PARAMETER grundig_param =\r |
592411d1 | 1178 | {\r |
d155e9ab | 1179 | IRMP_GRUNDIG_PROTOCOL, // protocol: ir protocol\r |
1aee56bc | 1180 | \r |
89e8cafb | 1181 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r |
1182 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1183 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1184 | GRUNDIG_NOKIA_IR60_BIT_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1185 | 0, // pulse_0_len_min: here: not used\r |
1186 | 0, // pulse_0_len_max: here: not used\r | |
1187 | 0, // pause_0_len_min: here: not used\r | |
1188 | 0, // pause_0_len_max: here: not used\r | |
d155e9ab | 1189 | GRUNDIG_ADDRESS_OFFSET, // address_offset: address offset\r |
1190 | GRUNDIG_ADDRESS_OFFSET + GRUNDIG_ADDRESS_LEN, // address_end: end of address\r | |
1191 | GRUNDIG_COMMAND_OFFSET, // command_offset: command offset\r | |
1192 | GRUNDIG_COMMAND_OFFSET + GRUNDIG_COMMAND_LEN + 1, // command_end: end of command (USE 1 bit MORE to STORE NOKIA DATA!)\r | |
1193 | NOKIA_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: NOKIA instead of GRUNDIG!\r | |
89e8cafb | 1194 | GRUNDIG_NOKIA_IR60_STOP_BIT, // stop_bit: flag: frame has stop bit\r |
1195 | GRUNDIG_NOKIA_IR60_LSB, // lsb_first: flag: LSB first\r | |
1196 | GRUNDIG_NOKIA_IR60_FLAGS // flags: some flags\r | |
592411d1 | 1197 | };\r |
1198 | \r | |
1199 | #endif\r | |
1200 | \r | |
12948cf3 | 1201 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
a7054daf | 1202 | \r |
63b94f48 | 1203 | static const PROGMEM IRMP_PARAMETER ruwido_param =\r |
a7054daf | 1204 | {\r |
12948cf3 | 1205 | IRMP_RUWIDO_PROTOCOL, // protocol: ir protocol\r |
1206 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1207 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1208 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1209 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
31c1f035 | 1210 | 0, // pulse_0_len_min: here: not used\r |
1211 | 0, // pulse_0_len_max: here: not used\r | |
1212 | 0, // pause_0_len_min: here: not used\r | |
1213 | 0, // pause_0_len_max: here: not used\r | |
12948cf3 | 1214 | RUWIDO_ADDRESS_OFFSET, // address_offset: address offset\r |
1215 | RUWIDO_ADDRESS_OFFSET + RUWIDO_ADDRESS_LEN, // address_end: end of address\r | |
1216 | RUWIDO_COMMAND_OFFSET, // command_offset: command offset\r | |
1217 | RUWIDO_COMMAND_OFFSET + RUWIDO_COMMAND_LEN, // command_end: end of command\r | |
1218 | SIEMENS_COMPLETE_DATA_LEN, // complete_len: complete length of frame, here: SIEMENS instead of RUWIDO!\r | |
1219 | SIEMENS_OR_RUWIDO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1220 | SIEMENS_OR_RUWIDO_LSB, // lsb_first: flag: LSB first\r | |
1221 | SIEMENS_OR_RUWIDO_FLAGS // flags: some flags\r | |
a7054daf | 1222 | };\r |
1223 | \r | |
1224 | #endif\r | |
1225 | \r | |
48664931 | 1226 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
b5ea7869 | 1227 | \r |
63b94f48 | 1228 | static const PROGMEM IRMP_PARAMETER fdc_param =\r |
b5ea7869 | 1229 | {\r |
48664931 | 1230 | IRMP_FDC_PROTOCOL, // protocol: ir protocol\r |
1231 | FDC_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1232 | FDC_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1233 | FDC_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1234 | FDC_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1235 | FDC_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1236 | FDC_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1237 | FDC_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1238 | FDC_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1239 | FDC_ADDRESS_OFFSET, // address_offset: address offset\r | |
1240 | FDC_ADDRESS_OFFSET + FDC_ADDRESS_LEN, // address_end: end of address\r | |
1241 | FDC_COMMAND_OFFSET, // command_offset: command offset\r | |
1242 | FDC_COMMAND_OFFSET + FDC_COMMAND_LEN, // command_end: end of command\r | |
1243 | FDC_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1244 | FDC_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1245 | FDC_LSB, // lsb_first: flag: LSB first\r | |
1246 | FDC_FLAGS // flags: some flags\r | |
b5ea7869 | 1247 | };\r |
1248 | \r | |
1249 | #endif\r | |
1250 | \r | |
9e16d699 | 1251 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1252 | \r | |
63b94f48 | 1253 | static const PROGMEM IRMP_PARAMETER rccar_param =\r |
9e16d699 | 1254 | {\r |
1255 | IRMP_RCCAR_PROTOCOL, // protocol: ir protocol\r | |
1256 | RCCAR_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1257 | RCCAR_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1258 | RCCAR_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1259 | RCCAR_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1260 | RCCAR_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1261 | RCCAR_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1262 | RCCAR_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1263 | RCCAR_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1264 | RCCAR_ADDRESS_OFFSET, // address_offset: address offset\r | |
1265 | RCCAR_ADDRESS_OFFSET + RCCAR_ADDRESS_LEN, // address_end: end of address\r | |
1266 | RCCAR_COMMAND_OFFSET, // command_offset: command offset\r | |
1267 | RCCAR_COMMAND_OFFSET + RCCAR_COMMAND_LEN, // command_end: end of command\r | |
1268 | RCCAR_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1269 | RCCAR_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1270 | RCCAR_LSB, // lsb_first: flag: LSB first\r | |
1271 | RCCAR_FLAGS // flags: some flags\r | |
1272 | };\r | |
1273 | \r | |
1274 | #endif\r | |
1275 | \r | |
9405f84a | 1276 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
1277 | \r | |
63b94f48 | 1278 | static const PROGMEM IRMP_PARAMETER nikon_param =\r |
9405f84a | 1279 | {\r |
1280 | IRMP_NIKON_PROTOCOL, // protocol: ir protocol\r | |
1281 | NIKON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1282 | NIKON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1283 | NIKON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1284 | NIKON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1285 | NIKON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1286 | NIKON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1287 | NIKON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1288 | NIKON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1289 | NIKON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1290 | NIKON_ADDRESS_OFFSET + NIKON_ADDRESS_LEN, // address_end: end of address\r | |
1291 | NIKON_COMMAND_OFFSET, // command_offset: command offset\r | |
1292 | NIKON_COMMAND_OFFSET + NIKON_COMMAND_LEN, // command_end: end of command\r | |
1293 | NIKON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1294 | NIKON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1295 | NIKON_LSB, // lsb_first: flag: LSB first\r | |
1296 | NIKON_FLAGS // flags: some flags\r | |
1297 | };\r | |
1298 | \r | |
1299 | #endif\r | |
1300 | \r | |
111d6191 | 1301 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1302 | \r | |
63b94f48 | 1303 | static const PROGMEM IRMP_PARAMETER kathrein_param =\r |
111d6191 | 1304 | {\r |
1305 | IRMP_KATHREIN_PROTOCOL, // protocol: ir protocol\r | |
1306 | KATHREIN_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1307 | KATHREIN_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1308 | KATHREIN_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1309 | KATHREIN_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1310 | KATHREIN_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1311 | KATHREIN_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1312 | KATHREIN_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1313 | KATHREIN_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1314 | KATHREIN_ADDRESS_OFFSET, // address_offset: address offset\r | |
1315 | KATHREIN_ADDRESS_OFFSET + KATHREIN_ADDRESS_LEN, // address_end: end of address\r | |
1316 | KATHREIN_COMMAND_OFFSET, // command_offset: command offset\r | |
1317 | KATHREIN_COMMAND_OFFSET + KATHREIN_COMMAND_LEN, // command_end: end of command\r | |
1318 | KATHREIN_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1319 | KATHREIN_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1320 | KATHREIN_LSB, // lsb_first: flag: LSB first\r | |
1321 | KATHREIN_FLAGS // flags: some flags\r | |
1322 | };\r | |
1323 | \r | |
1324 | #endif\r | |
1325 | \r | |
deba2a0a | 1326 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
1327 | \r | |
63b94f48 | 1328 | static const PROGMEM IRMP_PARAMETER netbox_param =\r |
deba2a0a | 1329 | {\r |
1330 | IRMP_NETBOX_PROTOCOL, // protocol: ir protocol\r | |
a42d1ee6 | 1331 | NETBOX_PULSE_LEN, // pulse_1_len_min: minimum length of pulse with bit value 1, here: exact value\r |
1332 | NETBOX_PULSE_REST_LEN, // pulse_1_len_max: maximum length of pulse with bit value 1, here: rest value\r | |
1333 | NETBOX_PAUSE_LEN, // pause_1_len_min: minimum length of pause with bit value 1, here: exact value\r | |
1334 | NETBOX_PAUSE_REST_LEN, // pause_1_len_max: maximum length of pause with bit value 1, here: rest value\r | |
1335 | NETBOX_PULSE_LEN, // pulse_0_len_min: minimum length of pulse with bit value 0, here: exact value\r | |
1336 | NETBOX_PULSE_REST_LEN, // pulse_0_len_max: maximum length of pulse with bit value 0, here: rest value\r | |
1337 | NETBOX_PAUSE_LEN, // pause_0_len_min: minimum length of pause with bit value 0, here: exact value\r | |
1338 | NETBOX_PAUSE_REST_LEN, // pause_0_len_max: maximum length of pause with bit value 0, here: rest value\r | |
deba2a0a | 1339 | NETBOX_ADDRESS_OFFSET, // address_offset: address offset\r |
1340 | NETBOX_ADDRESS_OFFSET + NETBOX_ADDRESS_LEN, // address_end: end of address\r | |
1341 | NETBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1342 | NETBOX_COMMAND_OFFSET + NETBOX_COMMAND_LEN, // command_end: end of command\r | |
1343 | NETBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1344 | NETBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1345 | NETBOX_LSB, // lsb_first: flag: LSB first\r | |
1346 | NETBOX_FLAGS // flags: some flags\r | |
1347 | };\r | |
1348 | \r | |
1349 | #endif\r | |
1350 | \r | |
f50e01e7 | 1351 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1352 | \r | |
63b94f48 | 1353 | static const PROGMEM IRMP_PARAMETER lego_param =\r |
f50e01e7 | 1354 | {\r |
1355 | IRMP_LEGO_PROTOCOL, // protocol: ir protocol\r | |
1356 | LEGO_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1357 | LEGO_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1358 | LEGO_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1359 | LEGO_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1360 | LEGO_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1361 | LEGO_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1362 | LEGO_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1363 | LEGO_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1364 | LEGO_ADDRESS_OFFSET, // address_offset: address offset\r | |
1365 | LEGO_ADDRESS_OFFSET + LEGO_ADDRESS_LEN, // address_end: end of address\r | |
1366 | LEGO_COMMAND_OFFSET, // command_offset: command offset\r | |
1367 | LEGO_COMMAND_OFFSET + LEGO_COMMAND_LEN, // command_end: end of command\r | |
1368 | LEGO_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1369 | LEGO_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1370 | LEGO_LSB, // lsb_first: flag: LSB first\r | |
1371 | LEGO_FLAGS // flags: some flags\r | |
1372 | };\r | |
1373 | \r | |
1374 | #endif\r | |
1375 | \r | |
beda975f | 1376 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
1377 | \r | |
63b94f48 | 1378 | static const PROGMEM IRMP_PARAMETER thomson_param =\r |
beda975f | 1379 | {\r |
1380 | IRMP_THOMSON_PROTOCOL, // protocol: ir protocol\r | |
1381 | THOMSON_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1382 | THOMSON_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1383 | THOMSON_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1384 | THOMSON_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1385 | THOMSON_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1386 | THOMSON_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1387 | THOMSON_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1388 | THOMSON_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1389 | THOMSON_ADDRESS_OFFSET, // address_offset: address offset\r | |
1390 | THOMSON_ADDRESS_OFFSET + THOMSON_ADDRESS_LEN, // address_end: end of address\r | |
1391 | THOMSON_COMMAND_OFFSET, // command_offset: command offset\r | |
1392 | THOMSON_COMMAND_OFFSET + THOMSON_COMMAND_LEN, // command_end: end of command\r | |
1393 | THOMSON_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1394 | THOMSON_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1395 | THOMSON_LSB, // lsb_first: flag: LSB first\r | |
1396 | THOMSON_FLAGS // flags: some flags\r | |
1397 | };\r | |
1398 | \r | |
1399 | #endif\r | |
1400 | \r | |
3a7e26e1 | 1401 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1402 | \r | |
1403 | static const PROGMEM IRMP_PARAMETER bose_param =\r | |
1404 | {\r | |
1405 | IRMP_BOSE_PROTOCOL, // protocol: ir protocol\r | |
1406 | BOSE_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1407 | BOSE_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1408 | BOSE_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1409 | BOSE_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1410 | BOSE_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1411 | BOSE_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1412 | BOSE_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1413 | BOSE_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1414 | BOSE_ADDRESS_OFFSET, // address_offset: address offset\r | |
1415 | BOSE_ADDRESS_OFFSET + BOSE_ADDRESS_LEN, // address_end: end of address\r | |
1416 | BOSE_COMMAND_OFFSET, // command_offset: command offset\r | |
1417 | BOSE_COMMAND_OFFSET + BOSE_COMMAND_LEN, // command_end: end of command\r | |
1418 | BOSE_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1419 | BOSE_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1420 | BOSE_LSB, // lsb_first: flag: LSB first\r | |
1421 | BOSE_FLAGS // flags: some flags\r | |
1422 | };\r | |
1423 | \r | |
1424 | #endif\r | |
1425 | \r | |
2fb27bfe | 1426 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
1427 | \r | |
1428 | static const PROGMEM IRMP_PARAMETER a1tvbox_param =\r | |
1429 | {\r | |
1430 | IRMP_A1TVBOX_PROTOCOL, // protocol: ir protocol\r | |
1431 | \r | |
1432 | A1TVBOX_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1433 | A1TVBOX_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1434 | A1TVBOX_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1435 | A1TVBOX_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1436 | 0, // pulse_0_len_min: here: not used\r | |
1437 | 0, // pulse_0_len_max: here: not used\r | |
1438 | 0, // pause_0_len_min: here: not used\r | |
1439 | 0, // pause_0_len_max: here: not used\r | |
1440 | A1TVBOX_ADDRESS_OFFSET, // address_offset: address offset\r | |
1441 | A1TVBOX_ADDRESS_OFFSET + A1TVBOX_ADDRESS_LEN, // address_end: end of address\r | |
1442 | A1TVBOX_COMMAND_OFFSET, // command_offset: command offset\r | |
1443 | A1TVBOX_COMMAND_OFFSET + A1TVBOX_COMMAND_LEN, // command_end: end of command\r | |
1444 | A1TVBOX_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1445 | A1TVBOX_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1446 | A1TVBOX_LSB, // lsb_first: flag: LSB first\r | |
1447 | A1TVBOX_FLAGS // flags: some flags\r | |
1448 | };\r | |
1449 | \r | |
1450 | #endif\r | |
1451 | \r | |
b85cb27d | 1452 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1453 | \r | |
1454 | static const PROGMEM IRMP_PARAMETER ortek_param =\r | |
1455 | {\r | |
1456 | IRMP_ORTEK_PROTOCOL, // protocol: ir protocol\r | |
1457 | \r | |
1458 | ORTEK_BIT_PULSE_LEN_MIN, // pulse_1_len_min: here: minimum length of short pulse\r | |
1459 | ORTEK_BIT_PULSE_LEN_MAX, // pulse_1_len_max: here: maximum length of short pulse\r | |
1460 | ORTEK_BIT_PAUSE_LEN_MIN, // pause_1_len_min: here: minimum length of short pause\r | |
1461 | ORTEK_BIT_PAUSE_LEN_MAX, // pause_1_len_max: here: maximum length of short pause\r | |
1462 | 0, // pulse_0_len_min: here: not used\r | |
1463 | 0, // pulse_0_len_max: here: not used\r | |
1464 | 0, // pause_0_len_min: here: not used\r | |
1465 | 0, // pause_0_len_max: here: not used\r | |
1466 | ORTEK_ADDRESS_OFFSET, // address_offset: address offset\r | |
1467 | ORTEK_ADDRESS_OFFSET + ORTEK_ADDRESS_LEN, // address_end: end of address\r | |
1468 | ORTEK_COMMAND_OFFSET, // command_offset: command offset\r | |
1469 | ORTEK_COMMAND_OFFSET + ORTEK_COMMAND_LEN, // command_end: end of command\r | |
1470 | ORTEK_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1471 | ORTEK_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1472 | ORTEK_LSB, // lsb_first: flag: LSB first\r | |
1473 | ORTEK_FLAGS // flags: some flags\r | |
1474 | };\r | |
1475 | \r | |
1476 | #endif\r | |
1477 | \r | |
40ca4604 | 1478 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
1479 | \r | |
1480 | static const PROGMEM IRMP_PARAMETER roomba_param =\r | |
1481 | {\r | |
1482 | IRMP_ROOMBA_PROTOCOL, // protocol: ir protocol\r | |
1483 | ROOMBA_1_PULSE_LEN_MIN, // pulse_1_len_min: minimum length of pulse with bit value 1\r | |
1484 | ROOMBA_1_PULSE_LEN_MAX, // pulse_1_len_max: maximum length of pulse with bit value 1\r | |
1485 | ROOMBA_1_PAUSE_LEN_MIN, // pause_1_len_min: minimum length of pause with bit value 1\r | |
1486 | ROOMBA_1_PAUSE_LEN_MAX, // pause_1_len_max: maximum length of pause with bit value 1\r | |
1487 | ROOMBA_0_PULSE_LEN_MIN, // pulse_0_len_min: minimum length of pulse with bit value 0\r | |
1488 | ROOMBA_0_PULSE_LEN_MAX, // pulse_0_len_max: maximum length of pulse with bit value 0\r | |
1489 | ROOMBA_0_PAUSE_LEN_MIN, // pause_0_len_min: minimum length of pause with bit value 0\r | |
1490 | ROOMBA_0_PAUSE_LEN_MAX, // pause_0_len_max: maximum length of pause with bit value 0\r | |
1491 | ROOMBA_ADDRESS_OFFSET, // address_offset: address offset\r | |
1492 | ROOMBA_ADDRESS_OFFSET + ROOMBA_ADDRESS_LEN, // address_end: end of address\r | |
1493 | ROOMBA_COMMAND_OFFSET, // command_offset: command offset\r | |
1494 | ROOMBA_COMMAND_OFFSET + ROOMBA_COMMAND_LEN, // command_end: end of command\r | |
1495 | ROOMBA_COMPLETE_DATA_LEN, // complete_len: complete length of frame\r | |
1496 | ROOMBA_STOP_BIT, // stop_bit: flag: frame has stop bit\r | |
1497 | ROOMBA_LSB, // lsb_first: flag: LSB first\r | |
1498 | ROOMBA_FLAGS // flags: some flags\r | |
1499 | };\r | |
1500 | \r | |
1501 | #endif\r | |
1502 | \r | |
d155e9ab | 1503 | static uint8_t irmp_bit; // current bit position\r |
4225a882 | 1504 | static IRMP_PARAMETER irmp_param;\r |
1505 | \r | |
6f750020 | 1506 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
1507 | static IRMP_PARAMETER irmp_param2;\r | |
1508 | #endif\r | |
1509 | \r | |
4225a882 | 1510 | static volatile uint8_t irmp_ir_detected;\r |
1511 | static volatile uint8_t irmp_protocol;\r | |
1512 | static volatile uint16_t irmp_address;\r | |
1513 | static volatile uint16_t irmp_command;\r | |
d155e9ab | 1514 | static volatile uint16_t irmp_id; // only used for SAMSUNG protocol\r |
4225a882 | 1515 | static volatile uint8_t irmp_flags;\r |
08f2dd9d | 1516 | // static volatile uint8_t irmp_busy_flag;\r |
4225a882 | 1517 | \r |
48664931 | 1518 | #ifdef ANALYZE\r |
08f2dd9d | 1519 | #define input(x) (x)\r |
4225a882 | 1520 | static uint8_t IRMP_PIN;\r |
1521 | #endif\r | |
1522 | \r | |
1523 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1524 | * Initialize IRMP decoder\r | |
1525 | * @details Configures IRMP input pin\r | |
1526 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1527 | */\r | |
48664931 | 1528 | #ifndef ANALYZE\r |
4225a882 | 1529 | void\r |
1530 | irmp_init (void)\r | |
1531 | {\r | |
08f2dd9d | 1532 | #if defined(PIC_CCS) || defined(PIC_C18) // PIC: do nothing\r |
1533 | #elif defined (ARM_STM32) // STM32\r | |
1534 | GPIO_InitTypeDef GPIO_InitStructure;\r | |
1535 | \r | |
1536 | /* GPIOx clock enable */\r | |
1537 | #if defined (ARM_STM32L1XX)\r | |
1538 | RCC_AHBPeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1539 | #elif defined (ARM_STM32F10X)\r | |
1540 | RCC_APB2PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1541 | #elif defined (ARM_STM32F4XX)\r | |
1542 | RCC_AHB1PeriphClockCmd(IRMP_PORT_RCC, ENABLE);\r | |
1543 | #endif\r | |
1544 | \r | |
1545 | /* GPIO Configuration */\r | |
1546 | GPIO_InitStructure.GPIO_Pin = IRMP_BIT;\r | |
1547 | #if defined (ARM_STM32L1XX) || defined (ARM_STM32F4XX)\r | |
37b29f94 | 1548 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;\r |
08f2dd9d | 1549 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r |
1550 | GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;\r | |
1551 | GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;\r | |
1552 | #elif defined (ARM_STM32F10X)\r | |
1553 | GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;\r | |
37b29f94 | 1554 | GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;\r |
08f2dd9d | 1555 | #endif\r |
1556 | GPIO_Init(IRMP_PORT, &GPIO_InitStructure);\r | |
afd1e690 | 1557 | #elif defined(STELLARIS_ARM_CORTEX_M4)\r |
1558 | // Enable the GPIO port\r | |
1559 | ROM_SysCtlPeripheralEnable(IRMP_PORT_PERIPH);\r | |
1560 | \r | |
1561 | // Set as an input\r | |
1562 | ROM_GPIODirModeSet(IRMP_PORT_BASE, IRMP_PORT_PIN, GPIO_DIR_MODE_IN);\r | |
1563 | ROM_GPIOPadConfigSet(IRMP_PORT_BASE, IRMP_PORT_PIN,\r | |
1564 | GPIO_STRENGTH_2MA,\r | |
1565 | GPIO_PIN_TYPE_STD_WPU);\r | |
08f2dd9d | 1566 | #else // AVR\r |
d155e9ab | 1567 | IRMP_PORT &= ~(1<<IRMP_BIT); // deactivate pullup\r |
1568 | IRMP_DDR &= ~(1<<IRMP_BIT); // set pin to input\r | |
93ba2e01 | 1569 | #endif\r |
4225a882 | 1570 | \r |
1571 | #if IRMP_LOGGING == 1\r | |
1572 | irmp_uart_init ();\r | |
1573 | #endif\r | |
1574 | }\r | |
1575 | #endif\r | |
1576 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1577 | * Get IRMP data\r | |
1578 | * @details gets decoded IRMP data\r | |
1579 | * @param pointer in order to store IRMP data\r | |
1580 | * @return TRUE: successful, FALSE: failed\r | |
1581 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1582 | */\r | |
1583 | uint8_t\r | |
1584 | irmp_get_data (IRMP_DATA * irmp_data_p)\r | |
1585 | {\r | |
1586 | uint8_t rtc = FALSE;\r | |
1587 | \r | |
1588 | if (irmp_ir_detected)\r | |
1589 | {\r | |
1590 | switch (irmp_protocol)\r | |
1591 | {\r | |
1592 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
1593 | case IRMP_SAMSUNG_PROTOCOL:\r | |
1594 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1595 | {\r | |
1596 | irmp_command &= 0xff;\r | |
1597 | irmp_command |= irmp_id << 8;\r | |
1598 | rtc = TRUE;\r | |
1599 | }\r | |
1600 | break;\r | |
1601 | #endif\r | |
1602 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
1603 | case IRMP_NEC_PROTOCOL:\r | |
1604 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1605 | {\r | |
1606 | irmp_command &= 0xff;\r | |
1607 | rtc = TRUE;\r | |
1608 | }\r | |
770a1a9d | 1609 | else if (irmp_address == 0x87EE)\r |
4225a882 | 1610 | {\r |
48664931 | 1611 | ANALYZE_PRINTF ("Switching to APPLE protocol\n");\r |
4225a882 | 1612 | irmp_protocol = IRMP_APPLE_PROTOCOL;\r |
770a1a9d | 1613 | irmp_address = (irmp_command & 0xFF00) >> 8;\r |
1614 | irmp_command &= 0x00FF;\r | |
4225a882 | 1615 | rtc = TRUE;\r |
1616 | }\r | |
1617 | break;\r | |
48664931 | 1618 | #endif\r |
3a7e26e1 | 1619 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
1620 | case IRMP_BOSE_PROTOCOL:\r | |
1621 | if ((irmp_command >> 8) == (~irmp_command & 0x00FF))\r | |
1622 | {\r | |
1623 | irmp_command &= 0xff;\r | |
1624 | rtc = TRUE;\r | |
1625 | }\r | |
1626 | break;\r | |
1627 | #endif\r | |
12948cf3 | 1628 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
9405f84a | 1629 | case IRMP_SIEMENS_PROTOCOL:\r |
12948cf3 | 1630 | case IRMP_RUWIDO_PROTOCOL:\r |
9405f84a | 1631 | if (((irmp_command >> 1) & 0x0001) == (~irmp_command & 0x0001))\r |
1632 | {\r | |
1633 | irmp_command >>= 1;\r | |
1634 | rtc = TRUE;\r | |
1635 | }\r | |
1636 | break;\r | |
1637 | #endif\r | |
111d6191 | 1638 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
1639 | case IRMP_KATHREIN_PROTOCOL:\r | |
2cfc146d | 1640 | if (irmp_command != 0x0000)\r |
111d6191 | 1641 | {\r |
1642 | rtc = TRUE;\r | |
1643 | }\r | |
1644 | break;\r | |
1645 | #endif\r | |
03780b34 | 1646 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r |
1647 | case IRMP_RC5_PROTOCOL:\r | |
1648 | irmp_address &= ~0x20; // clear toggle bit\r | |
1649 | rtc = TRUE;\r | |
1650 | break;\r | |
1651 | #endif\r | |
89e8cafb | 1652 | #if IRMP_SUPPORT_IR60_PROTOCOL == 1\r |
1653 | case IRMP_IR60_PROTOCOL:\r | |
1654 | if (irmp_command != 0x007d) // 0x007d (== 62<<1 + 1) is start instruction frame\r | |
1655 | {\r | |
1656 | rtc = TRUE;\r | |
1657 | }\r | |
f60c4644 | 1658 | else\r |
1659 | {\r | |
1660 | ANALYZE_PRINTF("Info IR60: got start instruction frame\n");\r | |
1661 | }\r | |
89e8cafb | 1662 | break;\r |
1663 | #endif\r | |
48664931 | 1664 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
1665 | case IRMP_RCCAR_PROTOCOL:\r | |
1666 | // frame in irmp_data:\r | |
1667 | // Bit 12 11 10 9 8 7 6 5 4 3 2 1 0\r | |
1668 | // V D7 D6 D5 D4 D3 D2 D1 D0 A1 A0 C1 C0 // 10 9 8 7 6 5 4 3 2 1 0\r | |
1669 | irmp_address = (irmp_command & 0x000C) >> 2; // addr: 0 0 0 0 0 0 0 0 0 A1 A0\r | |
1670 | irmp_command = ((irmp_command & 0x1000) >> 2) | // V-Bit: V 0 0 0 0 0 0 0 0 0 0\r | |
1671 | ((irmp_command & 0x0003) << 8) | // C-Bits: 0 C1 C0 0 0 0 0 0 0 0 0\r | |
1672 | ((irmp_command & 0x0FF0) >> 4); // D-Bits: D7 D6 D5 D4 D3 D2 D1 D0\r | |
1673 | rtc = TRUE; // Summe: V C1 C0 D7 D6 D5 D4 D3 D2 D1 D0\r | |
1674 | break;\r | |
4225a882 | 1675 | #endif\r |
beda975f | 1676 | \r |
1677 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1 // squeeze code to 8 bit, upper bit indicates release-key\r | |
deba2a0a | 1678 | case IRMP_NETBOX_PROTOCOL:\r |
1679 | if (irmp_command & 0x1000) // last bit set?\r | |
1680 | {\r | |
1681 | if ((irmp_command & 0x1f) == 0x15) // key pressed: 101 01 (LSB)\r | |
1682 | {\r | |
1683 | irmp_command >>= 5;\r | |
1684 | irmp_command &= 0x7F;\r | |
1685 | rtc = TRUE;\r | |
1686 | }\r | |
1687 | else if ((irmp_command & 0x1f) == 0x10) // key released: 000 01 (LSB)\r | |
1688 | {\r | |
1689 | irmp_command >>= 5;\r | |
1690 | irmp_command |= 0x80;\r | |
1691 | rtc = TRUE;\r | |
1692 | }\r | |
1693 | else\r | |
1694 | {\r | |
1695 | ANALYZE_PRINTF("error NETBOX: bit6/7 must be 0/1\n");\r | |
1696 | }\r | |
1697 | }\r | |
1698 | else\r | |
1699 | {\r | |
1700 | ANALYZE_PRINTF("error NETBOX: last bit not set\n");\r | |
1701 | }\r | |
1702 | break;\r | |
1703 | #endif\r | |
f50e01e7 | 1704 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
1705 | case IRMP_LEGO_PROTOCOL:\r | |
1706 | {\r | |
1707 | uint8_t crc = 0x0F ^ ((irmp_command & 0xF000) >> 12) ^ ((irmp_command & 0x0F00) >> 8) ^ ((irmp_command & 0x00F0) >> 4);\r | |
1708 | \r | |
1709 | if ((irmp_command & 0x000F) == crc)\r | |
1710 | {\r | |
1711 | irmp_command >>= 4;\r | |
1712 | rtc = TRUE;\r | |
1713 | }\r | |
1714 | else\r | |
1715 | {\r | |
1716 | ANALYZE_PRINTF ("CRC error in LEGO protocol\n");\r | |
f874da09 | 1717 | // rtc = TRUE; // don't accept codes with CRC errors\r |
f50e01e7 | 1718 | }\r |
1719 | break;\r | |
1720 | }\r | |
1721 | #endif\r | |
4225a882 | 1722 | default:\r |
08f2dd9d | 1723 | {\r |
4225a882 | 1724 | rtc = TRUE;\r |
08f2dd9d | 1725 | break;\r |
1726 | }\r | |
4225a882 | 1727 | }\r |
1728 | \r | |
1729 | if (rtc)\r | |
1730 | {\r | |
1731 | irmp_data_p->protocol = irmp_protocol;\r | |
1732 | irmp_data_p->address = irmp_address;\r | |
1733 | irmp_data_p->command = irmp_command;\r | |
1734 | irmp_data_p->flags = irmp_flags;\r | |
1735 | irmp_command = 0;\r | |
1736 | irmp_address = 0;\r | |
1737 | irmp_flags = 0;\r | |
1738 | }\r | |
1739 | \r | |
1740 | irmp_ir_detected = FALSE;\r | |
1741 | }\r | |
1742 | \r | |
1743 | return rtc;\r | |
1744 | }\r | |
1745 | \r | |
1f54e86c | 1746 | // uint8_t\r |
1747 | // irmp_is_busy (void)\r | |
1748 | // {\r | |
1749 | // return irmp_busy_flag;\r | |
1750 | // }\r | |
1751 | \r | |
7644ac04 | 1752 | #if IRMP_USE_CALLBACK == 1\r |
1753 | void\r | |
1754 | irmp_set_callback_ptr (void (*cb)(uint8_t))\r | |
1755 | {\r | |
1756 | irmp_callback_ptr = cb;\r | |
1757 | }\r | |
1758 | #endif // IRMP_USE_CALLBACK == 1\r | |
1759 | \r | |
4225a882 | 1760 | // these statics must not be volatile, because they are only used by irmp_store_bit(), which is called by irmp_ISR()\r |
770a1a9d | 1761 | static uint16_t irmp_tmp_address; // ir address\r |
1762 | static uint16_t irmp_tmp_command; // ir command\r | |
6f750020 | 1763 | \r |
35213800 | 1764 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
770a1a9d | 1765 | static uint16_t irmp_tmp_address2; // ir address\r |
1766 | static uint16_t irmp_tmp_command2; // ir command\r | |
6f750020 | 1767 | #endif\r |
1768 | \r | |
4225a882 | 1769 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
770a1a9d | 1770 | static uint16_t irmp_tmp_id; // ir id (only SAMSUNG)\r |
1771 | #endif\r | |
1772 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
1773 | static uint8_t xor_check[6]; // check kaseikyo "parity" bits\r | |
0f700c8e | 1774 | static uint8_t genre2; // save genre2 bits here, later copied to MSB in flags\r |
4225a882 | 1775 | #endif\r |
1776 | \r | |
40ca4604 | 1777 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1778 | static uint8_t parity; // number of '1' of the first 14 bits, check if even.\r | |
1779 | #endif\r | |
1780 | \r | |
4225a882 | 1781 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
1782 | * store bit\r | |
1783 | * @details store bit in temp address or temp command\r | |
1784 | * @param value to store: 0 or 1\r | |
1785 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1786 | */\r | |
d823e852 | 1787 | // verhindert, dass irmp_store_bit() inline compiliert wird:\r |
1788 | // static void irmp_store_bit (uint8_t) __attribute__ ((noinline));\r | |
1789 | \r | |
4225a882 | 1790 | static void\r |
1791 | irmp_store_bit (uint8_t value)\r | |
1792 | {\r | |
40ca4604 | 1793 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
1794 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
1795 | {\r | |
1796 | if (irmp_bit < 14)\r | |
1797 | {\r | |
1798 | if (value)\r | |
1799 | {\r | |
1800 | parity++;\r | |
1801 | }\r | |
1802 | }\r | |
1803 | else if (irmp_bit == 14)\r | |
1804 | {\r | |
1805 | if (value) // value == 1: even parity\r | |
1806 | {\r | |
1807 | if (parity & 0x01)\r | |
1808 | {\r | |
1809 | parity = PARITY_CHECK_FAILED;\r | |
1810 | }\r | |
1811 | else\r | |
1812 | {\r | |
1813 | parity = PARITY_CHECK_OK;\r | |
1814 | }\r | |
1815 | }\r | |
1816 | else\r | |
1817 | {\r | |
1818 | if (parity & 0x01) // value == 0: odd parity\r | |
1819 | {\r | |
1820 | parity = PARITY_CHECK_OK;\r | |
1821 | }\r | |
1822 | else\r | |
1823 | {\r | |
1824 | parity = PARITY_CHECK_FAILED;\r | |
1825 | }\r | |
1826 | }\r | |
1827 | }\r | |
1828 | }\r | |
1829 | #endif\r | |
1830 | \r | |
89e8cafb | 1831 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
1832 | if (irmp_bit == 0 && irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL)\r | |
1833 | {\r | |
1834 | first_bit = value;\r | |
1835 | }\r | |
1836 | else\r | |
1837 | #endif\r | |
770a1a9d | 1838 | \r |
4225a882 | 1839 | if (irmp_bit >= irmp_param.address_offset && irmp_bit < irmp_param.address_end)\r |
1840 | {\r | |
1841 | if (irmp_param.lsb_first)\r | |
1842 | {\r | |
1843 | irmp_tmp_address |= (((uint16_t) (value)) << (irmp_bit - irmp_param.address_offset)); // CV wants cast\r | |
1844 | }\r | |
1845 | else\r | |
1846 | {\r | |
1847 | irmp_tmp_address <<= 1;\r | |
1848 | irmp_tmp_address |= value;\r | |
1849 | }\r | |
1850 | }\r | |
1851 | else if (irmp_bit >= irmp_param.command_offset && irmp_bit < irmp_param.command_end)\r | |
1852 | {\r | |
1853 | if (irmp_param.lsb_first)\r | |
1854 | {\r | |
1855 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - irmp_param.command_offset)); // CV wants cast\r | |
1856 | }\r | |
1857 | else\r | |
1858 | {\r | |
1859 | irmp_tmp_command <<= 1;\r | |
1860 | irmp_tmp_command |= value;\r | |
1861 | }\r | |
1862 | }\r | |
770a1a9d | 1863 | \r |
35213800 | 1864 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
f60c4644 | 1865 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit >= 13 && irmp_bit < 26)\r |
35213800 | 1866 | {\r |
1867 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit - 13)); // CV wants cast\r | |
1868 | }\r | |
f60c4644 | 1869 | else\r |
35213800 | 1870 | #endif\r |
1871 | \r | |
4225a882 | 1872 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
f60c4644 | 1873 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit >= SAMSUNG_ID_OFFSET && irmp_bit < SAMSUNG_ID_OFFSET + SAMSUNG_ID_LEN)\r |
4225a882 | 1874 | {\r |
1875 | irmp_tmp_id |= (((uint16_t) (value)) << (irmp_bit - SAMSUNG_ID_OFFSET)); // store with LSB first\r | |
1876 | }\r | |
f60c4644 | 1877 | else\r |
4225a882 | 1878 | #endif\r |
770a1a9d | 1879 | \r |
1880 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
f60c4644 | 1881 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r |
770a1a9d | 1882 | {\r |
0f700c8e | 1883 | if (irmp_bit >= 20 && irmp_bit < 24)\r |
770a1a9d | 1884 | {\r |
0f700c8e | 1885 | irmp_tmp_command |= (((uint16_t) (value)) << (irmp_bit - 8)); // store 4 system bits (genre 1) in upper nibble with LSB first\r |
770a1a9d | 1886 | }\r |
cea96148 | 1887 | else if (irmp_bit >= 24 && irmp_bit < 28)\r |
770a1a9d | 1888 | {\r |
0f700c8e | 1889 | genre2 |= (((uint8_t) (value)) << (irmp_bit - 20)); // store 4 system bits (genre 2) in upper nibble with LSB first\r |
770a1a9d | 1890 | }\r |
770a1a9d | 1891 | \r |
0f700c8e | 1892 | if (irmp_bit < KASEIKYO_COMPLETE_DATA_LEN)\r |
1893 | {\r | |
1894 | if (value)\r | |
1895 | {\r | |
1896 | xor_check[irmp_bit / 8] |= 1 << (irmp_bit % 8);\r | |
1897 | }\r | |
1898 | else\r | |
1899 | {\r | |
1900 | xor_check[irmp_bit / 8] &= ~(1 << (irmp_bit % 8));\r | |
1901 | }\r | |
1902 | }\r | |
1903 | }\r | |
26b6c304 | 1904 | else\r |
770a1a9d | 1905 | #endif\r |
26b6c304 | 1906 | {\r |
1907 | ;\r | |
1908 | }\r | |
770a1a9d | 1909 | \r |
4225a882 | 1910 | irmp_bit++;\r |
1911 | }\r | |
1912 | \r | |
6f750020 | 1913 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
1914 | * store bit\r | |
1915 | * @details store bit in temp address or temp command\r | |
1916 | * @param value to store: 0 or 1\r | |
1917 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1918 | */\r | |
1919 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1920 | static void\r | |
1921 | irmp_store_bit2 (uint8_t value)\r | |
1922 | {\r | |
1923 | uint8_t irmp_bit2;\r | |
1924 | \r | |
1925 | if (irmp_param.protocol)\r | |
1926 | {\r | |
1927 | irmp_bit2 = irmp_bit - 2;\r | |
1928 | }\r | |
1929 | else\r | |
1930 | {\r | |
1931 | irmp_bit2 = irmp_bit - 1;\r | |
1932 | }\r | |
1933 | \r | |
1934 | if (irmp_bit2 >= irmp_param2.address_offset && irmp_bit2 < irmp_param2.address_end)\r | |
1935 | {\r | |
1936 | irmp_tmp_address2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.address_offset)); // CV wants cast\r | |
1937 | }\r | |
1938 | else if (irmp_bit2 >= irmp_param2.command_offset && irmp_bit2 < irmp_param2.command_end)\r | |
1939 | {\r | |
1940 | irmp_tmp_command2 |= (((uint16_t) (value)) << (irmp_bit2 - irmp_param2.command_offset)); // CV wants cast\r | |
1941 | }\r | |
1942 | }\r | |
1943 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r | |
1944 | \r | |
4225a882 | 1945 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
1946 | * ISR routine\r | |
1947 | * @details ISR routine, called 10000 times per second\r | |
1948 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
1949 | */\r | |
879b06c2 | 1950 | uint8_t\r |
4225a882 | 1951 | irmp_ISR (void)\r |
1952 | {\r | |
48664931 | 1953 | static uint8_t irmp_start_bit_detected; // flag: start bit detected\r |
1954 | static uint8_t wait_for_space; // flag: wait for data bit space\r | |
1955 | static uint8_t wait_for_start_space; // flag: wait for start bit space\r | |
1956 | static uint8_t irmp_pulse_time; // count bit time for pulse\r | |
1957 | static PAUSE_LEN irmp_pause_time; // count bit time for pause\r | |
1958 | static uint16_t last_irmp_address = 0xFFFF; // save last irmp address to recognize key repetition\r | |
1959 | static uint16_t last_irmp_command = 0xFFFF; // save last irmp command to recognize key repetition\r | |
775fabfa | 1960 | static uint16_t key_repetition_len; // SIRCS repeats frame 2-5 times with 45 ms pause\r |
48664931 | 1961 | static uint8_t repetition_frame_number;\r |
4225a882 | 1962 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
48664931 | 1963 | static uint16_t last_irmp_denon_command; // save last irmp command to recognize DENON frame repetition\r |
775fabfa | 1964 | static uint16_t denon_repetition_len = 0xFFFF; // denon repetition len of 2nd auto generated frame\r |
4225a882 | 1965 | #endif\r |
1966 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
48664931 | 1967 | static uint8_t rc5_cmd_bit6; // bit 6 of RC5 command is the inverted 2nd start bit\r |
4225a882 | 1968 | #endif\r |
77f488bb | 1969 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
48664931 | 1970 | static PAUSE_LEN last_pause; // last pause value\r |
504d9df9 | 1971 | #endif\r |
77f488bb | 1972 | #if IRMP_SUPPORT_MANCHESTER == 1 || IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
48664931 | 1973 | static uint8_t last_value; // last bit value\r |
4225a882 | 1974 | #endif\r |
48664931 | 1975 | uint8_t irmp_input; // input value\r |
4225a882 | 1976 | \r |
48664931 | 1977 | #ifdef ANALYZE\r |
592411d1 | 1978 | time_counter++;\r |
1979 | #endif\r | |
1980 | \r | |
4225a882 | 1981 | irmp_input = input(IRMP_PIN);\r |
1982 | \r | |
7644ac04 | 1983 | #if IRMP_USE_CALLBACK == 1\r |
1984 | if (irmp_callback_ptr)\r | |
1985 | {\r | |
1986 | static uint8_t last_inverted_input;\r | |
1987 | \r | |
1988 | if (last_inverted_input != !irmp_input)\r | |
1989 | {\r | |
1990 | (*irmp_callback_ptr) (! irmp_input);\r | |
1991 | last_inverted_input = !irmp_input;\r | |
1992 | }\r | |
1993 | }\r | |
1994 | #endif // IRMP_USE_CALLBACK == 1\r | |
1995 | \r | |
d155e9ab | 1996 | irmp_log(irmp_input); // log ir signal, if IRMP_LOGGING defined\r |
4225a882 | 1997 | \r |
1998 | if (! irmp_ir_detected) // ir code already detected?\r | |
1999 | { // no...\r | |
2000 | if (! irmp_start_bit_detected) // start bit detected?\r | |
2001 | { // no...\r | |
d155e9ab | 2002 | if (! irmp_input) // receiving burst?\r |
4225a882 | 2003 | { // yes...\r |
1f54e86c | 2004 | // irmp_busy_flag = TRUE;\r |
48664931 | 2005 | #ifdef ANALYZE\r |
d155e9ab | 2006 | if (! irmp_pulse_time)\r |
2007 | {\r | |
0f700c8e | 2008 | ANALYZE_PRINTF("%8.3fms [starting pulse]\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
d155e9ab | 2009 | }\r |
2010 | #endif\r | |
4225a882 | 2011 | irmp_pulse_time++; // increment counter\r |
2012 | }\r | |
2013 | else\r | |
2014 | { // no...\r | |
2015 | if (irmp_pulse_time) // it's dark....\r | |
2016 | { // set flags for counting the time of darkness...\r | |
2017 | irmp_start_bit_detected = 1;\r | |
2018 | wait_for_start_space = 1;\r | |
2019 | wait_for_space = 0;\r | |
2020 | irmp_tmp_command = 0;\r | |
2021 | irmp_tmp_address = 0;\r | |
0f700c8e | 2022 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
2023 | genre2 = 0;\r | |
2024 | #endif\r | |
6f750020 | 2025 | \r |
35213800 | 2026 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1) || IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
6f750020 | 2027 | irmp_tmp_command2 = 0;\r |
2028 | irmp_tmp_address2 = 0;\r | |
2029 | #endif\r | |
2030 | \r | |
4225a882 | 2031 | irmp_bit = 0xff;\r |
2032 | irmp_pause_time = 1; // 1st pause: set to 1, not to 0!\r | |
2033 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
2034 | rc5_cmd_bit6 = 0; // fm 2010-03-07: bugfix: reset it after incomplete RC5 frame!\r | |
2035 | #endif\r | |
2036 | }\r | |
2037 | else\r | |
2038 | {\r | |
775fabfa | 2039 | if (key_repetition_len < 0xFFFF) // avoid overflow of counter\r |
6db2522c | 2040 | {\r |
775fabfa | 2041 | key_repetition_len++;\r |
08f2dd9d | 2042 | \r |
2043 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
775fabfa | 2044 | if (denon_repetition_len < 0xFFFF) // avoid overflow of counter\r |
08f2dd9d | 2045 | {\r |
775fabfa | 2046 | denon_repetition_len++;\r |
2047 | \r | |
2048 | if (denon_repetition_len >= DENON_AUTO_REPETITION_PAUSE_LEN && last_irmp_denon_command != 0)\r | |
2049 | {\r | |
e522639e | 2050 | ANALYZE_PRINTF ("%8.3fms warning: did not receive inverted command repetition\n",\r |
775fabfa | 2051 | (double) (time_counter * 1000) / F_INTERRUPTS);\r |
2052 | last_irmp_denon_command = 0;\r | |
2053 | denon_repetition_len = 0xFFFF;\r | |
2054 | }\r | |
08f2dd9d | 2055 | }\r |
2056 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
6db2522c | 2057 | }\r |
4225a882 | 2058 | }\r |
2059 | }\r | |
2060 | }\r | |
2061 | else\r | |
2062 | {\r | |
2063 | if (wait_for_start_space) // we have received start bit...\r | |
2064 | { // ...and are counting the time of darkness\r | |
2065 | if (irmp_input) // still dark?\r | |
2066 | { // yes\r | |
2067 | irmp_pause_time++; // increment counter\r | |
2068 | \r | |
9405f84a | 2069 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
2070 | if (((irmp_pulse_time < NIKON_START_BIT_PULSE_LEN_MIN || irmp_pulse_time > NIKON_START_BIT_PULSE_LEN_MAX) && irmp_pause_time > IRMP_TIMEOUT_LEN) ||\r | |
2071 | irmp_pause_time > IRMP_TIMEOUT_NIKON_LEN)\r | |
2072 | #else\r | |
504d9df9 | 2073 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
9405f84a | 2074 | #endif\r |
4225a882 | 2075 | { // yes...\r |
c7a47e89 | 2076 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2077 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // don't show eror if JVC protocol, irmp_pulse_time has been set below!\r | |
2078 | {\r | |
2079 | ;\r | |
2080 | }\r | |
2081 | else\r | |
2082 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2083 | {\r | |
0f700c8e | 2084 | ANALYZE_PRINTF ("%8.3fms error 1: pause after start bit pulse %d too long: %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
c7a47e89 | 2085 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
2086 | }\r | |
1f54e86c | 2087 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2088 | irmp_start_bit_detected = 0; // reset flags, let's wait for another start bit\r |
2089 | irmp_pulse_time = 0;\r | |
2090 | irmp_pause_time = 0;\r | |
2091 | }\r | |
2092 | }\r | |
2093 | else\r | |
2094 | { // receiving first data pulse!\r | |
46dd89b7 | 2095 | IRMP_PARAMETER * irmp_param_p = (IRMP_PARAMETER *) 0;\r |
2096 | \r | |
6f750020 | 2097 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
2098 | irmp_param2.protocol = 0;\r | |
2099 | #endif\r | |
2100 | \r | |
0f700c8e | 2101 | ANALYZE_PRINTF ("%8.3fms [start-bit: pulse = %2d, pause = %2d]\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 2102 | \r |
2103 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
2104 | if (irmp_pulse_time >= SIRCS_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIRCS_START_BIT_PULSE_LEN_MAX &&\r | |
2105 | irmp_pause_time >= SIRCS_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIRCS_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2106 | { // it's SIRCS\r |
48664931 | 2107 | ANALYZE_PRINTF ("protocol = SIRCS, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2108 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX,\r |
2109 | SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2110 | irmp_param_p = (IRMP_PARAMETER *) (IRMP_PARAMETER *) &sircs_param;\r |
4225a882 | 2111 | }\r |
2112 | else\r | |
2113 | #endif // IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
2114 | \r | |
770a1a9d | 2115 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2116 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r | |
2117 | irmp_pulse_time >= JVC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= JVC_START_BIT_PULSE_LEN_MAX &&\r | |
2118 | irmp_pause_time >= JVC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= JVC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2119 | {\r | |
93ba2e01 | 2120 | ANALYZE_PRINTF ("protocol = NEC or JVC (type 1) repeat frame, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
770a1a9d | 2121 | JVC_START_BIT_PULSE_LEN_MIN, JVC_START_BIT_PULSE_LEN_MAX,\r |
2122 | JVC_REPEAT_START_BIT_PAUSE_LEN_MIN, JVC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
35213800 | 2123 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r |
770a1a9d | 2124 | }\r |
2125 | else\r | |
2126 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2127 | \r | |
4225a882 | 2128 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2129 | if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
46dd89b7 | 2130 | irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r |
2131 | {\r | |
35213800 | 2132 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
2133 | ANALYZE_PRINTF ("protocol = NEC42, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2134 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2135 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
2136 | irmp_param_p = (IRMP_PARAMETER *) &nec42_param;\r | |
2137 | #else\r | |
48664931 | 2138 | ANALYZE_PRINTF ("protocol = NEC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
46dd89b7 | 2139 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r |
2140 | NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX);\r | |
2141 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
35213800 | 2142 | #endif\r |
2143 | \r | |
46dd89b7 | 2144 | }\r |
2145 | else if (irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2146 | irmp_pause_time >= NEC_REPEAT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_REPEAT_START_BIT_PAUSE_LEN_MAX)\r | |
2147 | { // it's NEC\r | |
93ba2e01 | 2148 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2149 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // last protocol was JVC, awaiting repeat frame\r | |
2150 | { // some jvc remote controls use nec repetition frame for jvc repetition frame\r | |
2151 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 2, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2152 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2153 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
2154 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
2155 | }\r | |
2156 | else\r | |
2157 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2158 | {\r | |
2159 | ANALYZE_PRINTF ("protocol = NEC (repetition frame), start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2160 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2161 | NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2162 | \r |
93ba2e01 | 2163 | irmp_param_p = (IRMP_PARAMETER *) &nec_rep_param;\r |
2164 | }\r | |
2165 | }\r | |
2166 | else\r | |
2167 | \r | |
2168 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2169 | if (irmp_protocol == IRMP_JVC_PROTOCOL && // last protocol was JVC, awaiting repeat frame\r | |
2170 | irmp_pulse_time >= NEC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NEC_START_BIT_PULSE_LEN_MAX &&\r | |
2171 | irmp_pause_time >= NEC_0_PAUSE_LEN_MIN && irmp_pause_time <= NEC_0_PAUSE_LEN_MAX)\r | |
2172 | { // it's JVC repetition type 3\r | |
2173 | ANALYZE_PRINTF ("protocol = JVC repeat frame type 3, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2174 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX,\r | |
2175 | NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX);\r | |
2176 | irmp_param_p = (IRMP_PARAMETER *) &nec_param;\r | |
4225a882 | 2177 | }\r |
2178 | else\r | |
93ba2e01 | 2179 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2180 | \r | |
4225a882 | 2181 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
2182 | \r | |
b85cb27d | 2183 | #if IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r |
2184 | if (irmp_pulse_time >= TELEFUNKEN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= TELEFUNKEN_START_BIT_PULSE_LEN_MAX &&\r | |
2185 | irmp_pause_time >= TELEFUNKEN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= TELEFUNKEN_START_BIT_PAUSE_LEN_MAX)\r | |
2186 | {\r | |
2187 | ANALYZE_PRINTF ("protocol = TELEFUNKEN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2188 | TELEFUNKEN_START_BIT_PULSE_LEN_MIN, TELEFUNKEN_START_BIT_PULSE_LEN_MAX,\r | |
2189 | TELEFUNKEN_START_BIT_PAUSE_LEN_MIN, TELEFUNKEN_START_BIT_PAUSE_LEN_MAX);\r | |
2190 | irmp_param_p = (IRMP_PARAMETER *) &telefunken_param;\r | |
2191 | }\r | |
2192 | else\r | |
2193 | #endif // IRMP_SUPPORT_TELEFUNKEN_PROTOCOL == 1\r | |
2194 | \r | |
40ca4604 | 2195 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2196 | if (irmp_pulse_time >= ROOMBA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_START_BIT_PULSE_LEN_MAX &&\r | |
2197 | irmp_pause_time >= ROOMBA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ROOMBA_START_BIT_PAUSE_LEN_MAX)\r | |
2198 | {\r | |
2199 | ANALYZE_PRINTF ("protocol = ROOMBA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2200 | ROOMBA_START_BIT_PULSE_LEN_MIN, ROOMBA_START_BIT_PULSE_LEN_MAX,\r | |
2201 | ROOMBA_START_BIT_PAUSE_LEN_MIN, ROOMBA_START_BIT_PAUSE_LEN_MAX);\r | |
2202 | irmp_param_p = (IRMP_PARAMETER *) &roomba_param;\r | |
2203 | }\r | |
2204 | else\r | |
2205 | #endif // IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r | |
2206 | \r | |
9405f84a | 2207 | #if IRMP_SUPPORT_NIKON_PROTOCOL == 1\r |
2208 | if (irmp_pulse_time >= NIKON_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NIKON_START_BIT_PULSE_LEN_MAX &&\r | |
2209 | irmp_pause_time >= NIKON_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NIKON_START_BIT_PAUSE_LEN_MAX)\r | |
2210 | {\r | |
2211 | ANALYZE_PRINTF ("protocol = NIKON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2212 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX,\r | |
2213 | NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX);\r | |
2214 | irmp_param_p = (IRMP_PARAMETER *) &nikon_param;\r | |
2215 | }\r | |
2216 | else\r | |
2217 | #endif // IRMP_SUPPORT_NIKON_PROTOCOL == 1\r | |
2218 | \r | |
4225a882 | 2219 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
2220 | if (irmp_pulse_time >= SAMSUNG_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_START_BIT_PULSE_LEN_MAX &&\r | |
2221 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2222 | { // it's SAMSUNG\r |
48664931 | 2223 | ANALYZE_PRINTF ("protocol = SAMSUNG, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2224 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX,\r |
2225 | SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2226 | irmp_param_p = (IRMP_PARAMETER *) &samsung_param;\r |
4225a882 | 2227 | }\r |
2228 | else\r | |
2229 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
2230 | \r | |
2231 | #if IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
2232 | if (irmp_pulse_time >= MATSUSHITA_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= MATSUSHITA_START_BIT_PULSE_LEN_MAX &&\r | |
2233 | irmp_pause_time >= MATSUSHITA_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= MATSUSHITA_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2234 | { // it's MATSUSHITA\r |
48664931 | 2235 | ANALYZE_PRINTF ("protocol = MATSUSHITA, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2236 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX,\r |
2237 | MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2238 | irmp_param_p = (IRMP_PARAMETER *) &matsushita_param;\r |
4225a882 | 2239 | }\r |
2240 | else\r | |
2241 | #endif // IRMP_SUPPORT_MATSUSHITA_PROTOCOL == 1\r | |
2242 | \r | |
2243 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
2244 | if (irmp_pulse_time >= KASEIKYO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KASEIKYO_START_BIT_PULSE_LEN_MAX &&\r | |
2245 | irmp_pause_time >= KASEIKYO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KASEIKYO_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2246 | { // it's KASEIKYO\r |
48664931 | 2247 | ANALYZE_PRINTF ("protocol = KASEIKYO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2248 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX,\r |
2249 | KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2250 | irmp_param_p = (IRMP_PARAMETER *) &kaseikyo_param;\r |
4225a882 | 2251 | }\r |
2252 | else\r | |
2253 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
2254 | \r | |
2255 | #if IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
2256 | if (irmp_pulse_time >= RECS80_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80_START_BIT_PULSE_LEN_MAX &&\r | |
2257 | irmp_pause_time >= RECS80_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2258 | { // it's RECS80\r |
48664931 | 2259 | ANALYZE_PRINTF ("protocol = RECS80, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2260 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX,\r |
2261 | RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2262 | irmp_param_p = (IRMP_PARAMETER *) &recs80_param;\r |
4225a882 | 2263 | }\r |
2264 | else\r | |
2265 | #endif // IRMP_SUPPORT_RECS80_PROTOCOL == 1\r | |
2266 | \r | |
2267 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
31c1f035 | 2268 | if (((irmp_pulse_time >= RC5_START_BIT_LEN_MIN && irmp_pulse_time <= RC5_START_BIT_LEN_MAX) ||\r |
2269 | (irmp_pulse_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX)) &&\r | |
2270 | ((irmp_pause_time >= RC5_START_BIT_LEN_MIN && irmp_pause_time <= RC5_START_BIT_LEN_MAX) ||\r | |
2271 | (irmp_pause_time >= 2 * RC5_START_BIT_LEN_MIN && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX)))\r | |
46dd89b7 | 2272 | { // it's RC5\r |
6f750020 | 2273 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
2274 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
2275 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
2276 | {\r | |
2277 | ANALYZE_PRINTF ("protocol = RC5 or FDC\n");\r | |
2278 | ANALYZE_PRINTF ("FDC start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2279 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
2280 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
2281 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2282 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2283 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
2284 | memcpy_P (&irmp_param2, &fdc_param, sizeof (IRMP_PARAMETER));\r | |
2285 | }\r | |
2286 | else\r | |
2287 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
12948cf3 | 2288 | \r |
6f750020 | 2289 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
2290 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2291 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2292 | {\r | |
2293 | ANALYZE_PRINTF ("protocol = RC5 or RCCAR\n");\r | |
2294 | ANALYZE_PRINTF ("RCCAR start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2295 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r | |
2296 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2297 | ANALYZE_PRINTF ("RC5 start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2298 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
2299 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX);\r | |
2300 | memcpy_P (&irmp_param2, &rccar_param, sizeof (IRMP_PARAMETER));\r | |
2301 | }\r | |
2302 | else\r | |
2303 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
2304 | {\r | |
1aee56bc | 2305 | ANALYZE_PRINTF ("protocol = RC5, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or pulse: %3d - %3d, pause: %3d - %3d\n",\r |
6f750020 | 2306 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r |
31c1f035 | 2307 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX,\r |
1aee56bc | 2308 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r |
31c1f035 | 2309 | 2 * RC5_START_BIT_LEN_MIN, 2 * RC5_START_BIT_LEN_MAX);\r |
6f750020 | 2310 | }\r |
2311 | \r | |
46dd89b7 | 2312 | irmp_param_p = (IRMP_PARAMETER *) &rc5_param;\r |
504d9df9 | 2313 | last_pause = irmp_pause_time;\r |
4225a882 | 2314 | \r |
31c1f035 | 2315 | if ((irmp_pulse_time > RC5_START_BIT_LEN_MAX && irmp_pulse_time <= 2 * RC5_START_BIT_LEN_MAX) ||\r |
2316 | (irmp_pause_time > RC5_START_BIT_LEN_MAX && irmp_pause_time <= 2 * RC5_START_BIT_LEN_MAX))\r | |
4225a882 | 2317 | {\r |
504d9df9 | 2318 | last_value = 0;\r |
4225a882 | 2319 | rc5_cmd_bit6 = 1<<6;\r |
2320 | }\r | |
2321 | else\r | |
2322 | {\r | |
504d9df9 | 2323 | last_value = 1;\r |
4225a882 | 2324 | }\r |
2325 | }\r | |
2326 | else\r | |
2327 | #endif // IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
2328 | \r | |
2329 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2330 | if ( (irmp_pulse_time >= DENON_PULSE_LEN_MIN && irmp_pulse_time <= DENON_PULSE_LEN_MAX) &&\r | |
2331 | ((irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX) ||\r | |
2332 | (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)))\r | |
2333 | { // it's DENON\r | |
48664931 | 2334 | ANALYZE_PRINTF ("protocol = DENON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r |
4225a882 | 2335 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r |
2336 | DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX,\r | |
2337 | DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2338 | irmp_param_p = (IRMP_PARAMETER *) &denon_param;\r |
4225a882 | 2339 | }\r |
2340 | else\r | |
2341 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
2342 | \r | |
beda975f | 2343 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
2344 | if ( (irmp_pulse_time >= THOMSON_PULSE_LEN_MIN && irmp_pulse_time <= THOMSON_PULSE_LEN_MAX) &&\r | |
2345 | ((irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX) ||\r | |
2346 | (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)))\r | |
2347 | { // it's THOMSON\r | |
2348 | ANALYZE_PRINTF ("protocol = THOMSON, start bit timings: pulse: %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2349 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
2350 | THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX,\r | |
2351 | THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX);\r | |
2352 | irmp_param_p = (IRMP_PARAMETER *) &thomson_param;\r | |
2353 | }\r | |
2354 | else\r | |
2355 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r | |
2356 | \r | |
3a7e26e1 | 2357 | #if IRMP_SUPPORT_BOSE_PROTOCOL == 1\r |
2358 | if (irmp_pulse_time >= BOSE_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= BOSE_START_BIT_PULSE_LEN_MAX &&\r | |
2359 | irmp_pause_time >= BOSE_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BOSE_START_BIT_PAUSE_LEN_MAX)\r | |
2360 | {\r | |
2361 | ANALYZE_PRINTF ("protocol = BOSE, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2362 | BOSE_START_BIT_PULSE_LEN_MIN, BOSE_START_BIT_PULSE_LEN_MAX,\r | |
2363 | BOSE_START_BIT_PAUSE_LEN_MIN, BOSE_START_BIT_PAUSE_LEN_MAX);\r | |
2364 | irmp_param_p = (IRMP_PARAMETER *) &bose_param;\r | |
2365 | }\r | |
2366 | else\r | |
2367 | #endif // IRMP_SUPPORT_BOSE_PROTOCOL == 1\r | |
2368 | \r | |
4225a882 | 2369 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
2370 | if (irmp_pulse_time >= RC6_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RC6_START_BIT_PULSE_LEN_MAX &&\r | |
2371 | irmp_pause_time >= RC6_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RC6_START_BIT_PAUSE_LEN_MAX)\r | |
2372 | { // it's RC6\r | |
48664931 | 2373 | ANALYZE_PRINTF ("protocol = RC6, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2374 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX,\r |
2375 | RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2376 | irmp_param_p = (IRMP_PARAMETER *) &rc6_param;\r |
504d9df9 | 2377 | last_pause = 0;\r |
c7a47e89 | 2378 | last_value = 1;\r |
4225a882 | 2379 | }\r |
2380 | else\r | |
2381 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2382 | \r | |
2383 | #if IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2384 | if (irmp_pulse_time >= RECS80EXT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RECS80EXT_START_BIT_PULSE_LEN_MAX &&\r | |
2385 | irmp_pause_time >= RECS80EXT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RECS80EXT_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2386 | { // it's RECS80EXT\r |
48664931 | 2387 | ANALYZE_PRINTF ("protocol = RECS80EXT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2388 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX,\r |
2389 | RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2390 | irmp_param_p = (IRMP_PARAMETER *) &recs80ext_param;\r |
4225a882 | 2391 | }\r |
2392 | else\r | |
2393 | #endif // IRMP_SUPPORT_RECS80EXT_PROTOCOL == 1\r | |
2394 | \r | |
2395 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2396 | if (irmp_pulse_time >= NUBERT_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NUBERT_START_BIT_PULSE_LEN_MAX &&\r | |
2397 | irmp_pause_time >= NUBERT_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NUBERT_START_BIT_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2398 | { // it's NUBERT\r |
48664931 | 2399 | ANALYZE_PRINTF ("protocol = NUBERT, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
4225a882 | 2400 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX,\r |
2401 | NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2402 | irmp_param_p = (IRMP_PARAMETER *) &nubert_param;\r |
4225a882 | 2403 | }\r |
2404 | else\r | |
2405 | #endif // IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
2406 | \r | |
504d9df9 | 2407 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
2408 | if (irmp_pulse_time >= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX &&\r | |
2409 | irmp_pause_time >= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX)\r | |
46dd89b7 | 2410 | { // it's BANG_OLUFSEN\r |
48664931 | 2411 | ANALYZE_PRINTF ("protocol = BANG_OLUFSEN\n");\r |
2412 | ANALYZE_PRINTF ("start bit 1 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
504d9df9 | 2413 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r |
2414 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
48664931 | 2415 | ANALYZE_PRINTF ("start bit 2 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2416 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r |
2417 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
48664931 | 2418 | ANALYZE_PRINTF ("start bit 3 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2419 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r |
2420 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
48664931 | 2421 | ANALYZE_PRINTF ("start bit 4 timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
504d9df9 | 2422 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r |
2423 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
46dd89b7 | 2424 | irmp_param_p = (IRMP_PARAMETER *) &bang_olufsen_param;\r |
504d9df9 | 2425 | last_value = 0;\r |
2426 | }\r | |
2427 | else\r | |
2428 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r | |
2429 | \r | |
89e8cafb | 2430 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
2431 | if (irmp_pulse_time >= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN && irmp_pulse_time <= GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX &&\r | |
2432 | irmp_pause_time >= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN && irmp_pause_time <= GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX)\r | |
592411d1 | 2433 | { // it's GRUNDIG\r |
48664931 | 2434 | ANALYZE_PRINTF ("protocol = GRUNDIG, pre bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
89e8cafb | 2435 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r |
2436 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX);\r | |
592411d1 | 2437 | irmp_param_p = (IRMP_PARAMETER *) &grundig_param;\r |
2438 | last_pause = irmp_pause_time;\r | |
2439 | last_value = 1;\r | |
2440 | }\r | |
2441 | else\r | |
89e8cafb | 2442 | #endif // IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
592411d1 | 2443 | \r |
12948cf3 | 2444 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2445 | if (((irmp_pulse_time >= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX) ||\r | |
31c1f035 | 2446 | (irmp_pulse_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX)) &&\r |
fc80d688 | 2447 | ((irmp_pause_time >= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX) || \r |
31c1f035 | 2448 | (irmp_pause_time >= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX)))\r |
12948cf3 | 2449 | { // it's RUWIDO or SIEMENS\r |
2450 | ANALYZE_PRINTF ("protocol = RUWIDO, start bit timings: pulse: %3d - %3d or %3d - %3d, pause: %3d - %3d or %3d - %3d\n",\r | |
2451 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
31c1f035 | 2452 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r |
12948cf3 | 2453 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r |
31c1f035 | 2454 | 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX);\r |
12948cf3 | 2455 | irmp_param_p = (IRMP_PARAMETER *) &ruwido_param;\r |
a7054daf | 2456 | last_pause = irmp_pause_time;\r |
2457 | last_value = 1;\r | |
2458 | }\r | |
2459 | else\r | |
12948cf3 | 2460 | #endif // IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2461 | \r | |
48664931 | 2462 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
2463 | if (irmp_pulse_time >= FDC_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= FDC_START_BIT_PULSE_LEN_MAX &&\r | |
2464 | irmp_pause_time >= FDC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= FDC_START_BIT_PAUSE_LEN_MAX)\r | |
eaaf80c3 | 2465 | {\r |
48664931 | 2466 | ANALYZE_PRINTF ("protocol = FDC, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
2467 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX,\r | |
2468 | FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX);\r | |
2469 | irmp_param_p = (IRMP_PARAMETER *) &fdc_param;\r | |
eaaf80c3 | 2470 | }\r |
2471 | else\r | |
48664931 | 2472 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r |
12948cf3 | 2473 | \r |
9e16d699 | 2474 | #if IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r |
2475 | if (irmp_pulse_time >= RCCAR_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_START_BIT_PULSE_LEN_MAX &&\r | |
2476 | irmp_pause_time >= RCCAR_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_START_BIT_PAUSE_LEN_MAX)\r | |
2477 | {\r | |
48664931 | 2478 | ANALYZE_PRINTF ("protocol = RCCAR, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r |
9e16d699 | 2479 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX,\r |
2480 | RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX);\r | |
2481 | irmp_param_p = (IRMP_PARAMETER *) &rccar_param;\r | |
2482 | }\r | |
2483 | else\r | |
2484 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
89e8cafb | 2485 | \r |
111d6191 | 2486 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r |
2487 | if (irmp_pulse_time >= KATHREIN_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_START_BIT_PULSE_LEN_MAX &&\r | |
2488 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)\r | |
2489 | { // it's KATHREIN\r | |
2490 | ANALYZE_PRINTF ("protocol = KATHREIN, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2491 | KATHREIN_START_BIT_PULSE_LEN_MIN, KATHREIN_START_BIT_PULSE_LEN_MAX,\r | |
2492 | KATHREIN_START_BIT_PAUSE_LEN_MIN, KATHREIN_START_BIT_PAUSE_LEN_MAX);\r | |
2493 | irmp_param_p = (IRMP_PARAMETER *) &kathrein_param;\r | |
2494 | }\r | |
2495 | else\r | |
2496 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL == 1\r | |
2497 | \r | |
deba2a0a | 2498 | #if IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r |
2499 | if (irmp_pulse_time >= NETBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= NETBOX_START_BIT_PULSE_LEN_MAX &&\r | |
2500 | irmp_pause_time >= NETBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NETBOX_START_BIT_PAUSE_LEN_MAX)\r | |
2501 | { // it's NETBOX\r | |
2502 | ANALYZE_PRINTF ("protocol = NETBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2503 | NETBOX_START_BIT_PULSE_LEN_MIN, NETBOX_START_BIT_PULSE_LEN_MAX,\r | |
2504 | NETBOX_START_BIT_PAUSE_LEN_MIN, NETBOX_START_BIT_PAUSE_LEN_MAX);\r | |
2505 | irmp_param_p = (IRMP_PARAMETER *) &netbox_param;\r | |
2506 | }\r | |
2507 | else\r | |
2508 | #endif // IRMP_SUPPORT_NETBOX_PROTOCOL == 1\r | |
2509 | \r | |
f50e01e7 | 2510 | #if IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
2511 | if (irmp_pulse_time >= LEGO_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= LEGO_START_BIT_PULSE_LEN_MAX &&\r | |
2512 | irmp_pause_time >= LEGO_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= LEGO_START_BIT_PAUSE_LEN_MAX)\r | |
2513 | {\r | |
2514 | ANALYZE_PRINTF ("protocol = LEGO, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2515 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX,\r | |
2516 | LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX);\r | |
2517 | irmp_param_p = (IRMP_PARAMETER *) &lego_param;\r | |
2518 | }\r | |
2519 | else\r | |
93ba2e01 | 2520 | #endif // IRMP_SUPPORT_LEGO_PROTOCOL == 1\r |
f50e01e7 | 2521 | \r |
2fb27bfe | 2522 | #if IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
2523 | if (irmp_pulse_time >= A1TVBOX_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= A1TVBOX_START_BIT_PULSE_LEN_MAX &&\r | |
2524 | irmp_pause_time >= A1TVBOX_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= A1TVBOX_START_BIT_PAUSE_LEN_MAX)\r | |
2525 | { // it's A1TVBOX\r | |
2526 | ANALYZE_PRINTF ("protocol = A1TVBOX, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2527 | A1TVBOX_START_BIT_PULSE_LEN_MIN, A1TVBOX_START_BIT_PULSE_LEN_MAX,\r | |
2528 | A1TVBOX_START_BIT_PAUSE_LEN_MIN, A1TVBOX_START_BIT_PAUSE_LEN_MAX);\r | |
2529 | irmp_param_p = (IRMP_PARAMETER *) &a1tvbox_param;\r | |
2530 | last_pause = 0;\r | |
2531 | last_value = 1;\r | |
2532 | }\r | |
2533 | else\r | |
b85cb27d | 2534 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r |
2535 | \r | |
2536 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
2537 | if (irmp_pulse_time >= ORTEK_START_BIT_PULSE_LEN_MIN && irmp_pulse_time <= ORTEK_START_BIT_PULSE_LEN_MAX &&\r | |
2538 | irmp_pause_time >= ORTEK_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= ORTEK_START_BIT_PAUSE_LEN_MAX)\r | |
2539 | { // it's ORTEK (Hama)\r | |
2540 | ANALYZE_PRINTF ("protocol = ORTEK, start bit timings: pulse: %3d - %3d, pause: %3d - %3d\n",\r | |
2541 | ORTEK_START_BIT_PULSE_LEN_MIN, ORTEK_START_BIT_PULSE_LEN_MAX,\r | |
2542 | ORTEK_START_BIT_PAUSE_LEN_MIN, ORTEK_START_BIT_PAUSE_LEN_MAX);\r | |
2543 | irmp_param_p = (IRMP_PARAMETER *) &ortek_param;\r | |
40ca4604 | 2544 | last_pause = 0;\r |
2545 | last_value = 1;\r | |
2546 | parity = 0;\r | |
b85cb27d | 2547 | }\r |
2548 | else\r | |
2549 | #endif // IRMP_SUPPORT_A1TVBOX_PROTOCOL == 1\r | |
2fb27bfe | 2550 | \r |
4225a882 | 2551 | {\r |
48664931 | 2552 | ANALYZE_PRINTF ("protocol = UNKNOWN\n");\r |
1f54e86c | 2553 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2554 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
2555 | }\r | |
2556 | \r | |
2557 | if (irmp_start_bit_detected)\r | |
2558 | {\r | |
46dd89b7 | 2559 | memcpy_P (&irmp_param, irmp_param_p, sizeof (IRMP_PARAMETER));\r |
2560 | \r | |
48664931 | 2561 | #ifdef ANALYZE\r |
77f488bb | 2562 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
2563 | {\r | |
48664931 | 2564 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max);\r |
2565 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max);\r | |
77f488bb | 2566 | }\r |
2567 | else\r | |
2568 | {\r | |
48664931 | 2569 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_1_len_min, irmp_param.pulse_1_len_max,\r |
31c1f035 | 2570 | 2 * irmp_param.pulse_1_len_min, 2 * irmp_param.pulse_1_len_max);\r |
48664931 | 2571 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_1_len_min, irmp_param.pause_1_len_max,\r |
31c1f035 | 2572 | 2 * irmp_param.pause_1_len_min, 2 * irmp_param.pause_1_len_max);\r |
77f488bb | 2573 | }\r |
46dd89b7 | 2574 | \r |
6f750020 | 2575 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
2576 | if (irmp_param2.protocol)\r | |
2577 | {\r | |
2578 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param2.pulse_0_len_min, irmp_param2.pulse_0_len_max);\r | |
2579 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param2.pause_0_len_min, irmp_param2.pause_0_len_max);\r | |
2580 | ANALYZE_PRINTF ("pulse_1: %3d - %3d\n", irmp_param2.pulse_1_len_min, irmp_param2.pulse_1_len_max);\r | |
2581 | ANALYZE_PRINTF ("pause_1: %3d - %3d\n", irmp_param2.pause_1_len_min, irmp_param2.pause_1_len_max);\r | |
2582 | }\r | |
2583 | #endif\r | |
2584 | \r | |
d823e852 | 2585 | \r |
504d9df9 | 2586 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
4225a882 | 2587 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL)\r |
2588 | {\r | |
48664931 | 2589 | ANALYZE_PRINTF ("pulse_toggle: %3d - %3d\n", RC6_TOGGLE_BIT_LEN_MIN, RC6_TOGGLE_BIT_LEN_MAX);\r |
4225a882 | 2590 | }\r |
504d9df9 | 2591 | #endif\r |
77f488bb | 2592 | \r |
2593 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r | |
2594 | {\r | |
93ba2e01 | 2595 | ANALYZE_PRINTF ("pulse_0: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
2596 | ANALYZE_PRINTF ("pause_0: %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max);\r | |
2597 | }\r | |
2598 | else\r | |
2599 | {\r | |
2600 | ANALYZE_PRINTF ("pulse: %3d - %3d or %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max,\r | |
2601 | 2 * irmp_param.pulse_0_len_min, 2 * irmp_param.pulse_0_len_max);\r | |
2602 | ANALYZE_PRINTF ("pause: %3d - %3d or %3d - %3d\n", irmp_param.pause_0_len_min, irmp_param.pause_0_len_max,\r | |
2603 | 2 * irmp_param.pause_0_len_min, 2 * irmp_param.pause_0_len_max);\r | |
77f488bb | 2604 | }\r |
46dd89b7 | 2605 | \r |
504d9df9 | 2606 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
2607 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
2608 | {\r | |
48664931 | 2609 | ANALYZE_PRINTF ("pulse_r: %3d - %3d\n", irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r |
2610 | ANALYZE_PRINTF ("pause_r: %3d - %3d\n", BANG_OLUFSEN_R_PAUSE_LEN_MIN, BANG_OLUFSEN_R_PAUSE_LEN_MAX);\r | |
504d9df9 | 2611 | }\r |
2612 | #endif\r | |
2613 | \r | |
48664931 | 2614 | ANALYZE_PRINTF ("command_offset: %2d\n", irmp_param.command_offset);\r |
2615 | ANALYZE_PRINTF ("command_len: %3d\n", irmp_param.command_end - irmp_param.command_offset);\r | |
2616 | ANALYZE_PRINTF ("complete_len: %3d\n", irmp_param.complete_len);\r | |
2617 | ANALYZE_PRINTF ("stop_bit: %3d\n", irmp_param.stop_bit);\r | |
2618 | #endif // ANALYZE\r | |
4225a882 | 2619 | }\r |
2620 | \r | |
2621 | irmp_bit = 0;\r | |
2622 | \r | |
77f488bb | 2623 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
12948cf3 | 2624 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r |
2625 | irmp_param.protocol != IRMP_RUWIDO_PROTOCOL && // Manchester, but not RUWIDO\r | |
2626 | irmp_param.protocol != IRMP_RC6_PROTOCOL) // Manchester, but not RC6\r | |
4225a882 | 2627 | {\r |
31c1f035 | 2628 | if (irmp_pause_time > irmp_param.pulse_1_len_max && irmp_pause_time <= 2 * irmp_param.pulse_1_len_max)\r |
4225a882 | 2629 | {\r |
0f700c8e | 2630 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
48664931 | 2631 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r |
2632 | ANALYZE_NEWLINE ();\r | |
77f488bb | 2633 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1);\r |
592411d1 | 2634 | }\r |
6f750020 | 2635 | else if (! last_value) // && irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r |
592411d1 | 2636 | {\r |
0f700c8e | 2637 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
592411d1 | 2638 | \r |
48664931 | 2639 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r |
2640 | ANALYZE_NEWLINE ();\r | |
77f488bb | 2641 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0);\r |
a7054daf | 2642 | }\r |
2643 | }\r | |
2644 | else\r | |
77f488bb | 2645 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
a7054daf | 2646 | \r |
deba2a0a | 2647 | #if IRMP_SUPPORT_SERIAL == 1\r |
2648 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
2649 | {\r | |
2650 | ; // do nothing\r | |
2651 | }\r | |
2652 | else\r | |
2653 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
2654 | \r | |
2655 | \r | |
4225a882 | 2656 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
2657 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
2658 | {\r | |
0f700c8e | 2659 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 2660 | \r |
2661 | if (irmp_pause_time >= DENON_1_PAUSE_LEN_MIN && irmp_pause_time <= DENON_1_PAUSE_LEN_MAX)\r | |
2662 | { // pause timings correct for "1"?\r | |
48664931 | 2663 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r |
2664 | ANALYZE_NEWLINE ();\r | |
4225a882 | 2665 | irmp_store_bit (1);\r |
2666 | }\r | |
2667 | else // if (irmp_pause_time >= DENON_0_PAUSE_LEN_MIN && irmp_pause_time <= DENON_0_PAUSE_LEN_MAX)\r | |
2668 | { // pause timings correct for "0"?\r | |
48664931 | 2669 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r |
2670 | ANALYZE_NEWLINE ();\r | |
4225a882 | 2671 | irmp_store_bit (0);\r |
2672 | }\r | |
2673 | }\r | |
881dbf79 | 2674 | else\r |
4225a882 | 2675 | #endif // IRMP_SUPPORT_DENON_PROTOCOL == 1\r |
beda975f | 2676 | #if IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r |
2677 | if (irmp_param.protocol == IRMP_THOMSON_PROTOCOL)\r | |
2678 | {\r | |
0f700c8e | 2679 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
beda975f | 2680 | \r |
2681 | if (irmp_pause_time >= THOMSON_1_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_1_PAUSE_LEN_MAX)\r | |
2682 | { // pause timings correct for "1"?\r | |
2683 | ANALYZE_PUTCHAR ('1'); // yes, store 1\r | |
2684 | ANALYZE_NEWLINE ();\r | |
2685 | irmp_store_bit (1);\r | |
2686 | }\r | |
2687 | else // if (irmp_pause_time >= THOMSON_0_PAUSE_LEN_MIN && irmp_pause_time <= THOMSON_0_PAUSE_LEN_MAX)\r | |
2688 | { // pause timings correct for "0"?\r | |
2689 | ANALYZE_PUTCHAR ('0'); // yes, store 0\r | |
2690 | ANALYZE_NEWLINE ();\r | |
2691 | irmp_store_bit (0);\r | |
2692 | }\r | |
2693 | }\r | |
2694 | else\r | |
2695 | #endif // IRMP_SUPPORT_THOMSON_PROTOCOL == 1\r | |
881dbf79 | 2696 | {\r |
2697 | ; // else do nothing\r | |
2698 | }\r | |
4225a882 | 2699 | \r |
2700 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
2701 | irmp_pause_time = 0;\r | |
2702 | wait_for_start_space = 0;\r | |
2703 | }\r | |
2704 | }\r | |
2705 | else if (wait_for_space) // the data section....\r | |
2706 | { // counting the time of darkness....\r | |
2707 | uint8_t got_light = FALSE;\r | |
2708 | \r | |
2709 | if (irmp_input) // still dark?\r | |
2710 | { // yes...\r | |
2711 | if (irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 1)\r | |
2712 | {\r | |
a42d1ee6 | 2713 | if (\r |
2714 | #if IRMP_SUPPORT_MANCHESTER == 1\r | |
2715 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) ||\r | |
2716 | #endif\r | |
2717 | #if IRMP_SUPPORT_SERIAL == 1\r | |
deba2a0a | 2718 | (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) ||\r |
a42d1ee6 | 2719 | #endif\r |
1aee56bc | 2720 | (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max))\r |
4225a882 | 2721 | {\r |
48664931 | 2722 | #ifdef ANALYZE\r |
77f488bb | 2723 | if (! (irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER))\r |
4225a882 | 2724 | {\r |
48664931 | 2725 | ANALYZE_PRINTF ("stop bit detected\n");\r |
4225a882 | 2726 | }\r |
2727 | #endif\r | |
2728 | irmp_param.stop_bit = 0;\r | |
2729 | }\r | |
2730 | else\r | |
2731 | {\r | |
93ba2e01 | 2732 | ANALYZE_PRINTF ("error: stop bit timing wrong, irmp_bit = %d, irmp_pulse_time = %d, pulse_0_len_min = %d, pulse_0_len_max = %d\n",\r |
2733 | irmp_bit, irmp_pulse_time, irmp_param.pulse_0_len_min, irmp_param.pulse_0_len_max);\r | |
4225a882 | 2734 | \r |
1f54e86c | 2735 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2736 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
2737 | irmp_pulse_time = 0;\r | |
2738 | irmp_pause_time = 0;\r | |
2739 | }\r | |
2740 | }\r | |
2741 | else\r | |
2742 | {\r | |
9547ee89 | 2743 | irmp_pause_time++; // increment counter\r |
4225a882 | 2744 | \r |
2745 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
9547ee89 | 2746 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && // Sony has a variable number of bits:\r |
2747 | irmp_pause_time > SIRCS_PAUSE_LEN_MAX && // minimum is 12\r | |
2748 | irmp_bit >= 12 - 1) // pause too long?\r | |
2749 | { // yes, break and close this frame\r | |
2750 | irmp_param.complete_len = irmp_bit + 1; // set new complete length\r | |
2751 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2752 | irmp_tmp_address |= (irmp_bit - SIRCS_MINIMUM_DATA_LEN + 1) << 8; // new: store number of additional bits in upper byte of address!\r | |
2753 | irmp_param.command_end = irmp_param.command_offset + irmp_bit + 1; // correct command length\r | |
2754 | irmp_pause_time = SIRCS_PAUSE_LEN_MAX - 1; // correct pause length\r | |
4225a882 | 2755 | }\r |
2756 | else\r | |
2757 | #endif\r | |
deba2a0a | 2758 | #if IRMP_SUPPORT_SERIAL == 1\r |
a42d1ee6 | 2759 | // NETBOX generates no stop bit, here is the timeout condition:\r |
deba2a0a | 2760 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL) && irmp_param.protocol == IRMP_NETBOX_PROTOCOL &&\r |
a42d1ee6 | 2761 | irmp_pause_time >= NETBOX_PULSE_LEN * (NETBOX_COMPLETE_DATA_LEN - irmp_bit))\r |
deba2a0a | 2762 | {\r |
2763 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2764 | }\r | |
2765 | else\r | |
2766 | #endif\r | |
89e8cafb | 2767 | #if IRMP_SUPPORT_GRUNDIG_NOKIA_IR60_PROTOCOL == 1\r |
77f488bb | 2768 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && !irmp_param.stop_bit)\r |
d155e9ab | 2769 | {\r |
f60c4644 | 2770 | if (irmp_pause_time > IR60_TIMEOUT_LEN && (irmp_bit == 5 || irmp_bit == 6))\r |
89e8cafb | 2771 | {\r |
2772 | ANALYZE_PRINTF ("Switching to IR60 protocol\n");\r | |
2773 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2774 | irmp_param.stop_bit = TRUE; // set flag\r | |
2775 | \r | |
2776 | irmp_param.protocol = IRMP_IR60_PROTOCOL; // change protocol\r | |
2777 | irmp_param.complete_len = IR60_COMPLETE_DATA_LEN; // correct complete len\r | |
2778 | irmp_param.address_offset = IR60_ADDRESS_OFFSET;\r | |
2779 | irmp_param.address_end = IR60_ADDRESS_OFFSET + IR60_ADDRESS_LEN;\r | |
2780 | irmp_param.command_offset = IR60_COMMAND_OFFSET;\r | |
2781 | irmp_param.command_end = IR60_COMMAND_OFFSET + IR60_COMMAND_LEN;\r | |
2782 | \r | |
2783 | irmp_tmp_command <<= 1;\r | |
2784 | irmp_tmp_command |= first_bit;\r | |
2785 | }\r | |
31c1f035 | 2786 | else if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN - 2)\r |
77f488bb | 2787 | { // special manchester decoder\r |
2788 | irmp_param.complete_len = GRUNDIG_COMPLETE_DATA_LEN; // correct complete len\r | |
2789 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2790 | irmp_param.stop_bit = TRUE; // set flag\r | |
2791 | }\r | |
2792 | else if (irmp_bit >= GRUNDIG_COMPLETE_DATA_LEN)\r | |
d155e9ab | 2793 | {\r |
48664931 | 2794 | ANALYZE_PRINTF ("Switching to NOKIA protocol\n");\r |
77f488bb | 2795 | irmp_param.protocol = IRMP_NOKIA_PROTOCOL; // change protocol\r |
2796 | irmp_param.address_offset = NOKIA_ADDRESS_OFFSET;\r | |
2797 | irmp_param.address_end = NOKIA_ADDRESS_OFFSET + NOKIA_ADDRESS_LEN;\r | |
2798 | irmp_param.command_offset = NOKIA_COMMAND_OFFSET;\r | |
2799 | irmp_param.command_end = NOKIA_COMMAND_OFFSET + NOKIA_COMMAND_LEN;\r | |
2800 | \r | |
2801 | if (irmp_tmp_command & 0x300)\r | |
2802 | {\r | |
2803 | irmp_tmp_address = (irmp_tmp_command >> 8);\r | |
2804 | irmp_tmp_command &= 0xFF;\r | |
2805 | }\r | |
d155e9ab | 2806 | }\r |
2807 | }\r | |
2808 | else\r | |
2809 | #endif\r | |
12948cf3 | 2810 | #if IRMP_SUPPORT_SIEMENS_OR_RUWIDO_PROTOCOL == 1\r |
2811 | if (irmp_param.protocol == IRMP_RUWIDO_PROTOCOL && !irmp_param.stop_bit)\r | |
2812 | {\r | |
31c1f035 | 2813 | if (irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= RUWIDO_COMPLETE_DATA_LEN - 2)\r |
12948cf3 | 2814 | { // special manchester decoder\r |
2815 | irmp_param.complete_len = RUWIDO_COMPLETE_DATA_LEN; // correct complete len\r | |
2816 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r | |
2817 | irmp_param.stop_bit = TRUE; // set flag\r | |
2818 | }\r | |
2819 | else if (irmp_bit >= RUWIDO_COMPLETE_DATA_LEN)\r | |
2820 | {\r | |
2821 | ANALYZE_PRINTF ("Switching to SIEMENS protocol\n");\r | |
2822 | irmp_param.protocol = IRMP_SIEMENS_PROTOCOL; // change protocol\r | |
2823 | irmp_param.address_offset = SIEMENS_ADDRESS_OFFSET;\r | |
2824 | irmp_param.address_end = SIEMENS_ADDRESS_OFFSET + SIEMENS_ADDRESS_LEN;\r | |
2825 | irmp_param.command_offset = SIEMENS_COMMAND_OFFSET;\r | |
2826 | irmp_param.command_end = SIEMENS_COMMAND_OFFSET + SIEMENS_COMMAND_LEN;\r | |
2827 | \r | |
2828 | // 76543210\r | |
2829 | // RUWIDO: AAAAAAAAACCCCCCCp\r | |
2830 | // SIEMENS: AAAAAAAAAAACCCCCCCCCCp\r | |
2831 | irmp_tmp_address <<= 2;\r | |
2832 | irmp_tmp_address |= (irmp_tmp_command >> 6);\r | |
2833 | irmp_tmp_command &= 0x003F;\r | |
2834 | irmp_tmp_command <<= 4;\r | |
2835 | irmp_tmp_command |= last_value;\r | |
2836 | }\r | |
2837 | }\r | |
2838 | else\r | |
2839 | #endif\r | |
40ca4604 | 2840 | #if IRMP_SUPPORT_ROOMBA_PROTOCOL == 1\r |
2841 | if (irmp_param.protocol == IRMP_ROOMBA_PROTOCOL && // Roomba has no stop bit\r | |
2842 | irmp_bit >= ROOMBA_COMPLETE_DATA_LEN - 1) // it's the last datab bit...\r | |
2843 | { // break and close this frame\r | |
2844 | if (irmp_pulse_time >= ROOMBA_1_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_1_PULSE_LEN_MAX)\r | |
2845 | {\r | |
2846 | irmp_pause_time = ROOMBA_1_PAUSE_LEN;\r | |
2847 | }\r | |
2848 | else if (irmp_pulse_time >= ROOMBA_0_PULSE_LEN_MIN && irmp_pulse_time <= ROOMBA_0_PULSE_LEN_MAX)\r | |
2849 | {\r | |
2850 | irmp_pause_time = ROOMBA_0_PAUSE_LEN;\r | |
2851 | }\r | |
2852 | \r | |
2853 | got_light = TRUE; // this is a lie, but helps (generates stop bit)\r | |
2854 | }\r | |
2855 | else\r | |
2856 | #endif\r | |
77f488bb | 2857 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
2858 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER) &&\r | |
31c1f035 | 2859 | irmp_pause_time >= 2 * irmp_param.pause_1_len_max && irmp_bit >= irmp_param.complete_len - 2 && !irmp_param.stop_bit)\r |
77f488bb | 2860 | { // special manchester decoder\r |
a7054daf | 2861 | got_light = TRUE; // this is a lie, but generates a stop bit ;-)\r |
2862 | irmp_param.stop_bit = TRUE; // set flag\r | |
2863 | }\r | |
2864 | else\r | |
77f488bb | 2865 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
504d9df9 | 2866 | if (irmp_pause_time > IRMP_TIMEOUT_LEN) // timeout?\r |
4225a882 | 2867 | { // yes...\r |
2868 | if (irmp_bit == irmp_param.complete_len - 1 && irmp_param.stop_bit == 0)\r | |
2869 | {\r | |
2870 | irmp_bit++;\r | |
2871 | }\r | |
770a1a9d | 2872 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r |
2873 | else if (irmp_param.protocol == IRMP_NEC_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r | |
2874 | {\r | |
93ba2e01 | 2875 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
770a1a9d | 2876 | irmp_param.stop_bit = TRUE; // set flag\r |
2877 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
2878 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2879 | irmp_tmp_command = (irmp_tmp_address >> 4); // set command: upper 12 bits are command bits\r | |
2880 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
2881 | irmp_start_bit_detected = 1; // tricky: don't wait for another start bit...\r | |
2882 | }\r | |
2883 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
35213800 | 2884 | \r |
2885 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
2886 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2887 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && irmp_bit == 32) // it was a NEC stop bit\r | |
2888 | {\r | |
2889 | ANALYZE_PRINTF ("Switching to NEC protocol\n");\r | |
2890 | irmp_param.stop_bit = TRUE; // set flag\r | |
2891 | irmp_param.protocol = IRMP_NEC_PROTOCOL; // switch protocol\r | |
2892 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2893 | \r | |
2894 | // 0123456789ABC0123456789ABC0123456701234567\r | |
2895 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
2896 | // NEC: AAAAAAAAaaaaaaaaCCCCCCCCcccccccc\r | |
0f700c8e | 2897 | irmp_tmp_address |= (irmp_tmp_address2 & 0x0007) << 13; // fm 2012-02-13: 12 -> 13\r |
35213800 | 2898 | irmp_tmp_command = (irmp_tmp_address2 >> 3) | (irmp_tmp_command << 10);\r |
2899 | }\r | |
2900 | #endif // IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
2901 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
93ba2e01 | 2902 | else if (irmp_param.protocol == IRMP_NEC42_PROTOCOL && (irmp_bit == 16 || irmp_bit == 17)) // it was a JVC stop bit\r |
35213800 | 2903 | {\r |
93ba2e01 | 2904 | ANALYZE_PRINTF ("Switching to JVC protocol, irmp_bit = %d\n", irmp_bit);\r |
35213800 | 2905 | irmp_param.stop_bit = TRUE; // set flag\r |
2906 | irmp_param.protocol = IRMP_JVC_PROTOCOL; // switch protocol\r | |
2907 | irmp_param.complete_len = irmp_bit; // patch length: 16 or 17\r | |
2908 | \r | |
2909 | // 0123456789ABC0123456789ABC0123456701234567\r | |
2910 | // NEC42: AAAAAAAAAAAAAaaaaaaaaaaaaaCCCCCCCCcccccccc\r | |
2911 | // JVC: AAAACCCCCCCCCCCC\r | |
2912 | irmp_tmp_command = (irmp_tmp_address >> 4) | (irmp_tmp_address2 << 9); // set command: upper 12 bits are command bits\r | |
2913 | irmp_tmp_address = irmp_tmp_address & 0x000F; // lower 4 bits are address bits\r | |
2914 | }\r | |
2915 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
2916 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
4225a882 | 2917 | else\r |
2918 | {\r | |
48664931 | 2919 | ANALYZE_PRINTF ("error 2: pause %d after data bit %d too long\n", irmp_pause_time, irmp_bit);\r |
2920 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
4225a882 | 2921 | \r |
1f54e86c | 2922 | // irmp_busy_flag = FALSE;\r |
4225a882 | 2923 | irmp_start_bit_detected = 0; // wait for another start bit...\r |
2924 | irmp_pulse_time = 0;\r | |
2925 | irmp_pause_time = 0;\r | |
2926 | }\r | |
2927 | }\r | |
2928 | }\r | |
2929 | }\r | |
2930 | else\r | |
2931 | { // got light now!\r | |
2932 | got_light = TRUE;\r | |
2933 | }\r | |
2934 | \r | |
2935 | if (got_light)\r | |
2936 | {\r | |
0f700c8e | 2937 | ANALYZE_PRINTF ("%8.3fms [bit %2d: pulse = %3d, pause = %3d] ", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
4225a882 | 2938 | \r |
77f488bb | 2939 | #if IRMP_SUPPORT_MANCHESTER == 1\r |
d823e852 | 2940 | if ((irmp_param.flags & IRMP_PARAM_FLAG_IS_MANCHESTER)) // Manchester\r |
4225a882 | 2941 | {\r |
31c1f035 | 2942 | #if 1\r |
2943 | if (irmp_pulse_time > irmp_param.pulse_1_len_max /* && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max */)\r | |
2944 | #else // better, but some IR-RCs use asymmetric timings :-/\r | |
2945 | if (irmp_pulse_time > irmp_param.pulse_1_len_max && irmp_pulse_time <= 2 * irmp_param.pulse_1_len_max &&\r | |
2946 | irmp_pause_time <= 2 * irmp_param.pause_1_len_max)\r | |
fc80d688 | 2947 | #endif\r |
4225a882 | 2948 | {\r |
c7a47e89 | 2949 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
2950 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
4225a882 | 2951 | {\r |
c7a47e89 | 2952 | ANALYZE_PUTCHAR ('T');\r |
2953 | if (irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode 6A\r | |
2954 | {\r | |
2955 | irmp_store_bit (1);\r | |
2956 | last_value = 1;\r | |
2957 | }\r | |
2958 | else // RC6 mode 0\r | |
2959 | {\r | |
2960 | irmp_store_bit (0);\r | |
2961 | last_value = 0;\r | |
2962 | }\r | |
2963 | ANALYZE_NEWLINE ();\r | |
4225a882 | 2964 | }\r |
c7a47e89 | 2965 | else\r |
2966 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
2967 | {\r | |
2968 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '0' : '1');\r | |
2969 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 0 : 1 );\r | |
4225a882 | 2970 | \r |
c7a47e89 | 2971 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
2972 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 4 && irmp_pulse_time > RC6_TOGGLE_BIT_LEN_MIN) // RC6 toggle bit\r | |
2973 | {\r | |
2974 | ANALYZE_PUTCHAR ('T');\r | |
2975 | irmp_store_bit (1);\r | |
2976 | \r | |
31c1f035 | 2977 | if (irmp_pause_time > 2 * irmp_param.pause_1_len_max)\r |
c7a47e89 | 2978 | {\r |
2979 | last_value = 0;\r | |
2980 | }\r | |
2981 | else\r | |
2982 | {\r | |
2983 | last_value = 1;\r | |
2984 | }\r | |
2985 | ANALYZE_NEWLINE ();\r | |
2986 | }\r | |
2987 | else\r | |
77f488bb | 2988 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
c7a47e89 | 2989 | {\r |
2990 | ANALYZE_PUTCHAR ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? '1' : '0');\r | |
2991 | irmp_store_bit ((irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0 );\r | |
6f750020 | 2992 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
c7a47e89 | 2993 | if (! irmp_param2.protocol)\r |
6f750020 | 2994 | #endif\r |
c7a47e89 | 2995 | {\r |
2996 | ANALYZE_NEWLINE ();\r | |
2997 | }\r | |
2998 | last_value = (irmp_param.flags & IRMP_PARAM_FLAG_1ST_PULSE_IS_1) ? 1 : 0;\r | |
2999 | }\r | |
6f750020 | 3000 | }\r |
592411d1 | 3001 | }\r |
31c1f035 | 3002 | else if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max\r |
3003 | /* && irmp_pause_time <= 2 * irmp_param.pause_1_len_max */)\r | |
592411d1 | 3004 | {\r |
77f488bb | 3005 | uint8_t manchester_value;\r |
592411d1 | 3006 | \r |
31c1f035 | 3007 | if (last_pause > irmp_param.pause_1_len_max && last_pause <= 2 * irmp_param.pause_1_len_max)\r |
592411d1 | 3008 | {\r |
77f488bb | 3009 | manchester_value = last_value ? 0 : 1;\r |
3010 | last_value = manchester_value;\r | |
592411d1 | 3011 | }\r |
3012 | else\r | |
3013 | {\r | |
77f488bb | 3014 | manchester_value = last_value;\r |
592411d1 | 3015 | }\r |
3016 | \r | |
48664931 | 3017 | ANALYZE_PUTCHAR (manchester_value + '0');\r |
c7a47e89 | 3018 | \r |
6f750020 | 3019 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && (IRMP_SUPPORT_FDC_PROTOCOL == 1 || IRMP_SUPPORT_RCCAR_PROTOCOL == 1)\r |
3020 | if (! irmp_param2.protocol)\r | |
3021 | #endif\r | |
3022 | {\r | |
3023 | ANALYZE_NEWLINE ();\r | |
3024 | }\r | |
c7a47e89 | 3025 | \r |
3026 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3027 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_bit == 1 && manchester_value == 1) // RC6 mode != 0 ???\r | |
3028 | {\r | |
3029 | ANALYZE_PRINTF ("Switching to RC6A protocol\n");\r | |
3030 | irmp_param.complete_len = RC6_COMPLETE_DATA_LEN_LONG;\r | |
3031 | irmp_param.address_offset = 5;\r | |
3032 | irmp_param.address_end = irmp_param.address_offset + 15;\r | |
3033 | irmp_param.command_offset = irmp_param.address_end + 1; // skip 1 system bit, changes like a toggle bit\r | |
3034 | irmp_param.command_end = irmp_param.command_offset + 16 - 1;\r | |
9547ee89 | 3035 | irmp_tmp_address = 0;\r |
c7a47e89 | 3036 | }\r |
3037 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
3038 | \r | |
77f488bb | 3039 | irmp_store_bit (manchester_value);\r |
a7054daf | 3040 | }\r |
6f750020 | 3041 | else\r |
3042 | {\r | |
3043 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3044 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL &&\r | |
3045 | irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX &&\r | |
3046 | ((irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX) ||\r | |
3047 | (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)))\r | |
3048 | {\r | |
3049 | ANALYZE_PUTCHAR ('?');\r | |
d823e852 | 3050 | irmp_param.protocol = 0; // switch to FDC, see below\r |
6f750020 | 3051 | }\r |
3052 | else\r | |
3053 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3054 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3055 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL &&\r | |
3056 | irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX &&\r | |
3057 | ((irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX) ||\r | |
3058 | (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)))\r | |
3059 | {\r | |
3060 | ANALYZE_PUTCHAR ('?');\r | |
d823e852 | 3061 | irmp_param.protocol = 0; // switch to RCCAR, see below\r |
6f750020 | 3062 | }\r |
3063 | else\r | |
3064 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3065 | {\r | |
3066 | ANALYZE_PUTCHAR ('?');\r | |
3067 | ANALYZE_NEWLINE ();\r | |
c7a47e89 | 3068 | ANALYZE_PRINTF ("error 3 manchester: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
6f750020 | 3069 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
1f54e86c | 3070 | // irmp_busy_flag = FALSE;\r |
6f750020 | 3071 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
3072 | irmp_pause_time = 0;\r | |
3073 | }\r | |
3074 | }\r | |
3075 | \r | |
3076 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3077 | if (irmp_param2.protocol == IRMP_FDC_PROTOCOL && irmp_pulse_time >= FDC_PULSE_LEN_MIN && irmp_pulse_time <= FDC_PULSE_LEN_MAX)\r | |
3078 | {\r | |
3079 | if (irmp_pause_time >= FDC_1_PAUSE_LEN_MIN && irmp_pause_time <= FDC_1_PAUSE_LEN_MAX)\r | |
3080 | {\r | |
3081 | ANALYZE_PRINTF (" 1 (FDC)\n");\r | |
3082 | irmp_store_bit2 (1);\r | |
3083 | }\r | |
3084 | else if (irmp_pause_time >= FDC_0_PAUSE_LEN_MIN && irmp_pause_time <= FDC_0_PAUSE_LEN_MAX)\r | |
3085 | {\r | |
3086 | ANALYZE_PRINTF (" 0 (FDC)\n");\r | |
3087 | irmp_store_bit2 (0);\r | |
3088 | }\r | |
3089 | \r | |
3090 | if (! irmp_param.protocol)\r | |
3091 | {\r | |
3092 | ANALYZE_PRINTF ("Switching to FDC protocol\n");\r | |
3093 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
3094 | irmp_param2.protocol = 0;\r | |
3095 | irmp_tmp_address = irmp_tmp_address2;\r | |
3096 | irmp_tmp_command = irmp_tmp_command2;\r | |
3097 | }\r | |
3098 | }\r | |
3099 | #endif // IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3100 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1 && IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
3101 | if (irmp_param2.protocol == IRMP_RCCAR_PROTOCOL && irmp_pulse_time >= RCCAR_PULSE_LEN_MIN && irmp_pulse_time <= RCCAR_PULSE_LEN_MAX)\r | |
3102 | {\r | |
3103 | if (irmp_pause_time >= RCCAR_1_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_1_PAUSE_LEN_MAX)\r | |
3104 | {\r | |
3105 | ANALYZE_PRINTF (" 1 (RCCAR)\n");\r | |
3106 | irmp_store_bit2 (1);\r | |
3107 | }\r | |
3108 | else if (irmp_pause_time >= RCCAR_0_PAUSE_LEN_MIN && irmp_pause_time <= RCCAR_0_PAUSE_LEN_MAX)\r | |
3109 | {\r | |
3110 | ANALYZE_PRINTF (" 0 (RCCAR)\n");\r | |
3111 | irmp_store_bit2 (0);\r | |
3112 | }\r | |
3113 | \r | |
3114 | if (! irmp_param.protocol)\r | |
3115 | {\r | |
3116 | ANALYZE_PRINTF ("Switching to RCCAR protocol\n");\r | |
3117 | memcpy (&irmp_param, &irmp_param2, sizeof (IRMP_PARAMETER));\r | |
3118 | irmp_param2.protocol = 0;\r | |
3119 | irmp_tmp_address = irmp_tmp_address2;\r | |
3120 | irmp_tmp_command = irmp_tmp_command2;\r | |
3121 | }\r | |
3122 | }\r | |
3123 | #endif // IRMP_SUPPORT_RCCAR_PROTOCOL == 1\r | |
a7054daf | 3124 | \r |
77f488bb | 3125 | last_pause = irmp_pause_time;\r |
3126 | wait_for_space = 0;\r | |
a7054daf | 3127 | }\r |
3128 | else\r | |
77f488bb | 3129 | #endif // IRMP_SUPPORT_MANCHESTER == 1\r |
3130 | \r | |
deba2a0a | 3131 | #if IRMP_SUPPORT_SERIAL == 1\r |
3132 | if (irmp_param.flags & IRMP_PARAM_FLAG_IS_SERIAL)\r | |
3133 | {\r | |
3134 | while (irmp_bit < irmp_param.complete_len && irmp_pulse_time > irmp_param.pulse_1_len_max)\r | |
3135 | {\r | |
3136 | ANALYZE_PUTCHAR ('1');\r | |
3137 | irmp_store_bit (1);\r | |
3138 | \r | |
3139 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min)\r | |
3140 | {\r | |
3141 | irmp_pulse_time -= irmp_param.pulse_1_len_min;\r | |
3142 | }\r | |
3143 | else\r | |
3144 | {\r | |
3145 | irmp_pulse_time = 0;\r | |
3146 | }\r | |
3147 | }\r | |
3148 | \r | |
3149 | while (irmp_bit < irmp_param.complete_len && irmp_pause_time > irmp_param.pause_1_len_max)\r | |
3150 | {\r | |
3151 | ANALYZE_PUTCHAR ('0');\r | |
3152 | irmp_store_bit (0);\r | |
3153 | \r | |
3154 | if (irmp_pause_time >= irmp_param.pause_1_len_min)\r | |
3155 | {\r | |
3156 | irmp_pause_time -= irmp_param.pause_1_len_min;\r | |
3157 | }\r | |
3158 | else\r | |
3159 | {\r | |
3160 | irmp_pause_time = 0;\r | |
3161 | }\r | |
3162 | }\r | |
3163 | ANALYZE_NEWLINE ();\r | |
3164 | wait_for_space = 0;\r | |
3165 | }\r | |
3166 | else\r | |
3167 | #endif // IRMP_SUPPORT_SERIAL == 1\r | |
a7054daf | 3168 | \r |
4225a882 | 3169 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3170 | if (irmp_param.protocol == IRMP_SAMSUNG_PROTOCOL && irmp_bit == 16) // Samsung: 16th bit\r | |
3171 | {\r | |
3172 | if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX &&\r | |
3173 | irmp_pause_time >= SAMSUNG_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_START_BIT_PAUSE_LEN_MAX)\r | |
3174 | {\r | |
48664931 | 3175 | ANALYZE_PRINTF ("SYNC\n");\r |
4225a882 | 3176 | wait_for_space = 0;\r |
3177 | irmp_tmp_id = 0;\r | |
3178 | irmp_bit++;\r | |
3179 | }\r | |
3180 | else if (irmp_pulse_time >= SAMSUNG_PULSE_LEN_MIN && irmp_pulse_time <= SAMSUNG_PULSE_LEN_MAX)\r | |
3181 | {\r | |
5b437ff6 | 3182 | irmp_param.protocol = IRMP_SAMSUNG32_PROTOCOL;\r |
3183 | irmp_param.command_offset = SAMSUNG32_COMMAND_OFFSET;\r | |
3184 | irmp_param.command_end = SAMSUNG32_COMMAND_OFFSET + SAMSUNG32_COMMAND_LEN;\r | |
3185 | irmp_param.complete_len = SAMSUNG32_COMPLETE_DATA_LEN;\r | |
3186 | \r | |
4225a882 | 3187 | if (irmp_pause_time >= SAMSUNG_1_PAUSE_LEN_MIN && irmp_pause_time <= SAMSUNG_1_PAUSE_LEN_MAX)\r |
3188 | {\r | |
48664931 | 3189 | ANALYZE_PUTCHAR ('1');\r |
3190 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3191 | irmp_store_bit (1);\r |
3192 | wait_for_space = 0;\r | |
3193 | }\r | |
3194 | else\r | |
3195 | {\r | |
48664931 | 3196 | ANALYZE_PUTCHAR ('0');\r |
3197 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3198 | irmp_store_bit (0);\r |
3199 | wait_for_space = 0;\r | |
3200 | }\r | |
3201 | \r | |
48664931 | 3202 | ANALYZE_PRINTF ("Switching to SAMSUNG32 protocol\n");\r |
4225a882 | 3203 | }\r |
3204 | else\r | |
3205 | { // timing incorrect!\r | |
48664931 | 3206 | ANALYZE_PRINTF ("error 3 Samsung: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3207 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3208 | // irmp_busy_flag = FALSE;\r |
504d9df9 | 3209 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
4225a882 | 3210 | irmp_pause_time = 0;\r |
3211 | }\r | |
4225a882 | 3212 | }\r |
3213 | else\r | |
3214 | #endif // IRMP_SUPPORT_SAMSUNG_PROTOCOL\r | |
3215 | \r | |
fc80d688 | 3216 | #if IRMP_SUPPORT_NEC16_PROTOCOL\r |
35213800 | 3217 | #if IRMP_SUPPORT_NEC42_PROTOCOL == 1\r |
3218 | if (irmp_param.protocol == IRMP_NEC42_PROTOCOL &&\r | |
3219 | #else // IRMP_SUPPORT_NEC_PROTOCOL instead\r | |
3220 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL &&\r | |
3221 | #endif // IRMP_SUPPORT_NEC42_PROTOCOL == 1\r | |
3222 | irmp_bit == 8 && irmp_pause_time >= NEC_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= NEC_START_BIT_PAUSE_LEN_MAX)\r | |
fc80d688 | 3223 | {\r |
3224 | ANALYZE_PRINTF ("Switching to NEC16 protocol\n");\r | |
7644ac04 | 3225 | irmp_param.protocol = IRMP_NEC16_PROTOCOL;\r |
35213800 | 3226 | irmp_param.address_offset = NEC16_ADDRESS_OFFSET;\r |
3227 | irmp_param.address_end = NEC16_ADDRESS_OFFSET + NEC16_ADDRESS_LEN;\r | |
3228 | irmp_param.command_offset = NEC16_COMMAND_OFFSET;\r | |
3229 | irmp_param.command_end = NEC16_COMMAND_OFFSET + NEC16_COMMAND_LEN;\r | |
3230 | irmp_param.complete_len = NEC16_COMPLETE_DATA_LEN;\r | |
fc80d688 | 3231 | wait_for_space = 0;\r |
3232 | }\r | |
3233 | else\r | |
3234 | #endif // IRMP_SUPPORT_NEC16_PROTOCOL\r | |
3235 | \r | |
504d9df9 | 3236 | #if IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL == 1\r |
3237 | if (irmp_param.protocol == IRMP_BANG_OLUFSEN_PROTOCOL)\r | |
3238 | {\r | |
3239 | if (irmp_pulse_time >= BANG_OLUFSEN_PULSE_LEN_MIN && irmp_pulse_time <= BANG_OLUFSEN_PULSE_LEN_MAX)\r | |
3240 | {\r | |
46dd89b7 | 3241 | if (irmp_bit == 1) // Bang & Olufsen: 3rd bit\r |
504d9df9 | 3242 | {\r |
3243 | if (irmp_pause_time >= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX)\r | |
3244 | {\r | |
48664931 | 3245 | ANALYZE_PRINTF ("3rd start bit\n");\r |
504d9df9 | 3246 | wait_for_space = 0;\r |
504d9df9 | 3247 | irmp_bit++;\r |
3248 | }\r | |
3249 | else\r | |
d155e9ab | 3250 | { // timing incorrect!\r |
48664931 | 3251 | ANALYZE_PRINTF ("error 3a B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3252 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3253 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3254 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3255 | irmp_pause_time = 0;\r |
3256 | }\r | |
504d9df9 | 3257 | }\r |
46dd89b7 | 3258 | else if (irmp_bit == 19) // Bang & Olufsen: trailer bit\r |
504d9df9 | 3259 | {\r |
3260 | if (irmp_pause_time >= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_TRAILER_BIT_PAUSE_LEN_MAX)\r | |
3261 | {\r | |
48664931 | 3262 | ANALYZE_PRINTF ("trailer bit\n");\r |
504d9df9 | 3263 | wait_for_space = 0;\r |
504d9df9 | 3264 | irmp_bit++;\r |
3265 | }\r | |
3266 | else\r | |
46dd89b7 | 3267 | { // timing incorrect!\r |
48664931 | 3268 | ANALYZE_PRINTF ("error 3b B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3269 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3270 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3271 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3272 | irmp_pause_time = 0;\r |
3273 | }\r | |
504d9df9 | 3274 | }\r |
3275 | else\r | |
3276 | {\r | |
46dd89b7 | 3277 | if (irmp_pause_time >= BANG_OLUFSEN_1_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_1_PAUSE_LEN_MAX)\r |
3278 | { // pulse & pause timings correct for "1"?\r | |
48664931 | 3279 | ANALYZE_PUTCHAR ('1');\r |
3280 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3281 | irmp_store_bit (1);\r |
3282 | last_value = 1;\r | |
3283 | wait_for_space = 0;\r | |
3284 | }\r | |
46dd89b7 | 3285 | else if (irmp_pause_time >= BANG_OLUFSEN_0_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_0_PAUSE_LEN_MAX)\r |
3286 | { // pulse & pause timings correct for "0"?\r | |
48664931 | 3287 | ANALYZE_PUTCHAR ('0');\r |
3288 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3289 | irmp_store_bit (0);\r |
3290 | last_value = 0;\r | |
3291 | wait_for_space = 0;\r | |
3292 | }\r | |
3293 | else if (irmp_pause_time >= BANG_OLUFSEN_R_PAUSE_LEN_MIN && irmp_pause_time <= BANG_OLUFSEN_R_PAUSE_LEN_MAX)\r | |
3294 | {\r | |
48664931 | 3295 | ANALYZE_PUTCHAR (last_value + '0');\r |
3296 | ANALYZE_NEWLINE ();\r | |
504d9df9 | 3297 | irmp_store_bit (last_value);\r |
3298 | wait_for_space = 0;\r | |
3299 | }\r | |
3300 | else\r | |
46dd89b7 | 3301 | { // timing incorrect!\r |
48664931 | 3302 | ANALYZE_PRINTF ("error 3c B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3303 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3304 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3305 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3306 | irmp_pause_time = 0;\r |
3307 | }\r | |
3308 | }\r | |
3309 | }\r | |
3310 | else\r | |
46dd89b7 | 3311 | { // timing incorrect!\r |
48664931 | 3312 | ANALYZE_PRINTF ("error 3d B&O: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3313 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3314 | // irmp_busy_flag = FALSE;\r |
46dd89b7 | 3315 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
504d9df9 | 3316 | irmp_pause_time = 0;\r |
3317 | }\r | |
3318 | }\r | |
3319 | else\r | |
3320 | #endif // IRMP_SUPPORT_BANG_OLUFSEN_PROTOCOL\r | |
3321 | \r | |
4225a882 | 3322 | if (irmp_pulse_time >= irmp_param.pulse_1_len_min && irmp_pulse_time <= irmp_param.pulse_1_len_max &&\r |
3323 | irmp_pause_time >= irmp_param.pause_1_len_min && irmp_pause_time <= irmp_param.pause_1_len_max)\r | |
3324 | { // pulse & pause timings correct for "1"?\r | |
48664931 | 3325 | ANALYZE_PUTCHAR ('1');\r |
3326 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3327 | irmp_store_bit (1);\r |
3328 | wait_for_space = 0;\r | |
3329 | }\r | |
3330 | else if (irmp_pulse_time >= irmp_param.pulse_0_len_min && irmp_pulse_time <= irmp_param.pulse_0_len_max &&\r | |
3331 | irmp_pause_time >= irmp_param.pause_0_len_min && irmp_pause_time <= irmp_param.pause_0_len_max)\r | |
3332 | { // pulse & pause timings correct for "0"?\r | |
48664931 | 3333 | ANALYZE_PUTCHAR ('0');\r |
3334 | ANALYZE_NEWLINE ();\r | |
4225a882 | 3335 | irmp_store_bit (0);\r |
3336 | wait_for_space = 0;\r | |
3337 | }\r | |
3338 | else\r | |
111d6191 | 3339 | #if IRMP_SUPPORT_KATHREIN_PROTOCOL\r |
3340 | \r | |
3341 | if (irmp_param.protocol == IRMP_KATHREIN_PROTOCOL &&\r | |
3342 | irmp_pulse_time >= KATHREIN_1_PULSE_LEN_MIN && irmp_pulse_time <= KATHREIN_1_PULSE_LEN_MAX &&\r | |
3343 | (((irmp_bit == 8 || irmp_bit == 6) &&\r | |
3344 | irmp_pause_time >= KATHREIN_SYNC_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_SYNC_BIT_PAUSE_LEN_MAX) ||\r | |
3345 | (irmp_bit == 12 &&\r | |
3346 | irmp_pause_time >= KATHREIN_START_BIT_PAUSE_LEN_MIN && irmp_pause_time <= KATHREIN_START_BIT_PAUSE_LEN_MAX)))\r | |
3347 | \r | |
3348 | {\r | |
3349 | if (irmp_bit == 8)\r | |
3350 | {\r | |
3351 | irmp_bit++;\r | |
3352 | ANALYZE_PUTCHAR ('S');\r | |
3353 | ANALYZE_NEWLINE ();\r | |
111d6191 | 3354 | irmp_tmp_command <<= 1;\r |
3355 | }\r | |
3356 | else\r | |
3357 | {\r | |
3358 | ANALYZE_PUTCHAR ('S');\r | |
3359 | ANALYZE_NEWLINE ();\r | |
3360 | irmp_store_bit (1);\r | |
3361 | }\r | |
3362 | wait_for_space = 0;\r | |
3363 | }\r | |
3364 | else\r | |
3365 | #endif // IRMP_SUPPORT_KATHREIN_PROTOCOL\r | |
4225a882 | 3366 | { // timing incorrect!\r |
48664931 | 3367 | ANALYZE_PRINTF ("error 3: timing not correct: data bit %d, pulse: %d, pause: %d\n", irmp_bit, irmp_pulse_time, irmp_pause_time);\r |
3368 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r | |
1f54e86c | 3369 | // irmp_busy_flag = FALSE;\r |
4225a882 | 3370 | irmp_start_bit_detected = 0; // reset flags and wait for next start bit\r |
3371 | irmp_pause_time = 0;\r | |
3372 | }\r | |
3373 | \r | |
3374 | irmp_pulse_time = 1; // set counter to 1, not 0\r | |
3375 | }\r | |
3376 | }\r | |
3377 | else\r | |
3378 | { // counting the pulse length ...\r | |
d155e9ab | 3379 | if (! irmp_input) // still light?\r |
4225a882 | 3380 | { // yes...\r |
3381 | irmp_pulse_time++; // increment counter\r | |
3382 | }\r | |
3383 | else\r | |
3384 | { // now it's dark!\r | |
3385 | wait_for_space = 1; // let's count the time (see above)\r | |
3386 | irmp_pause_time = 1; // set pause counter to 1, not 0\r | |
3387 | }\r | |
3388 | }\r | |
3389 | \r | |
881dbf79 | 3390 | if (irmp_start_bit_detected && irmp_bit == irmp_param.complete_len && irmp_param.stop_bit == 0) // enough bits received?\r |
4225a882 | 3391 | {\r |
775fabfa | 3392 | if (last_irmp_command == irmp_tmp_command && key_repetition_len < AUTO_FRAME_REPETITION_LEN)\r |
592411d1 | 3393 | {\r |
3394 | repetition_frame_number++;\r | |
3395 | }\r | |
3396 | else\r | |
4225a882 | 3397 | {\r |
592411d1 | 3398 | repetition_frame_number = 0;\r |
3399 | }\r | |
3400 | \r | |
3401 | #if IRMP_SUPPORT_SIRCS_PROTOCOL == 1\r | |
3402 | // if SIRCS protocol and the code will be repeated within 50 ms, we will ignore 2nd and 3rd repetition frame\r | |
3403 | if (irmp_param.protocol == IRMP_SIRCS_PROTOCOL && (repetition_frame_number == 1 || repetition_frame_number == 2))\r | |
3404 | {\r | |
48664931 | 3405 | ANALYZE_PRINTF ("code skipped: SIRCS auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3406 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3407 | key_repetition_len = 0;\r | |
592411d1 | 3408 | }\r |
3409 | else\r | |
3410 | #endif\r | |
3411 | \r | |
40ca4604 | 3412 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
3413 | // if ORTEK protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r | |
3414 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL && repetition_frame_number == 1)\r | |
3415 | {\r | |
3416 | ANALYZE_PRINTF ("code skipped: ORTEK auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
3417 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r | |
3418 | key_repetition_len = 0;\r | |
3419 | }\r | |
3420 | else\r | |
3421 | #endif\r | |
3422 | \r | |
770a1a9d | 3423 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r |
3424 | // if KASEIKYO protocol and the code will be repeated within 50 ms, we will ignore 2nd repetition frame\r | |
3425 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL && repetition_frame_number == 1)\r | |
3426 | {\r | |
3427 | ANALYZE_PRINTF ("code skipped: KASEIKYO auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r | |
775fabfa | 3428 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3429 | key_repetition_len = 0;\r | |
770a1a9d | 3430 | }\r |
3431 | else\r | |
3432 | #endif\r | |
3433 | \r | |
592411d1 | 3434 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r |
3435 | // if SAMSUNG32 protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r | |
3436 | if (irmp_param.protocol == IRMP_SAMSUNG32_PROTOCOL && (repetition_frame_number & 0x01))\r | |
3437 | {\r | |
48664931 | 3438 | ANALYZE_PRINTF ("code skipped: SAMSUNG32 auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3439 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3440 | key_repetition_len = 0;\r | |
592411d1 | 3441 | }\r |
3442 | else\r | |
3443 | #endif\r | |
3444 | \r | |
3445 | #if IRMP_SUPPORT_NUBERT_PROTOCOL == 1\r | |
d155e9ab | 3446 | // if NUBERT protocol and the code will be repeated within 50 ms, we will ignore every 2nd frame\r |
592411d1 | 3447 | if (irmp_param.protocol == IRMP_NUBERT_PROTOCOL && (repetition_frame_number & 0x01))\r |
3448 | {\r | |
48664931 | 3449 | ANALYZE_PRINTF ("code skipped: NUBERT auto repetition frame #%d, counter = %d, auto repetition len = %d\n",\r |
775fabfa | 3450 | repetition_frame_number + 1, key_repetition_len, AUTO_FRAME_REPETITION_LEN);\r |
3451 | key_repetition_len = 0;\r | |
4225a882 | 3452 | }\r |
3453 | else\r | |
592411d1 | 3454 | #endif\r |
3455 | \r | |
4225a882 | 3456 | {\r |
0f700c8e | 3457 | ANALYZE_PRINTF ("%8.3fms code detected, length = %d\n", (double) (time_counter * 1000) / F_INTERRUPTS, irmp_bit);\r |
4225a882 | 3458 | irmp_ir_detected = TRUE;\r |
3459 | \r | |
3460 | #if IRMP_SUPPORT_DENON_PROTOCOL == 1\r | |
3461 | if (irmp_param.protocol == IRMP_DENON_PROTOCOL)\r | |
3462 | { // check for repetition frame\r | |
3463 | if ((~irmp_tmp_command & 0x3FF) == last_irmp_denon_command) // command bits must be inverted\r | |
3464 | {\r | |
3465 | irmp_tmp_command = last_irmp_denon_command; // use command received before!\r | |
08f2dd9d | 3466 | last_irmp_denon_command = 0;\r |
4225a882 | 3467 | \r |
3468 | irmp_protocol = irmp_param.protocol; // store protocol\r | |
3469 | irmp_address = irmp_tmp_address; // store address\r | |
2ac088b2 | 3470 | irmp_command = irmp_tmp_command; // store command\r |
4225a882 | 3471 | }\r |
3472 | else\r | |
3473 | {\r | |
e522639e | 3474 | if ((irmp_tmp_command & 0x01) == 0x00)\r |
95eab03c | 3475 | {\r |
2ac088b2 | 3476 | ANALYZE_PRINTF ("%8.3fms info Denon: waiting for inverted command repetition\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
95eab03c | 3477 | last_irmp_denon_command = irmp_tmp_command;\r |
775fabfa | 3478 | denon_repetition_len = 0;\r |
2ac088b2 | 3479 | irmp_ir_detected = FALSE;\r |
95eab03c | 3480 | }\r |
e522639e | 3481 | else\r |
95eab03c | 3482 | {\r |
e522639e | 3483 | ANALYZE_PRINTF ("%8.3fms warning Denon: got unexpected inverted command, ignoring it\n", (double) (time_counter * 1000) / F_INTERRUPTS);\r |
95eab03c | 3484 | last_irmp_denon_command = 0;\r |
2ac088b2 | 3485 | irmp_ir_detected = FALSE;\r |
3486 | }\r | |
4225a882 | 3487 | }\r |
3488 | }\r | |
3489 | else\r | |
3490 | #endif // IRMP_SUPPORT_DENON_PROTOCOL\r | |
592411d1 | 3491 | \r |
3492 | #if IRMP_SUPPORT_GRUNDIG_PROTOCOL == 1\r | |
d155e9ab | 3493 | if (irmp_param.protocol == IRMP_GRUNDIG_PROTOCOL && irmp_tmp_command == 0x01ff)\r |
3494 | { // Grundig start frame?\r | |
48664931 | 3495 | ANALYZE_PRINTF ("Detected GRUNDIG start frame, ignoring it\n");\r |
592411d1 | 3496 | irmp_ir_detected = FALSE;\r |
592411d1 | 3497 | }\r |
3498 | else\r | |
d155e9ab | 3499 | #endif // IRMP_SUPPORT_GRUNDIG_PROTOCOL\r |
3500 | \r | |
3501 | #if IRMP_SUPPORT_NOKIA_PROTOCOL == 1\r | |
3502 | if (irmp_param.protocol == IRMP_NOKIA_PROTOCOL && irmp_tmp_address == 0x00ff && irmp_tmp_command == 0x00fe)\r | |
3503 | { // Nokia start frame?\r | |
48664931 | 3504 | ANALYZE_PRINTF ("Detected NOKIA start frame, ignoring it\n");\r |
d155e9ab | 3505 | irmp_ir_detected = FALSE;\r |
3506 | }\r | |
3507 | else\r | |
3508 | #endif // IRMP_SUPPORT_NOKIA_PROTOCOL\r | |
4225a882 | 3509 | {\r |
cb8474cc | 3510 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r |
3511 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL && irmp_bit == 0) // repetition frame\r | |
3512 | {\r | |
775fabfa | 3513 | if (key_repetition_len < NEC_FRAME_REPEAT_PAUSE_LEN_MAX)\r |
6db2522c | 3514 | {\r |
775fabfa | 3515 | ANALYZE_PRINTF ("Detected NEC repetition frame, key_repetition_len = %d\n", key_repetition_len);\r |
3516 | ANALYZE_ONLY_NORMAL_PRINTF("REPETETION FRAME ");\r | |
6db2522c | 3517 | irmp_tmp_address = last_irmp_address; // address is last address\r |
3518 | irmp_tmp_command = last_irmp_command; // command is last command\r | |
3519 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
775fabfa | 3520 | key_repetition_len = 0;\r |
6db2522c | 3521 | }\r |
3522 | else\r | |
3523 | {\r | |
775fabfa | 3524 | ANALYZE_PRINTF ("Detected NEC repetition frame, ignoring it: timeout occured, key_repetition_len = %d > %d\n",\r |
3525 | key_repetition_len, NEC_FRAME_REPEAT_PAUSE_LEN_MAX);\r | |
6db2522c | 3526 | irmp_ir_detected = FALSE;\r |
3527 | }\r | |
cb8474cc | 3528 | }\r |
4225a882 | 3529 | #endif // IRMP_SUPPORT_NEC_PROTOCOL\r |
770a1a9d | 3530 | \r |
3531 | #if IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3532 | if (irmp_param.protocol == IRMP_KASEIKYO_PROTOCOL)\r | |
3533 | {\r | |
a03ad359 | 3534 | uint8_t xor_value;\r |
770a1a9d | 3535 | // ANALYZE_PRINTF ("0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n",\r |
3536 | // xor_check[0], xor_check[1], xor_check[2], xor_check[3], xor_check[4], xor_check[5]);\r | |
3537 | \r | |
a03ad359 | 3538 | xor_value = (xor_check[0] & 0x0F) ^ ((xor_check[0] & 0xF0) >> 4) ^ (xor_check[1] & 0x0F) ^ ((xor_check[1] & 0xF0) >> 4);\r |
770a1a9d | 3539 | \r |
a03ad359 | 3540 | if (xor_value != (xor_check[2] & 0x0F))\r |
770a1a9d | 3541 | {\r |
a03ad359 | 3542 | ANALYZE_PRINTF ("error 4: wrong XOR check for customer id: 0x%1x 0x%1x\n", xor_value, xor_check[2] & 0x0F);\r |
770a1a9d | 3543 | irmp_ir_detected = FALSE;\r |
3544 | }\r | |
3545 | \r | |
a03ad359 | 3546 | xor_value = xor_check[2] ^ xor_check[3] ^ xor_check[4];\r |
770a1a9d | 3547 | \r |
a03ad359 | 3548 | if (xor_value != xor_check[5])\r |
770a1a9d | 3549 | {\r |
a03ad359 | 3550 | ANALYZE_PRINTF ("error 5: wrong XOR check for data bits: 0x%02x 0x%02x\n", xor_value, xor_check[5]);\r |
770a1a9d | 3551 | irmp_ir_detected = FALSE;\r |
3552 | }\r | |
0f700c8e | 3553 | \r |
cea96148 | 3554 | irmp_flags |= genre2; // write the genre2 bits into MSB of the flag byte\r |
770a1a9d | 3555 | }\r |
3556 | #endif // IRMP_SUPPORT_KASEIKYO_PROTOCOL == 1\r | |
3557 | \r | |
40ca4604 | 3558 | #if IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r |
3559 | if (irmp_param.protocol == IRMP_ORTEK_PROTOCOL)\r | |
3560 | {\r | |
3561 | if (parity == PARITY_CHECK_FAILED)\r | |
3562 | {\r | |
3563 | ANALYZE_PRINTF ("error 6: parity check failed\n");\r | |
3564 | irmp_ir_detected = FALSE;\r | |
3565 | }\r | |
3566 | \r | |
3567 | if ((irmp_tmp_address & 0x03) == 0x02)\r | |
3568 | {\r | |
3569 | ANALYZE_PRINTF ("code skipped: ORTEK end of transmission frame (key release)\n");\r | |
3570 | irmp_ir_detected = FALSE;\r | |
3571 | }\r | |
3572 | irmp_tmp_address >>= 2;\r | |
3573 | }\r | |
3574 | #endif // IRMP_SUPPORT_ORTEK_PROTOCOL == 1\r | |
3575 | \r | |
c7a47e89 | 3576 | #if IRMP_SUPPORT_RC6_PROTOCOL == 1\r |
3577 | if (irmp_param.protocol == IRMP_RC6_PROTOCOL && irmp_param.complete_len == RC6_COMPLETE_DATA_LEN_LONG) // RC6 mode = 6?\r | |
3578 | {\r | |
3579 | irmp_protocol = IRMP_RC6A_PROTOCOL;\r | |
3580 | }\r | |
3581 | else\r | |
3582 | #endif // IRMP_SUPPORT_RC6_PROTOCOL == 1\r | |
26b6c304 | 3583 | {\r |
3584 | irmp_protocol = irmp_param.protocol;\r | |
3585 | }\r | |
d823e852 | 3586 | \r |
3587 | #if IRMP_SUPPORT_FDC_PROTOCOL == 1\r | |
3588 | if (irmp_param.protocol == IRMP_FDC_PROTOCOL)\r | |
3589 | {\r | |
3590 | if (irmp_tmp_command & 0x000F) // released key?\r | |
3591 | {\r | |
3592 | irmp_tmp_command = (irmp_tmp_command >> 4) | 0x80; // yes, set bit 7\r | |
3593 | }\r | |
3594 | else\r | |
3595 | {\r | |
3596 | irmp_tmp_command >>= 4; // no, it's a pressed key\r | |
3597 | }\r | |
3598 | irmp_tmp_command |= (irmp_tmp_address << 2) & 0x0F00; // 000000CCCCAAAAAA -> 0000CCCC00000000\r | |
3599 | irmp_tmp_address &= 0x003F;\r | |
3600 | }\r | |
3601 | #endif\r | |
3602 | \r | |
4225a882 | 3603 | irmp_address = irmp_tmp_address; // store address\r |
3604 | #if IRMP_SUPPORT_NEC_PROTOCOL == 1\r | |
03780b34 | 3605 | if (irmp_param.protocol == IRMP_NEC_PROTOCOL)\r |
3606 | {\r | |
3607 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3608 | }\r | |
4225a882 | 3609 | #endif\r |
3610 | \r | |
3611 | #if IRMP_SUPPORT_RC5_PROTOCOL == 1\r | |
6f750020 | 3612 | if (irmp_param.protocol == IRMP_RC5_PROTOCOL)\r |
3613 | {\r | |
3614 | irmp_tmp_command |= rc5_cmd_bit6; // store bit 6\r | |
3615 | }\r | |
4225a882 | 3616 | #endif\r |
3617 | irmp_command = irmp_tmp_command; // store command\r | |
3618 | \r | |
3619 | #if IRMP_SUPPORT_SAMSUNG_PROTOCOL == 1\r | |
3620 | irmp_id = irmp_tmp_id;\r | |
3621 | #endif\r | |
3622 | }\r | |
3623 | }\r | |
3624 | \r | |
3625 | if (irmp_ir_detected)\r | |
3626 | {\r | |
03780b34 | 3627 | if (last_irmp_command == irmp_tmp_command &&\r |
3628 | last_irmp_address == irmp_tmp_address &&\r | |
775fabfa | 3629 | key_repetition_len < IRMP_KEY_REPETITION_LEN)\r |
4225a882 | 3630 | {\r |
3631 | irmp_flags |= IRMP_FLAG_REPETITION;\r | |
3632 | }\r | |
3633 | \r | |
3634 | last_irmp_address = irmp_tmp_address; // store as last address, too\r | |
3635 | last_irmp_command = irmp_tmp_command; // store as last command, too\r | |
3636 | \r | |
775fabfa | 3637 | key_repetition_len = 0;\r |
4225a882 | 3638 | }\r |
879b06c2 | 3639 | else\r |
3640 | {\r | |
48664931 | 3641 | ANALYZE_ONLY_NORMAL_PUTCHAR ('\n');\r |
879b06c2 | 3642 | }\r |
4225a882 | 3643 | \r |
1f54e86c | 3644 | // irmp_busy_flag = FALSE;\r |
4225a882 | 3645 | irmp_start_bit_detected = 0; // and wait for next start bit\r |
3646 | irmp_tmp_command = 0;\r | |
3647 | irmp_pulse_time = 0;\r | |
3648 | irmp_pause_time = 0;\r | |
770a1a9d | 3649 | \r |
3650 | #if IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
3651 | if (irmp_protocol == IRMP_JVC_PROTOCOL) // the stop bit of JVC frame is also start bit of next frame\r | |
3652 | { // set pulse time here!\r | |
3653 | irmp_pulse_time = ((uint8_t)(F_INTERRUPTS * JVC_START_BIT_PULSE_TIME));\r | |
3654 | }\r | |
3655 | #endif // IRMP_SUPPORT_JVC_PROTOCOL == 1\r | |
4225a882 | 3656 | }\r |
3657 | }\r | |
3658 | }\r | |
afd1e690 | 3659 | \r |
3660 | #if defined(STELLARIS_ARM_CORTEX_M4)\r | |
3661 | // Clear the timer interrupt\r | |
3662 | TimerIntClear(TIMER1_BASE, TIMER_TIMA_TIMEOUT);\r | |
3663 | #endif\r | |
3664 | \r | |
879b06c2 | 3665 | return (irmp_ir_detected);\r |
4225a882 | 3666 | }\r |
3667 | \r | |
48664931 | 3668 | #ifdef ANALYZE\r |
4225a882 | 3669 | \r |
2eab5ec9 | 3670 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
3671 | * main functions - for Unix/Linux + Windows only!\r | |
3672 | *\r | |
3673 | * AVR: see main.c!\r | |
3674 | *\r | |
3675 | * Compile it under linux with:\r | |
3676 | * cc irmp.c -o irmp\r | |
3677 | *\r | |
3678 | * usage: ./irmp [-v|-s|-a|-l|-p] < file\r | |
3679 | *\r | |
3680 | * options:\r | |
3681 | * -v verbose\r | |
3682 | * -s silent\r | |
3683 | * -a analyze\r | |
3684 | * -l list pulse/pauses\r | |
3685 | * -p print timings\r | |
3686 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
3687 | */\r | |
4225a882 | 3688 | \r |
fef942f6 | 3689 | static void\r |
3690 | print_timings (void)\r | |
3691 | {\r | |
c7a47e89 | 3692 | printf ("IRMP_TIMEOUT_LEN: %d [%d byte(s)]\n", IRMP_TIMEOUT_LEN, sizeof (PAUSE_LEN));\r |
2eab5ec9 | 3693 | printf ("IRMP_KEY_REPETITION_LEN %d\n", IRMP_KEY_REPETITION_LEN);\r |
3694 | puts ("");\r | |
6f750020 | 3695 | printf ("PROTOCOL S S-PULSE S-PAUSE PULSE-0 PAUSE-0 PULSE-1 PAUSE-1\n");\r |
fef942f6 | 3696 | printf ("====================================================================================\n");\r |
6f750020 | 3697 | printf ("SIRCS 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3698 | SIRCS_START_BIT_PULSE_LEN_MIN, SIRCS_START_BIT_PULSE_LEN_MAX, SIRCS_START_BIT_PAUSE_LEN_MIN, SIRCS_START_BIT_PAUSE_LEN_MAX,\r | |
3699 | SIRCS_0_PULSE_LEN_MIN, SIRCS_0_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX,\r | |
3700 | SIRCS_1_PULSE_LEN_MIN, SIRCS_1_PULSE_LEN_MAX, SIRCS_PAUSE_LEN_MIN, SIRCS_PAUSE_LEN_MAX);\r | |
3701 | \r | |
3702 | printf ("NEC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3703 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_START_BIT_PAUSE_LEN_MIN, NEC_START_BIT_PAUSE_LEN_MAX,\r | |
3704 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3705 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3706 | \r | |
3707 | printf ("NEC (rep) 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3708 | NEC_START_BIT_PULSE_LEN_MIN, NEC_START_BIT_PULSE_LEN_MAX, NEC_REPEAT_START_BIT_PAUSE_LEN_MIN, NEC_REPEAT_START_BIT_PAUSE_LEN_MAX,\r | |
3709 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_0_PAUSE_LEN_MIN, NEC_0_PAUSE_LEN_MAX,\r | |
3710 | NEC_PULSE_LEN_MIN, NEC_PULSE_LEN_MAX, NEC_1_PAUSE_LEN_MIN, NEC_1_PAUSE_LEN_MAX);\r | |
3711 | \r | |
3712 | printf ("SAMSUNG 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3713 | SAMSUNG_START_BIT_PULSE_LEN_MIN, SAMSUNG_START_BIT_PULSE_LEN_MAX, SAMSUNG_START_BIT_PAUSE_LEN_MIN, SAMSUNG_START_BIT_PAUSE_LEN_MAX,\r | |
3714 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_0_PAUSE_LEN_MIN, SAMSUNG_0_PAUSE_LEN_MAX,\r | |
3715 | SAMSUNG_PULSE_LEN_MIN, SAMSUNG_PULSE_LEN_MAX, SAMSUNG_1_PAUSE_LEN_MIN, SAMSUNG_1_PAUSE_LEN_MAX);\r | |
3716 | \r | |
3717 | printf ("MATSUSHITA 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3718 | MATSUSHITA_START_BIT_PULSE_LEN_MIN, MATSUSHITA_START_BIT_PULSE_LEN_MAX, MATSUSHITA_START_BIT_PAUSE_LEN_MIN, MATSUSHITA_START_BIT_PAUSE_LEN_MAX,\r | |
3719 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_0_PAUSE_LEN_MIN, MATSUSHITA_0_PAUSE_LEN_MAX,\r | |
3720 | MATSUSHITA_PULSE_LEN_MIN, MATSUSHITA_PULSE_LEN_MAX, MATSUSHITA_1_PAUSE_LEN_MIN, MATSUSHITA_1_PAUSE_LEN_MAX);\r | |
3721 | \r | |
3722 | printf ("KASEIKYO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3723 | KASEIKYO_START_BIT_PULSE_LEN_MIN, KASEIKYO_START_BIT_PULSE_LEN_MAX, KASEIKYO_START_BIT_PAUSE_LEN_MIN, KASEIKYO_START_BIT_PAUSE_LEN_MAX,\r | |
3724 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_0_PAUSE_LEN_MIN, KASEIKYO_0_PAUSE_LEN_MAX,\r | |
3725 | KASEIKYO_PULSE_LEN_MIN, KASEIKYO_PULSE_LEN_MAX, KASEIKYO_1_PAUSE_LEN_MIN, KASEIKYO_1_PAUSE_LEN_MAX);\r | |
3726 | \r | |
3727 | printf ("RECS80 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3728 | RECS80_START_BIT_PULSE_LEN_MIN, RECS80_START_BIT_PULSE_LEN_MAX, RECS80_START_BIT_PAUSE_LEN_MIN, RECS80_START_BIT_PAUSE_LEN_MAX,\r | |
3729 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_0_PAUSE_LEN_MIN, RECS80_0_PAUSE_LEN_MAX,\r | |
3730 | RECS80_PULSE_LEN_MIN, RECS80_PULSE_LEN_MAX, RECS80_1_PAUSE_LEN_MIN, RECS80_1_PAUSE_LEN_MAX);\r | |
3731 | \r | |
3732 | printf ("RC5 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3733 | RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX, RC5_START_BIT_LEN_MIN, RC5_START_BIT_LEN_MAX,\r | |
3734 | RC5_BIT_LEN_MIN, RC5_BIT_LEN_MAX);\r | |
3735 | \r | |
3736 | printf ("DENON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3737 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX,\r | |
3738 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_0_PAUSE_LEN_MIN, DENON_0_PAUSE_LEN_MAX,\r | |
3739 | DENON_PULSE_LEN_MIN, DENON_PULSE_LEN_MAX, DENON_1_PAUSE_LEN_MIN, DENON_1_PAUSE_LEN_MAX);\r | |
3740 | \r | |
beda975f | 3741 | printf ("THOMSON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3742 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX,\r | |
3743 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX, THOMSON_0_PAUSE_LEN_MIN, THOMSON_0_PAUSE_LEN_MAX,\r | |
3744 | THOMSON_PULSE_LEN_MIN, THOMSON_PULSE_LEN_MAX, THOMSON_1_PAUSE_LEN_MIN, THOMSON_1_PAUSE_LEN_MAX);\r | |
3745 | \r | |
c7a47e89 | 3746 | printf ("RC6 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
6f750020 | 3747 | RC6_START_BIT_PULSE_LEN_MIN, RC6_START_BIT_PULSE_LEN_MAX, RC6_START_BIT_PAUSE_LEN_MIN, RC6_START_BIT_PAUSE_LEN_MAX,\r |
c7a47e89 | 3748 | RC6_BIT_PULSE_LEN_MIN, RC6_BIT_PULSE_LEN_MAX, RC6_BIT_PAUSE_LEN_MIN, RC6_BIT_PAUSE_LEN_MAX);\r |
6f750020 | 3749 | \r |
3750 | printf ("RECS80EXT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3751 | RECS80EXT_START_BIT_PULSE_LEN_MIN, RECS80EXT_START_BIT_PULSE_LEN_MAX, RECS80EXT_START_BIT_PAUSE_LEN_MIN, RECS80EXT_START_BIT_PAUSE_LEN_MAX,\r | |
3752 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_0_PAUSE_LEN_MIN, RECS80EXT_0_PAUSE_LEN_MAX,\r | |
3753 | RECS80EXT_PULSE_LEN_MIN, RECS80EXT_PULSE_LEN_MAX, RECS80EXT_1_PAUSE_LEN_MIN, RECS80EXT_1_PAUSE_LEN_MAX);\r | |
3754 | \r | |
3755 | printf ("NUBERT 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3756 | NUBERT_START_BIT_PULSE_LEN_MIN, NUBERT_START_BIT_PULSE_LEN_MAX, NUBERT_START_BIT_PAUSE_LEN_MIN, NUBERT_START_BIT_PAUSE_LEN_MAX,\r | |
3757 | NUBERT_0_PULSE_LEN_MIN, NUBERT_0_PULSE_LEN_MAX, NUBERT_0_PAUSE_LEN_MIN, NUBERT_0_PAUSE_LEN_MAX,\r | |
3758 | NUBERT_1_PULSE_LEN_MIN, NUBERT_1_PULSE_LEN_MAX, NUBERT_1_PAUSE_LEN_MIN, NUBERT_1_PAUSE_LEN_MAX);\r | |
3759 | \r | |
3760 | printf ("BANG_OLUFSEN 1 %3d - %3d %3d - %3d\n",\r | |
3761 | BANG_OLUFSEN_START_BIT1_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PULSE_LEN_MAX,\r | |
3762 | BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT1_PAUSE_LEN_MAX);\r | |
3763 | \r | |
2eab5ec9 | 3764 | printf ("BANG_OLUFSEN 2 %3d - %3d %3d - %3d\n",\r |
3765 | BANG_OLUFSEN_START_BIT2_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PULSE_LEN_MAX,\r | |
3766 | BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT2_PAUSE_LEN_MAX);\r | |
3767 | \r | |
6f750020 | 3768 | printf ("BANG_OLUFSEN 3 %3d - %3d %3d - %3d\n",\r |
3769 | BANG_OLUFSEN_START_BIT3_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PULSE_LEN_MAX,\r | |
3770 | BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT3_PAUSE_LEN_MAX);\r | |
3771 | \r | |
3772 | printf ("BANG_OLUFSEN 4 %3d - %3d %3d - %3d\n",\r | |
3773 | BANG_OLUFSEN_START_BIT4_PULSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PULSE_LEN_MAX,\r | |
3774 | BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MIN, BANG_OLUFSEN_START_BIT4_PAUSE_LEN_MAX);\r | |
3775 | \r | |
3776 | printf ("BANG_OLUFSEN - %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3777 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_0_PAUSE_LEN_MIN, BANG_OLUFSEN_0_PAUSE_LEN_MAX,\r | |
3778 | BANG_OLUFSEN_PULSE_LEN_MIN, BANG_OLUFSEN_PULSE_LEN_MAX, BANG_OLUFSEN_1_PAUSE_LEN_MIN, BANG_OLUFSEN_1_PAUSE_LEN_MAX);\r | |
3779 | \r | |
3780 | printf ("GRUNDIG/NOKIA 1 %3d - %3d %3d - %3d %3d - %3d\n",\r | |
89e8cafb | 3781 | GRUNDIG_NOKIA_IR60_START_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_START_BIT_LEN_MAX,\r |
3782 | GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MIN, GRUNDIG_NOKIA_IR60_PRE_PAUSE_LEN_MAX,\r | |
3783 | GRUNDIG_NOKIA_IR60_BIT_LEN_MIN, GRUNDIG_NOKIA_IR60_BIT_LEN_MAX);\r | |
6f750020 | 3784 | \r |
12948cf3 | 3785 | printf ("SIEMENS/RUWIDO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r |
3786 | SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PULSE_LEN_MAX,\r | |
3787 | SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_START_BIT_PAUSE_LEN_MAX,\r | |
3788 | SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX,\r | |
3789 | SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX,\r | |
31c1f035 | 3790 | 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PULSE_LEN_MAX,\r |
3791 | 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MIN, 2 * SIEMENS_OR_RUWIDO_BIT_PAUSE_LEN_MAX);\r | |
6f750020 | 3792 | \r |
3793 | printf ("FDC 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3794 | FDC_START_BIT_PULSE_LEN_MIN, FDC_START_BIT_PULSE_LEN_MAX, FDC_START_BIT_PAUSE_LEN_MIN, FDC_START_BIT_PAUSE_LEN_MAX,\r | |
3795 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_0_PAUSE_LEN_MIN, FDC_0_PAUSE_LEN_MAX,\r | |
3796 | FDC_PULSE_LEN_MIN, FDC_PULSE_LEN_MAX, FDC_1_PAUSE_LEN_MIN, FDC_1_PAUSE_LEN_MAX);\r | |
3797 | \r | |
3798 | printf ("RCCAR 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3799 | RCCAR_START_BIT_PULSE_LEN_MIN, RCCAR_START_BIT_PULSE_LEN_MAX, RCCAR_START_BIT_PAUSE_LEN_MIN, RCCAR_START_BIT_PAUSE_LEN_MAX,\r | |
3800 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_0_PAUSE_LEN_MIN, RCCAR_0_PAUSE_LEN_MAX,\r | |
3801 | RCCAR_PULSE_LEN_MIN, RCCAR_PULSE_LEN_MAX, RCCAR_1_PAUSE_LEN_MIN, RCCAR_1_PAUSE_LEN_MAX);\r | |
9405f84a | 3802 | \r |
3803 | printf ("NIKON 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3804 | NIKON_START_BIT_PULSE_LEN_MIN, NIKON_START_BIT_PULSE_LEN_MAX, NIKON_START_BIT_PAUSE_LEN_MIN, NIKON_START_BIT_PAUSE_LEN_MAX,\r | |
3805 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_0_PAUSE_LEN_MIN, NIKON_0_PAUSE_LEN_MAX,\r | |
3806 | NIKON_PULSE_LEN_MIN, NIKON_PULSE_LEN_MAX, NIKON_1_PAUSE_LEN_MIN, NIKON_1_PAUSE_LEN_MAX);\r | |
f50e01e7 | 3807 | \r |
3808 | printf ("LEGO 1 %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d %3d - %3d\n",\r | |
3809 | LEGO_START_BIT_PULSE_LEN_MIN, LEGO_START_BIT_PULSE_LEN_MAX, LEGO_START_BIT_PAUSE_LEN_MIN, LEGO_START_BIT_PAUSE_LEN_MAX,\r | |
3810 | LEGO_PULSE_LEN_MIN, LEGO_PULSE_LEN_MAX, LEGO_0_PAUSE_LEN_MIN, LEGO_0_PAUSE_LEN_MAX,\r | |
3811 | LEGO_PULSE_LEN_MIN, LEGO_PULSE_LEN_MAX, LEGO_1_PAUSE_LEN_MIN, LEGO_1_PAUSE_LEN_MAX);\r | |
3812 | \r | |
fef942f6 | 3813 | }\r |
3814 | \r | |
77f488bb | 3815 | void\r |
48664931 | 3816 | print_spectrum (char * text, int * buf, int is_pulse)\r |
77f488bb | 3817 | {\r |
3818 | int i;\r | |
3819 | int j;\r | |
48664931 | 3820 | int min;\r |
3821 | int max;\r | |
3822 | int max_value = 0;\r | |
77f488bb | 3823 | int value;\r |
3824 | int sum = 0;\r | |
3825 | int counter = 0;\r | |
3826 | double average = 0;\r | |
48664931 | 3827 | double tolerance;\r |
77f488bb | 3828 | \r |
48664931 | 3829 | puts ("-------------------------------------------------------------------------------");\r |
77f488bb | 3830 | printf ("%s:\n", text);\r |
3831 | \r | |
3832 | for (i = 0; i < 256; i++)\r | |
3833 | {\r | |
48664931 | 3834 | if (buf[i] > max_value)\r |
77f488bb | 3835 | {\r |
48664931 | 3836 | max_value = buf[i];\r |
77f488bb | 3837 | }\r |
3838 | }\r | |
3839 | \r | |
53c11f07 | 3840 | for (i = 1; i < 100; i++)\r |
77f488bb | 3841 | {\r |
3842 | if (buf[i] > 0)\r | |
3843 | {\r | |
3844 | printf ("%3d ", i);\r | |
48664931 | 3845 | value = (buf[i] * 60) / max_value;\r |
77f488bb | 3846 | \r |
3847 | for (j = 0; j < value; j++)\r | |
3848 | {\r | |
3849 | putchar ('o');\r | |
3850 | }\r | |
3851 | printf (" %d\n", buf[i]);\r | |
3852 | \r | |
3853 | sum += i * buf[i];\r | |
3854 | counter += buf[i];\r | |
3855 | }\r | |
3856 | else\r | |
3857 | {\r | |
48664931 | 3858 | max = i - 1;\r |
3859 | \r | |
77f488bb | 3860 | if (counter > 0)\r |
3861 | {\r | |
3862 | average = (float) sum / (float) counter;\r | |
48664931 | 3863 | \r |
3864 | if (is_pulse)\r | |
3865 | {\r | |
3866 | printf ("pulse ");\r | |
3867 | }\r | |
3868 | else\r | |
3869 | {\r | |
3870 | printf ("pause ");\r | |
3871 | }\r | |
3872 | \r | |
3873 | printf ("avg: %4.1f=%6.1f us, ", average, (1000000. * average) / (float) F_INTERRUPTS);\r | |
3874 | printf ("min: %2d=%6.1f us, ", min, (1000000. * min) / (float) F_INTERRUPTS);\r | |
3875 | printf ("max: %2d=%6.1f us, ", max, (1000000. * max) / (float) F_INTERRUPTS);\r | |
3876 | \r | |
3877 | tolerance = (max - average);\r | |
3878 | \r | |
3879 | if (average - min > tolerance)\r | |
3880 | {\r | |
3881 | tolerance = average - min;\r | |
3882 | }\r | |
3883 | \r | |
3884 | tolerance = tolerance * 100 / average;\r | |
3885 | printf ("tol: %4.1f%%\n", tolerance);\r | |
77f488bb | 3886 | }\r |
48664931 | 3887 | \r |
77f488bb | 3888 | counter = 0;\r |
3889 | sum = 0;\r | |
48664931 | 3890 | min = i + 1;\r |
77f488bb | 3891 | }\r |
3892 | }\r | |
3893 | }\r | |
3894 | \r | |
d823e852 | 3895 | #define STATE_LEFT_SHIFT 0x01\r |
3896 | #define STATE_RIGHT_SHIFT 0x02\r | |
3897 | #define STATE_LEFT_CTRL 0x04\r | |
3898 | #define STATE_LEFT_ALT 0x08\r | |
3899 | #define STATE_RIGHT_ALT 0x10\r | |
3900 | \r | |
3901 | #define KEY_ESCAPE 0x1B // keycode = 0x006e\r | |
3902 | #define KEY_MENUE 0x80 // keycode = 0x0070\r | |
3903 | #define KEY_BACK 0x81 // keycode = 0x0071\r | |
3904 | #define KEY_FORWARD 0x82 // keycode = 0x0072\r | |
3905 | #define KEY_ADDRESS 0x83 // keycode = 0x0073\r | |
3906 | #define KEY_WINDOW 0x84 // keycode = 0x0074\r | |
3907 | #define KEY_1ST_PAGE 0x85 // keycode = 0x0075\r | |
3908 | #define KEY_STOP 0x86 // keycode = 0x0076\r | |
3909 | #define KEY_MAIL 0x87 // keycode = 0x0077\r | |
3910 | #define KEY_FAVORITES 0x88 // keycode = 0x0078\r | |
c6ade1d2 | 3911 | #define KEY_NEW_PAGE 0x89 // keycode = 0x0079\r |
3912 | #define KEY_SETUP 0x8A // keycode = 0x007a\r | |
3913 | #define KEY_FONT 0x8B // keycode = 0x007b\r | |
3914 | #define KEY_PRINT 0x8C // keycode = 0x007c\r | |
3915 | #define KEY_ON_OFF 0x8E // keycode = 0x007c\r | |
3916 | \r | |
3917 | #define KEY_INSERT 0x90 // keycode = 0x004b\r | |
3918 | #define KEY_DELETE 0x91 // keycode = 0x004c\r | |
3919 | #define KEY_LEFT 0x92 // keycode = 0x004f\r | |
3920 | #define KEY_HOME 0x93 // keycode = 0x0050\r | |
3921 | #define KEY_END 0x94 // keycode = 0x0051\r | |
3922 | #define KEY_UP 0x95 // keycode = 0x0053\r | |
3923 | #define KEY_DOWN 0x96 // keycode = 0x0054\r | |
3924 | #define KEY_PAGE_UP 0x97 // keycode = 0x0055\r | |
3925 | #define KEY_PAGE_DOWN 0x98 // keycode = 0x0056\r | |
3926 | #define KEY_RIGHT 0x99 // keycode = 0x0059\r | |
3927 | #define KEY_MOUSE_1 0x9E // keycode = 0x0400\r | |
3928 | #define KEY_MOUSE_2 0x9F // keycode = 0x0800\r | |
d823e852 | 3929 | \r |
3930 | static uint8_t\r | |
3931 | get_fdc_key (uint16_t cmd)\r | |
3932 | {\r | |
3933 | static uint8_t key_table[128] =\r | |
3934 | {\r | |
3935 | // 0 1 2 3 4 5 6 7 8 9 A B C D E F\r | |
3936 | Content-type: text/html ]>