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Version 2.9.5: added TECHNICS protocol
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08f2dd9d 1/*---------------------------------------------------------------------------------------------------------------------------------------------------\r
2 * irmpsystem.h - system specific includes and defines\r
3 *\r
0834784c 4 * Copyright (c) 2009-2015 Frank Meyer - frank(at)fli4l.de\r
08f2dd9d 5 *\r
c4957479 6 * $Id: irmpsystem.h,v 1.18 2015/05/18 10:51:07 fm Exp $\r
08f2dd9d 7 *\r
8 * This program is free software; you can redistribute it and/or modify\r
9 * it under the terms of the GNU General Public License as published by\r
10 * the Free Software Foundation; either version 2 of the License, or\r
11 * (at your option) any later version.\r
12 *---------------------------------------------------------------------------------------------------------------------------------------------------\r
13 */\r
14\r
15#ifndef _IRMPSYSTEM_H_\r
16#define _IRMPSYSTEM_H_\r
17\r
18#if !defined(_IRMP_H_) && !defined(_IRSND_H_)\r
19# error please include only irmp.h or irsnd.h, not irmpsystem.h\r
20#endif\r
21\r
22#if defined(__18CXX) // Microchip PIC C18 compiler\r
23# define PIC_C18\r
4a7dc859 24#elif defined(__XC8) // PIC XC8 compiler\r
25# include <xc.h>\r
26# define PIC_C18\r
08f2dd9d 27#elif defined(__PCM__) || defined(__PCB__) || defined(__PCH__) // CCS PIC compiler\r
28# define PIC_CCS\r
29#elif defined(STM32L1XX_MD) || defined(STM32L1XX_MDP) || defined(STM32L1XX_HD) // ARM STM32\r
30# include <stm32l1xx.h>\r
31# define ARM_STM32\r
32# define ARM_STM32L1XX\r
c4957479 33# define F_CPU (SysCtlClockGet())\r
08f2dd9d 34#elif defined(STM32F10X_LD) || defined(STM32F10X_LD_VL) \\r
35 || defined(STM32F10X_MD) || defined(STM32F10X_MD_VL) \\r
36 || defined(STM32F10X_HD) || defined(STM32F10X_HD_VL) \\r
37 || defined(STM32F10X_XL) || defined(STM32F10X_CL) // ARM STM32\r
38# include <stm32f10x.h>\r
39# define ARM_STM32\r
40# define ARM_STM32F10X\r
622f5f59 41# define F_CPU (SysCtlClockGet())\r
08f2dd9d 42#elif defined(STM32F4XX) // ARM STM32\r
43# include <stm32f4xx.h>\r
44# define ARM_STM32\r
45# define ARM_STM32F4XX\r
061e654c 46#elif defined(TARGET_IS_BLIZZARD_RA2) // TI Stellaris (tested on Stellaris Launchpad with Code Composer Studio)\r
afd1e690 47# define STELLARIS_ARM_CORTEX_M4\r
48# define F_CPU (SysCtlClockGet())\r
cb93f9e9 49#elif defined(unix) || defined(WIN32) || defined(__APPLE__) // Unix/Linux or Windows or Apple\r
08f2dd9d 50# define UNIX_OR_WINDOWS\r
51#else\r
52# define ATMEL_AVR // ATMEL AVR\r
53#endif\r
54\r
55#include <string.h>\r
56\r
57#ifdef UNIX_OR_WINDOWS // Analyze on Unix/Linux or Windows\r
58# include <stdio.h>\r
59# include <stdlib.h>\r
08f2dd9d 60# define F_CPU 8000000L\r
61# define ANALYZE\r
0684a302 62# ifdef unix\r
63# include <stdint.h>\r
64# else\r
65typedef unsigned char uint8_t;\r
66typedef unsigned short uint16_t;\r
67# endif\r
08f2dd9d 68#endif\r
69\r
0684a302 70\r
08f2dd9d 71#if defined(ATMEL_AVR)\r
72# include <stdint.h>\r
73# include <stdio.h>\r
74# include <avr/io.h>\r
75# include <util/delay.h>\r
76# include <avr/pgmspace.h>\r
77# include <avr/interrupt.h>\r
78# define IRSND_OC2 0 // OC2\r
79# define IRSND_OC2A 1 // OC2A\r
80# define IRSND_OC2B 2 // OC2B\r
81# define IRSND_OC0 3 // OC0\r
82# define IRSND_OC0A 4 // OC0A\r
83# define IRSND_OC0B 5 // OC0B\r
ad4d3d41 84\r
85# define IRSND_XMEGA_OC0A 0 // OC0A\r
86# define IRSND_XMEGA_OC0B 1 // OC0B\r
87# define IRSND_XMEGA_OC0C 2 // OC0C\r
88# define IRSND_XMEGA_OC0D 3 // OC0D\r
89# define IRSND_XMEGA_OC1A 4 // OC1A\r
90# define IRSND_XMEGA_OC1B 5 // OC1B\r
91\r
afd1e690 92#elif defined(STELLARIS_ARM_CORTEX_M4)\r
ad4d3d41 93\r
afd1e690 94# include "inc/hw_ints.h"\r
95# include "inc/hw_memmap.h"\r
96# include "inc/hw_types.h"\r
97# include "inc/hw_gpio.h"\r
98# include "driverlib/fpu.h"\r
99# include "driverlib/sysctl.h"\r
100# include "driverlib/interrupt.h"\r
101# include "driverlib/gpio.h"\r
102# include "driverlib/rom.h"\r
103# include "driverlib/systick.h"\r
104# include "driverlib/pin_map.h"\r
105# include "driverlib/timer.h"\r
ad4d3d41 106# define PROGMEM\r
107# define memcpy_P memcpy\r
afd1e690 108# define APP_SYSTICKS_PER_SEC 32\r
ad4d3d41 109\r
622f5f59 110#elif defined(ARM_STM32F10X)\r
ad4d3d41 111\r
622f5f59 112# include "stm32f10x_gpio.h"\r
113# include "stm32f10x_rcc.h"\r
114# include "stm32f10x_tim.h"\r
115# include "misc.h"\r
116# define PROGMEM\r
117# define memcpy_P memcpy\r
ad4d3d41 118\r
08f2dd9d 119#else\r
ad4d3d41 120\r
08f2dd9d 121# define PROGMEM\r
122# define memcpy_P memcpy\r
ad4d3d41 123\r
08f2dd9d 124#endif\r
125\r
afd1e690 126#if defined(PIC_CCS) || defined(PIC_C18) || defined(ARM_STM32) || defined(STELLARIS_ARM_CORTEX_M4)\r
08f2dd9d 127typedef unsigned char uint8_t;\r
128typedef unsigned short uint16_t;\r
129#endif\r
130\r
4a7dc859 131#if defined (PIC_C18) // PIC C18 or XC8 compiler\r
08f2dd9d 132# include <p18cxxx.h> // main PIC18 h file\r
7a844aff 133#ifndef __XC8\r
08f2dd9d 134# include <timers.h> // timer lib\r
135# include <pwm.h> // pwm lib\r
7a844aff 136#endif\r
08f2dd9d 137# define IRSND_PIC_CCP1 1 // PIC C18 RC2 = PWM1 module\r
138# define IRSND_PIC_CCP2 2 // PIC C18 RC1 = PWM2 module\r
139#endif\r
140\r
141#ifndef TRUE\r
142# define TRUE 1\r
143# define FALSE 0\r
144#endif\r
145\r
061e654c 146typedef struct __attribute__ ((__packed__))\r
08f2dd9d 147{\r
061e654c 148 uint8_t protocol; // protocol, e.g. NEC_PROTOCOL\r
08f2dd9d 149 uint16_t address; // address\r
150 uint16_t command; // command\r
151 uint8_t flags; // flags, e.g. repetition\r
152} IRMP_DATA;\r
153\r
154#endif // _IRMPSYSTEM_H_\r