| | 1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 2 | * irsndmain.c - demo main module to test IRSND encoder on AVRs\r |
| | 3 | *\r |
| | 4 | * Copyright (c) 2010-2013 Frank Meyer - frank(at)fli4l.de\r |
| | 5 | *\r |
| | 6 | * ATMEGA88 @ 8 MHz internal RC Osc with BODLEVEL 4.3V: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9\r |
| | 7 | * ATMEGA88 @ 8 MHz external Crystal Osc with BODLEVEL 4.3V: lfuse: 0xFF hfuse: 0xDC efuse: 0xF9\r |
| | 8 | *\r |
| | 9 | * This program is free software; you can redistribute it and/or modify\r |
| | 10 | * it under the terms of the GNU General Public License as published by\r |
| | 11 | * the Free Software Foundation; either version 2 of the License, or\r |
| | 12 | * (at your option) any later version.\r |
| | 13 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 14 | */\r |
| | 15 | #include "irsnd.h"\r |
| | 16 | \r |
| | 17 | #ifndef F_CPU\r |
| | 18 | # error F_CPU unkown\r |
| | 19 | #endif\r |
| | 20 | \r |
| | 21 | void\r |
| | 22 | timer1_init (void)\r |
| | 23 | {\r |
| | 24 | #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:\r |
| | 25 | OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4\r |
| | 26 | TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4\r |
| | 27 | #else // ATmegaXX:\r |
| | 28 | OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency\r |
| | 29 | TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1\r |
| | 30 | #endif\r |
| | 31 | \r |
| | 32 | #ifdef TIMSK1\r |
| | 33 | TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r |
| | 34 | #else\r |
| | 35 | TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r |
| | 36 | #endif\r |
| | 37 | }\r |
| | 38 | \r |
| | 39 | #ifdef TIM1_COMPA_vect // ATtiny84\r |
| | 40 | #define COMPA_VECT TIM1_COMPA_vect\r |
| | 41 | #else\r |
| | 42 | #define COMPA_VECT TIMER1_COMPA_vect // ATmega\r |
| | 43 | #endif\r |
| | 44 | \r |
| | 45 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 46 | * timer 1 compare handler, called every 1/10000 sec\r |
| | 47 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 48 | */\r |
| | 49 | ISR(COMPA_VECT) // Timer1 output compare A interrupt service routine, called every 1/15000 sec\r |
| | 50 | {\r |
| | 51 | (void) irsnd_ISR(); // call irsnd ISR\r |
| | 52 | // call other timer interrupt routines here...\r |
| | 53 | }\r |
| | 54 | \r |
| | 55 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 56 | * MAIN: main routine\r |
| | 57 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r |
| | 58 | */\r |
| | 59 | int\r |
| | 60 | main (void)\r |
| | 61 | {\r |
| | 62 | IRMP_DATA irmp_data;\r |
| | 63 | \r |
| | 64 | irsnd_init(); // initialize irsnd\r |
| | 65 | timer1_init(); // initialize timer\r |
| | 66 | sei (); // enable interrupts\r |
| | 67 | \r |
| | 68 | for (;;)\r |
| | 69 | {\r |
| | 70 | irmp_data.protocol = IRMP_NEC_PROTOCOL; // use NEC protocol\r |
| | 71 | irmp_data.address = 0x00FF; // set address to 0x00FF\r |
| | 72 | irmp_data.command = 0x0001; // set command to 0x0001\r |
| | 73 | irmp_data.flags = 0; // don't repeat frame\r |
| | 74 | \r |
| | 75 | irsnd_send_data (&irmp_data, TRUE); // send frame, wait for completion\r |
| | 76 | _delay_ms (1000);\r |
| | 77 | }\r |
| | 78 | }\r |
projects / irmp.git / blame_incremental