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1 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
2 | * irsndmain.c - demo main module to test irsnd encoder\r | |
3 | *\r | |
4 | * Copyright (c) 2010-2012 Frank Meyer - frank(at)fli4l.de\r | |
5 | *\r | |
6 | * ATMEGA88 @ 8 MHz\r | |
7 | *\r | |
8 | * Fuses: lfuse: 0xE2 hfuse: 0xDC efuse: 0xF9\r | |
9 | *\r | |
10 | * This program is free software; you can redistribute it and/or modify\r | |
11 | * it under the terms of the GNU General Public License as published by\r | |
12 | * the Free Software Foundation; either version 2 of the License, or\r | |
13 | * (at your option) any later version.\r | |
14 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
15 | */\r | |
16 | #include "irsnd.h"\r | |
17 | \r | |
18 | #ifndef F_CPU\r | |
19 | # error F_CPU unkown\r | |
20 | #endif\r | |
21 | \r | |
22 | void\r | |
23 | timer1_init (void)\r | |
24 | {\r | |
25 | #if defined (__AVR_ATtiny45__) || defined (__AVR_ATtiny85__) // ATtiny45 / ATtiny85:\r | |
26 | OCR1C = (F_CPU / F_INTERRUPTS / 4) - 1; // compare value: 1/15000 of CPU frequency, presc = 4\r | |
27 | TCCR1 = (1 << CTC1) | (1 << CS11) | (1 << CS10); // switch CTC Mode on, set prescaler to 4\r | |
28 | #else // ATmegaXX:\r | |
29 | OCR1A = (F_CPU / F_INTERRUPTS) - 1; // compare value: 1/15000 of CPU frequency\r | |
30 | TCCR1B = (1 << WGM12) | (1 << CS10); // switch CTC Mode on, set prescaler to 1\r | |
31 | #endif\r | |
32 | \r | |
33 | #ifdef TIMSK1\r | |
34 | TIMSK1 = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r | |
35 | #else\r | |
36 | TIMSK = 1 << OCIE1A; // OCIE1A: Interrupt by timer compare\r | |
37 | #endif\r | |
38 | }\r | |
39 | \r | |
40 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
41 | * timer 1 compare handler, called every 1/10000 sec\r | |
42 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
43 | */\r | |
44 | ISR(TIMER1_COMPA_vect)\r | |
45 | {\r | |
46 | (void) irsnd_ISR(); // call irsnd ISR\r | |
47 | // call other timer interrupt routines here...\r | |
48 | }\r | |
49 | \r | |
50 | /*---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
51 | * MAIN: main routine\r | |
52 | *---------------------------------------------------------------------------------------------------------------------------------------------------\r | |
53 | */\r | |
54 | int\r | |
55 | main (void)\r | |
56 | {\r | |
57 | IRMP_DATA irmp_data;\r | |
58 | \r | |
59 | irsnd_init(); // initialize irsnd\r | |
60 | timer1_init(); // initialize timer\r | |
61 | sei (); // enable interrupts\r | |
62 | \r | |
63 | for (;;)\r | |
64 | {\r | |
65 | irmp_data.protocol = IRMP_NEC_PROTOCOL;\r | |
66 | irmp_data.address = 0x00FF;\r | |
67 | irmp_data.command = 0x0001;\r | |
68 | irmp_data.flags = 0;\r | |
69 | \r | |
70 | irsnd_send_data (&irmp_data, TRUE);\r | |
71 | _delay_ms (1000);\r | |
72 | }\r | |
73 | }\r |